CN103346160B - 阵列基板及其制作方法、显示装置 - Google Patents

阵列基板及其制作方法、显示装置 Download PDF

Info

Publication number
CN103346160B
CN103346160B CN201310289340.6A CN201310289340A CN103346160B CN 103346160 B CN103346160 B CN 103346160B CN 201310289340 A CN201310289340 A CN 201310289340A CN 103346160 B CN103346160 B CN 103346160B
Authority
CN
China
Prior art keywords
electrode
strip pixel
multiple strip
pixel electrode
extension
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201310289340.6A
Other languages
English (en)
Other versions
CN103346160A (zh
Inventor
杨慧光
杨玉清
石天雷
朴承翊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Chengdu BOE Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN201310289340.6A priority Critical patent/CN103346160B/zh
Publication of CN103346160A publication Critical patent/CN103346160A/zh
Priority to US14/364,489 priority patent/US20150115272A1/en
Priority to PCT/CN2013/088831 priority patent/WO2015003456A1/zh
Application granted granted Critical
Publication of CN103346160B publication Critical patent/CN103346160B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/7866—Non-monocrystalline silicon transistors
    • H01L29/78672—Polycrystalline or microcrystalline silicon transistor
    • H01L29/78675—Polycrystalline or microcrystalline silicon transistor with normal-type structure, e.g. with top gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134363—Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1237—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a different composition, shape, layout or thickness of the gate insulator in different devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/4175—Source or drain electrodes for field effect devices for lateral devices where the connection to the source or drain region is done through at least one part of the semiconductor substrate thickness, e.g. with connecting sink or with via-hole
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134372—Electrodes characterised by their geometrical arrangement for fringe field switching [FFS] where the common electrode is not patterned
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mathematical Physics (AREA)
  • Optics & Photonics (AREA)
  • Ceramic Engineering (AREA)
  • Geometry (AREA)
  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)

Abstract

本发明涉及显示技术领域，公开了一种阵列基板，包括：形成在基板上的薄膜晶体管、与所述薄膜晶体管的漏极连接的多个条状像素电极、和与所述多个条状像素电极对置的公共电极，所述漏极形成有沿多个条状像素电极的排列方向延伸的延伸部，每个所述条状像素电极均直接连接所述延伸部，且所述公共电极在所述基板上的投影和所述漏极在所述基板上的投影不交叠。还公开了一种阵列基板制作方法及包括所述阵列基板的显示装置。本发明通过使多个条状像素电极直接连接漏极的延伸部，避免了现有技术中多个条状像素电极的连接条和公共电极之间产生干扰电场导致的透过率降低的问题。

Description

阵列基板及其制作方法、显示装置
技术领域
本发明涉及显示技术领域，特别涉及一种阵列基板及其制作方法、显示装置。
背景技术
目前，随着技术的不断发展进步和用户需求的不断提高，宽视角化成为薄膜晶体管液晶显示器（TFTLCD）发展的一大趋势。目前薄膜晶体管显示器宽视角技术主要包括：像素分割、光学补偿膜、共面开关模式（IPS）、边缘场开关模式（FFS）、高级超维场转换技术（ADS）等。与其它技术相比，高级超维场转换技术（ADvancedSuperDimensionSwitch，ADS）具有高开口率的优点，有效解决了广视角技术中的低亮度问题。ADS是通过同一平面内狭缝电极边缘所产生的电场以及狭缝电极层与板状电极层间产生的电场形成多维电场，使液晶盒内狭缝电极间、电极正上方所有取向液晶分子都能够产生旋转，从而提高了液晶工作效率并增大了透光效率。高级超维场开关技术可以提高TFT-LCD产品的画面品质，具有高分辨率、高透过率、低功耗、宽视角、高开口率、低色差、无挤压水波纹（pushMura）等优点。
低温多晶硅LTPS-LCD结合宽视角技术由于其较佳的品质，产品覆盖手机、PDA、数码像机、笔记本电脑、汽车导航系统等多种高端智能移动互联产品。
以LTPS-TFT阵列基板为例，利用像素电极层和公共电极层在通电状态下所形成的电场实现液晶分子的控制。如图1a和1b所示，包括：玻璃基板101、缓冲层102、P-Si层103、掺杂部分104、轻掺杂部分105、栅极绝缘层106、栅电极107、中间绝缘层108、漏极109、源极115、有机层110、公共电极111、钝化层112及多个条状像素电极113。该结构中，传统结构中多个条状像素电极113通过同层透明氧化物材料的连接条113＇（连接条和多个条状像素电极113一体形成）连接，该连接条113＇和公共电极111存在交叠区域，交叠区域会产生与控制液晶偏转的电场方向不一致的干扰电场，如图1a中虚线框区域所示，在该区域存在沿图1a中纵向分布的干扰电场会导致该区域的液晶分子排列异常，导致透过率降低，同时屏幕受外力按压后易产生显示不均匀的现象（TraceMura）。
发明内容
（一）要解决的技术问题
本发明要解决的技术问题是：如何避免多个条状像素电极的连接条和公共电极之间产生的与控制液晶偏转的电场方向不一致的干扰电场导致的透过率降低的问题。
（二）技术方案
为解决上述技术问题，本发明提供了一种阵列基板，包括：形成在基板上的薄膜晶体管、与所述薄膜晶体管的漏极连接的多个条状像素电极、和与所述多个条状像素电极对置的公共电极，所述漏极形成有沿多个条状像素电极的排列方向延伸的延伸部，每个所述条状像素电极均直接连接所述延伸部，且所述公共电极在所述基板上的投影和所述漏极在所述基板上的投影不交叠。
其中，所述公共电极为块状电极，位于所述漏极的远离所述基板的一侧，与所述漏极之间间隔有绝缘间隔层；
所述多个条状像素电极位于所述公共电极的远离所述基板的一侧，所述多个条状像素电极和公共电极之间间隔有钝化层，所述多个条状像素电极通过穿过所述绝缘间隔层和所述钝化层的过孔连接所述漏极的延伸部。
其中，所述绝缘间隔层的厚度不小于1μm。
其中，所述薄膜晶体管为低温多晶硅薄膜晶体管。
本发明还提供了一种阵列基板制作方法，包括：
在基板上形成包括薄膜晶体管，使所述薄膜晶体管的漏极沿待形成的多个条状像素电极的排列方向延伸，以形成延伸部；
形成包括公共电极和多个条状像素电极的图形。
其中，所述形成包括公共电极和多个条状像素电极的图形的步骤具体包括：
在形成有所述薄膜晶体管的基板上形成绝缘间隔层；
在所述绝缘间隔层上形成包括公共电极的图形，使所述公共电极在所述基板上的投影和所述漏极在所述基板上的投影不交叠；
在所述公共电极上形成钝化层，且在所述多个条状像素电极与所述漏极的延伸部连接的区域形成穿过所述钝化层和所述绝缘间隔层的过孔；
形成包括多个条状像素电极的图形，使所述多个条状像素电极通过所述过孔连接所述漏极的延伸部。
其中，形成包括公共电极和多个条状像素电极的图形的步骤具体包括：
在形成所述薄膜晶体管的基板上形成绝缘间隔层，且在所述绝缘间隔层上对应所述多个条状像素电极与所述漏极的延伸部连接的区域形成穿过所述绝缘间隔层的第一过孔；
在所述绝缘间隔层上形成包括公共电极的图形，使公共电极在所述基板上的投影和所述漏极在所述基板上的投影不交叠，且在所述第一过孔中形成连接所述漏极的延伸部的连接电极；
在公共电极上形成钝化层，且所述第一过孔对应区域形成穿过所述钝化层的第二过孔；
形成包括多个条状像素电极的图形，使所述多个条状像素电极通过所述第二过孔连接所述连接电极，从而连接所述漏极的延伸部。
其中，所述绝缘间隔层的厚度不小于1μm。
其中，所述薄膜晶体管为低温多晶硅薄膜晶体管。
本发明还提供了一种显示装置，包括上述任一项所述的阵列基板。
（三）有益效果
本发明通过使多个条状像素电极直接连接漏极的延伸部，不会存在现有技术中多个条状像素电极的连接条和公共电极的交叠区域，从而避免了交叠区域之间产生的干扰电场导致该区域的液晶分子排列异常的现象，因此提高了透过率。
附图说明
图1a是现有技术的一种阵列基板的平面结构示意图；
图1b是图1a的阵列基板沿图中A-A向的截面示意图；
图2a是本发明实施例的一种阵列基板平面结构示意图；
图2b是图2a的阵列基板沿图中A-A向的截面示意图；
图2c是图2a的阵列基板沿图中B-B向的截面示意图。
具体实施方式
下面结合附图和实施例，对本发明的具体实施方式作进一步详细描述。以下实施例用于说明本发明，但不用来限制本发明的范围。
如图2a、2b及2c所示，本实施例的阵列基板，包括：形成在基板201上的薄膜晶体管（具体结构未示出）、与所述薄膜晶体管的漏极209连接的多个条状像素电极213和与所述多个条状像素电极对置的公共电极211。为了避免现有技术中多个条状像素电极213的连接条和公共电极211交叠区域产生干扰电场导致的透过率降低的问题，本实施例中，漏极209形成有沿多个条状像素电极213的排列方向延伸的延伸部209＇，每个条状像素电极213均直接连接所述延伸部209＇，即不再需要采用连接条先将多个条状像素电极连接在一起，不存在连接条与公共电极之间211产生的干扰电场对液晶干扰，从而改善了TraceMura，并提高了透过率，提高了显示质量。为了避免公共电极211和漏极209产生干扰电场，公共电极211在所述基板201上的投影和所述漏极209（包括延伸部209＇）在所述基板201上的投影不交叠。
本实施例中，公共电极211为透明块状电极，位于所述漏极209的远离所述基板的一侧，与漏极209之间间隔有绝缘间隔层210（有机材料层），如图2b所示，公共电极211位于漏极209上方。多个条状像素电极213位于公共电极211的远离基板201的一侧，之间间隔有钝化层212，如图2b所示，多个条状像素电极213位于公共电极211上方。多个条状像素电极213通过穿过所述绝缘间隔层210和所述钝化层212的过孔连接所述漏极209的延伸部209＇。
多个条状像素电极213可以通过制作多个条状像素电极213时的自身的材料直接穿过过孔连接漏极209的延伸部209＇。但这种连接方式容易导致连接材料与延伸部209＇接触不良，如：连接材料断裂。如图2b所示，本实施例中，优选地，通过公共电极211的导电材料形成连接电极211＇，多个条状像素电极213自身的导电材料连到连接电极211＇的方式使多个条状像素电极213和漏极209的延伸部209＇连接。
由于漏极209存在延伸部209＇，如图2a中虚线框所示，该延伸部209＇的边缘与公共电极211的边缘的区域也会产生干扰电场，导致该区域的液晶分子排列异常，导致透过率降低。因此，进一步地，本实施例中，增大绝缘间隔层210的厚度，使其厚度不小于1μm，厚度增大，其干扰电场减弱（与传统方法相比，对液晶分子影响可忽略）。
进一步地，本实施例中，薄膜晶体管可为低温多晶硅薄膜晶体管，其层级结构如图2b所示，包括在基板201（透明基板）及缓冲层202上形成的P-Si层203、掺杂部分204、轻掺杂部分205、栅极绝缘层206、栅电极207、中间绝缘层208、漏极209及源极215。
本发明还提供了一种阵列基板制作方法，包括：
步骤一，在基板上形成包括薄膜晶体管，使所述薄膜晶体管的漏极沿待形成的多个条状像素电极排列方向延伸，以形成延伸部。其中形成薄膜晶体管的工艺可按现有的工艺形成，只是在形成漏极的图形时，使漏极向待形成的多个条状像素电极排列方向延伸，形成延伸部即可。
步骤二，形成包括公共电极和多个条状像素电极的图形。
其中，步骤二的形成包括公共电极和多个条状像素电极的图形的步骤可以为：
在形成所述薄膜晶体管的基板上形成绝缘间隔层。
在所述绝缘间隔层上形成包括公共电极的图形，使公共电极在所述基板上的投影和所述漏极在所述基板上的投影不交叠。
在公共电极上形成钝化层，且在所述多个条状像素电极与所述漏极的延伸部连接的区域形成穿过所述钝化层和绝缘间隔层的过孔。
形成包括多个条状像素电极的图形，使所述多个条状像素电极通过所述过孔连接所述漏极的延伸部。
上述步骤二中一次形成了多个条状电极连接延伸部的过孔，即条状像素电极通过过孔直接连接延伸部，由于条状像素电极的导电材料连续穿过两层（钝化层和绝缘间隔层），尤其是在绝缘间隔层厚度较厚（即过孔较深）的情况下沉积在过孔中的导电材料可能产生与延伸部的接触不良，如：过孔中沉积的导电材料不均匀，可能未连通，或在钝化层和绝缘间隔层之间易断裂。
进一步地，步骤二的形成包括公共电极和多个条状像素电极的图形的步骤还可以为：
在形成所述薄膜晶体管的基板上形成绝缘间隔层，且在所述绝缘间隔层上对应所述多个条状像素电极与所述漏极的延伸部连接的区域形成穿过所述绝缘间隔层的第一过孔。
在所述绝缘间隔层上形成包括公共电极的图形，使公共电极在所述基板上的投影和所述漏极在所述基板上的投影不交叠，且在所述第一过孔中形成连接所述漏极的延伸部的连接电极。
在公共电极上形成钝化层，且所述第一过孔对应区域形成穿过所述钝化层的第二过孔。
形成包括多个条状像素电极的图形，使所述多个条状像素电极通过所述第二过孔连接所述连接电极，从而连接所述漏极的延伸部。
上述连接电极是由公共电极的导电材料形成的，在形成多个条状像素电极时，条状像素电极的导电材料通过第二过孔连接所述连接电极，通过连接电极连接延伸部，提高了多个条状像素电极与延伸部连接的可靠性。
其中，所述绝缘间隔层的厚度不小于1μm。
其中，所述薄膜晶体管为低温多晶硅薄膜晶体管。
本发明还提供了一种显示装置，包括上述的阵列基板。该显示装置可以为：液晶面板、电子纸、手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
以上实施方式仅用于说明本发明，而并非对本发明的限制，有关技术领域的普通技术人员，在不脱离本发明的精神和范围的情况下，还可以做出各种变化和变型，因此所有等同的技术方案也属于本发明的范畴，本发明的专利保护范围应由权利要求限定。

Claims (7)

1.一种阵列基板，包括：形成在基板上的薄膜晶体管、与所述薄膜晶体管的漏极连接的多个条状像素电极、和与所述多个条状像素电极对置的公共电极，其特征在于，所述漏极形成有沿多个条状像素电极的排列方向延伸的延伸部，每个所述条状像素电极通过连接电极连接所述延伸部，且所述公共电极在所述基板上的投影和所述漏极在所述基板上的投影不交叠，所述连接电极的材料与所述公共电极的材料相同；
在形成所述薄膜晶体管的基板上形成有绝缘间隔层，且在所述绝缘间隔层上对应所述多个条状像素电极与所述漏极的延伸部连接的区域形成有穿过所述绝缘间隔层的第一过孔；所述第一过孔中形成有所述连接电极；
所述公共电极上形成有钝化层，且所述第一过孔对应区域形成有穿过所述钝化层的第二过孔；所述多个条状像素电极通过所述第二过孔连接所述连接电极，从而连接所述漏极的延伸部。
2.如权利要求1所述的阵列基板，其特征在于，所述绝缘间隔层的厚度不小于1μm。
3.如权利要求1～2中任一项所述的阵列基板，其特征在于，所述薄膜晶体管为低温多晶硅薄膜晶体管。
4.一种阵列基板制作方法，其特征在于，包括：
在基板上形成包括薄膜晶体管，使所述薄膜晶体管的漏极沿待形成的多个条状像素电极的排列方向延伸，以形成延伸部；
形成包括公共电极和多个条状像素电极的图形，以使每个所述条状像素电极通过连接电极连接所述延伸部，所述连接电极的材料与所述公共电极的材料相同；
其中，形成包括公共电极和多个条状像素电极的图形的步骤具体包括：
在形成所述薄膜晶体管的基板上形成绝缘间隔层，且在所述绝缘间隔层上对应所述多个条状像素电极与所述漏极的延伸部连接的区域形成穿过所述绝缘间隔层的第一过孔；
在所述绝缘间隔层上形成包括公共电极的图形，使公共电极在所述基板上的投影和所述漏极在所述基板上的投影不交叠，且在所述第一过孔中形成连接所述漏极的延伸部的连接电极；
在公共电极上形成钝化层，且所述第一过孔对应区域形成穿过所述钝化层的第二过孔；
形成包括多个条状像素电极的图形，使所述多个条状像素电极通过所述第二过孔连接所述连接电极，从而连接所述漏极的延伸部。
5.如权利要求4所述的阵列基板制作方法，其特征在于，所述绝缘间隔层的厚度不小于1μm。
6.如权利要求4所述的阵列基板制作方法，其特征在于，所述薄膜晶体管为低温多晶硅薄膜晶体管。
7.一种显示装置，其特征在于，包括如权利要求1～3中任一项所述的阵列基板。
CN201310289340.6A 2013-07-10 2013-07-10 阵列基板及其制作方法、显示装置 Active CN103346160B (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201310289340.6A CN103346160B (zh) 2013-07-10 2013-07-10 阵列基板及其制作方法、显示装置
US14/364,489 US20150115272A1 (en) 2013-07-10 2013-12-09 Array substrate and manufacturing method thereof, and display device
PCT/CN2013/088831 WO2015003456A1 (zh) 2013-07-10 2013-12-09 阵列基板及其制作方法、显示装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201310289340.6A CN103346160B (zh) 2013-07-10 2013-07-10 阵列基板及其制作方法、显示装置

Publications (2)

Publication Number Publication Date
CN103346160A CN103346160A (zh) 2013-10-09
CN103346160B true CN103346160B (zh) 2016-04-06

Family

ID=49280945

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201310289340.6A Active CN103346160B (zh) 2013-07-10 2013-07-10 阵列基板及其制作方法、显示装置

Country Status (3)

Country Link
US (1) US20150115272A1 (zh)
CN (1) CN103346160B (zh)
WO (1) WO2015003456A1 (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103346160B (zh) * 2013-07-10 2016-04-06 京东方科技集团股份有限公司 阵列基板及其制作方法、显示装置
US9105615B1 (en) * 2014-06-12 2015-08-11 Amazon Technologies, Inc. Substrate vias for a display device
CN104485333A (zh) * 2014-12-11 2015-04-01 深圳市华星光电技术有限公司 一种ltps阵列基板
CN105700254B (zh) * 2016-03-07 2020-03-27 京东方科技集团股份有限公司 电极、阵列基板及显示面板
CN111463248A (zh) * 2020-04-10 2020-07-28 深圳市华星光电半导体显示技术有限公司 一种阵列基板及其制作方法、显示面板
CN115524889A (zh) * 2021-04-14 2022-12-27 深圳市华星光电半导体显示技术有限公司 阵列基板、显示面板及阵列基板的制作方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100243297B1 (ko) * 1997-07-28 2000-02-01 윤종용 다결정실리콘 박막 트랜지스터-액정표시장치 및그 제조방법
CN1841150A (zh) * 2005-03-31 2006-10-04 Lg.菲利浦Lcd株式会社 面内切换型液晶显示装置的阵列基板及其制造方法
CN102645808A (zh) * 2012-04-20 2012-08-22 京东方科技集团股份有限公司 一种阵列基板的制造方法、阵列基板及显示装置
CN103018974A (zh) * 2012-11-30 2013-04-03 京东方科技集团股份有限公司 液晶显示装置、多晶硅阵列基板及制作方法
CN203324618U (zh) * 2013-07-10 2013-12-04 京东方科技集团股份有限公司 阵列基板及显示装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4647843B2 (ja) * 2001-06-28 2011-03-09 株式会社日立製作所 液晶表示装置
KR100497569B1 (ko) * 2002-10-04 2005-06-28 엘지.필립스 엘시디 주식회사 횡전계방식 액정표시장치용 어레이기판
KR101107265B1 (ko) * 2004-12-31 2012-01-19 엘지디스플레이 주식회사 수평 전계 박막 트랜지스터 기판 및 그 제조 방법과, 그를이용한 액정 패널 및 그 제조 방법
EP1843194A1 (en) * 2006-04-06 2007-10-10 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display device, semiconductor device, and electronic appliance
KR100978263B1 (ko) * 2006-05-12 2010-08-26 엘지디스플레이 주식회사 액정표시장치 및 그 제조방법
KR101870986B1 (ko) * 2011-09-19 2018-06-26 엘지디스플레이 주식회사 박막 트랜지스터 어레이 기판 제조방법
KR101905757B1 (ko) * 2011-11-17 2018-10-10 엘지디스플레이 주식회사 에프에프에스 방식 액정표시장치용 어레이기판 및 그 제조방법
CN202631914U (zh) * 2012-06-11 2012-12-26 京东方科技集团股份有限公司 一种阵列基板及显示装置
CN103346160B (zh) * 2013-07-10 2016-04-06 京东方科技集团股份有限公司 阵列基板及其制作方法、显示装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100243297B1 (ko) * 1997-07-28 2000-02-01 윤종용 다결정실리콘 박막 트랜지스터-액정표시장치 및그 제조방법
CN1841150A (zh) * 2005-03-31 2006-10-04 Lg.菲利浦Lcd株式会社 面内切换型液晶显示装置的阵列基板及其制造方法
CN102645808A (zh) * 2012-04-20 2012-08-22 京东方科技集团股份有限公司 一种阵列基板的制造方法、阵列基板及显示装置
CN103018974A (zh) * 2012-11-30 2013-04-03 京东方科技集团股份有限公司 液晶显示装置、多晶硅阵列基板及制作方法
CN203324618U (zh) * 2013-07-10 2013-12-04 京东方科技集团股份有限公司 阵列基板及显示装置

Also Published As

Publication number Publication date
US20150115272A1 (en) 2015-04-30
WO2015003456A1 (zh) 2015-01-15
CN103346160A (zh) 2013-10-09

Similar Documents

Publication Publication Date Title
CN103346160B (zh) 阵列基板及其制作方法、显示装置
CN102841718B (zh) 一种电容式内嵌触摸屏及显示装置
JP5654677B2 (ja) 液晶表示パネル及び液晶表示装置
CN103946740B (zh) 液晶显示装置
CN102629606B (zh) 阵列基板及其制备方法和显示装置
CN106483726B (zh) 薄膜晶体管阵列基板及制作方法和液晶显示面板
US9964812B2 (en) Liquid crystal display device
CN103353695B (zh) 一种阵列基板及显示装置
CN105470269A (zh) Tft阵列基板及其制作方法
CN103336392B (zh) 阵列基板、液晶显示面板及装置
CN103309100B (zh) 液晶显示装置及其制造方法
TW550431B (en) TFT-LCD device having a reduced feed-through voltage
US8975631B2 (en) Array substrate, manufacturing method, and display device thereof
CN102636920A (zh) 一种硬屏液晶显示的装置和实现方法及其应用
CN106449652B (zh) 阵列基板及其制造方法、显示面板和显示设备
CN105404062A (zh) 阵列基板和显示装置
GB2556762A (en) Manufacturing method for IPS TFT-LCD array substrate, and IPS TFT-LCD array substrate
CN103278986B (zh) 一种阵列基板、显示装置及阵列基板的制造方法
CN103309105A (zh) 阵列基板及其制备方法、显示装置
CN105093756A (zh) 液晶显示像素结构及其制作方法
CN104777661A (zh) 液晶显示面板及其制作方法
WO2018120570A1 (zh) 一种显示面板制程
CN102929062B (zh) 一种金属氧化物平面开关型液晶显示面板及其制造方法
CN107170757B (zh) 一种阵列基板及其制作方法
US9703152B2 (en) Liquid crystal display device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant