CN103337586A - Non-silicon-based wafer level LED packaging method - Google Patents

Non-silicon-based wafer level LED packaging method Download PDF

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Publication number
CN103337586A
CN103337586A CN2013102120997A CN201310212099A CN103337586A CN 103337586 A CN103337586 A CN 103337586A CN 2013102120997 A CN2013102120997 A CN 2013102120997A CN 201310212099 A CN201310212099 A CN 201310212099A CN 103337586 A CN103337586 A CN 103337586A
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CN
China
Prior art keywords
wafer level
level led
conductive electrode
based wafer
silicon
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CN2013102120997A
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Chinese (zh)
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CN103337586B (en
Inventor
谢晔
陈栋
张黎
陈锦辉
赖志明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jiangyin Changdian Advanced Packaging Co Ltd
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Jiangyin Changdian Advanced Packaging Co Ltd
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Priority to CN201310212099.7A priority Critical patent/CN103337586B/en
Publication of CN103337586A publication Critical patent/CN103337586A/en
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Publication of CN103337586B publication Critical patent/CN103337586B/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Led Device Packages (AREA)

Abstract

The invention relates to a non-silicon-based wafer level LED packaging method and belongs to the semiconductor packaging technology field. The non-silicon-based wafer level LED packaging method comprises steps that: a silicon body (100) having conductive electrodes (200) is provided; a plurality of LED chips (300) having anode and cathode electrodes (310) are provided; upside-down mounting of the LED chips (300) on the conductive electrodes (200) is carried out, a photoluminescence layer (400) is formed above the silicon body (100), and light-emitting surfaces of the LED chips (300) are covered by the photoluminescence layer (400); the silicon body (100) is removed to expose the conductive electrodes (200); surfaces of the conductive electrodes (200) are plated with a metal welding layer (500) which is directly connected with the conductive electrodes (200), a surface of the metal welding layer (500) is coated with a line surface protection layer (600); a single non-silicon-based wafer level LED packaging structure is formed through a wafer cutting separating method. The non-silicon-based wafer level LED packaging method has advantages of simple packaging technology, good heat radiation performance, improved light emitting efficiency and low packaging cost.

Description

A kind of do not have a silica-based wafer level LED method for packing
Technical field
The present invention relates to a kind of silica-based wafer level LED method for packing that do not have, belong to the semiconductor packaging field.
Background technology
Along with the fast development of LED technology, the progressively raising of its luminous efficiency, LED can replace conventional light source to use in many places, and the speed that LED replaces the traditional lighting light source has been accelerated in the particularly appearance of great power LED.Compare with traditional lighting source, white light LEDs has many advantages, as: volume is little, energy consumption is low, response is fast, the life-span is long, pollution-free etc., therefore be called the 4th generation lighting source.Yet, compare with traditional fluorescent lamp tube, at present the packaging cost of LED itself is to carry out energy-saving and cost-reducing biggest obstacle, its price is 2-3 times of fluorescent tube, thus with fluorescent tube quite or more cheaply the LED lighting technology become the object that industry is chased.
The LED encapsulation also is faced with and solves the LED heat radiation except reducing cost, and reduces the thermal resistance of LED, increases the LED light extraction efficiency, increases the problems such as reliability of LED.Present envelope is changeed form and is mainly carried out with single form, is about to led chip after the cutting by on the mounted substrate (as metallic support, lead frame, ceramic substrate, metal substrate), then interconnected by going between, by a some glue; Because nearly all work step all is to carry out with single, production efficiency is lower, and production cost is than higher; Simultaneously, have the not high problem of radiating control difficulty, light efficiency, also have problems such as reliability, this has seriously restricted the application of LED.
Summary of the invention
The objective of the invention is to overcome the deficiency of current method for packing, a kind of perfect heat-dissipating is provided, is lifted out optical efficiency, encapsulation overhead is low, the no silica-based wafer level LED method for packing of good reliability.
The object of the present invention is achieved like this: a kind of do not have a silica-based wafer level LED method for packing, and its technical process is as follows:
The silicon body that has conductive electrode is provided, and described conductive electrode is two or more;
Provide several to have the led chip of positive and negative electrode;
On conductive electrode, the mode by gum, printing or spraying on the described silicon body forms the luminescence generated by light layer with the led chip upside-down mounting, and described luminescence generated by light layer covers the exiting surface of led chip;
By grinding and/or etch process silicon body is removed, exposed conductive electrode;
By electroplate or the method for chemical plating at the plating metal on surface weld layer of described conductive electrode, described metal solder layer directly links to each other with conductive electrode, and at the surface-coated circuit sealer of metal solder layer, and formation circuit sealer opening;
Method by the wafer cutting and separating forms single no silica-based wafer level LED encapsulating structure.
Alternatively, described conductive electrode is formed on the silicon body by sputter, photoetching and/or electric plating method.
Alternatively, described conductive electrode is copper/tin or gold/tin.
Alternatively, described upside-down mounting is to finish by the mode that thermocompression bonding or upside-down mounting reflux.
Alternatively, the exiting surface of described luminescence generated by light layer is plane, cambered surface or lens face.
Alternatively, described metal solder layer is titanium/copper, titanium tungsten/copper or titanium tungsten/gold.
Alternatively, described dry etching or the wet etching of being etched to.
The invention has the beneficial effects as follows:
1, the electrode of led chip of the present invention is connected with the metal solder layer at the back side by conductive electrode, because being whole, the electrode of chip is connected with the metal solder layer, increase the contact area of heat radiation, promoted the radiating rate of led chip, improved reliability of products;
2, the luminescence generated by light layer above led chip is not owing to have barrier layer, this encapsulating structure can adapt to the wider led chip of rising angle around the chip;
3, main technique of the present invention is that mode with wafer level realizes, so production cost is lower, and package dimension can accomplish littler, more near the size of led chip.
Description of drawings
Fig. 1 to Fig. 5 is a kind of schematic diagram that does not have silica-based wafer level LED method for packing of one embodiment of the invention.
Among the figure:
Silicon body 100
Conductive electrode 200
Led chip 300
Electrode 310
Luminescence generated by light layer 400
Metal solder layer 500
Circuit sealer 600
Circuit sealer opening 610.
Embodiment
The present invention is a kind of not to have silica-based wafer level LED method for packing, and its technical process is as follows:
As shown in Figure 1, form two or more conductive electrodes 200 by sputter, photoetching and/or electric plating method at silicon body 100, the material of conductive electrode 200 is copper/tin, gold/tin etc., and its big I determines according to actual conditions;
As shown in Figure 2, the mode that adopts thermocompression bonding or upside-down mounting to reflux, to have led chip 300 upside-down mountings of positive and negative electrode 310 on conductive electrode 200, mode by gum, printing or spraying on silicon body 100 forms the luminescence generated by light layer 400 that layer of even is higher than led chip 300, and luminescence generated by light layer 400 comprises organic silica gel and luminescence generated by light thing;
As shown in Figure 3, by grinding and/or etched technology silicon body 100 is removed, exposed conductive electrode 200, described dry etching or the wet etching of being etched to;
As shown in Figure 4, by electroplate or the method for chemical plating at the plating metal on surface weld layer 500 of conductive electrode 200, the material of metal solder layer 500 is conducting metals such as copper, silver, gold, the method during according to chips welding is selected for use., form circuit sealer 600, and optionally form circuit sealer opening 610 at metal solder layer 500 surface-coated one deck colloid by photoetching process, can realize welding according to the mode that attachment process is selected solder paste application or planted ball;
As shown in Figure 5, form single no silica-based wafer level LED encapsulating structure by the method for wafer cutting and separating.
A kind of main technique of not having silica-based wafer level LED method for packing proposed by the invention all realizes in the wafer level mode, so production cost is lower, and package dimension can be littler.

Claims (7)

1. no silica-based wafer level LED method for packing, its technical process is as follows:
The silicon body that has conductive electrode (200) (100) is provided, and described conductive electrode (200) is two or more;
Several led chips that has positive and negative electrode (310) (300) are provided;
On conductive electrode (200), the mode by gum, printing or spraying on the described silicon body (100) forms luminescence generated by light layer (400) with led chip (300) upside-down mounting, and described luminescence generated by light layer (400) covers the exiting surface of led chip (300);
By grinding and/or etch process silicon body (100) is removed, exposed conductive electrode (200);
By electroplate or the method for chemical plating at the plating metal on surface weld layer (500) of described conductive electrode (200), described metal solder layer (500) directly links to each other with conductive electrode (200), and at the surface-coated circuit sealer (600) of metal solder layer (500), and form circuit sealer opening (610);
Method by the wafer cutting and separating forms single no silica-based wafer level LED encapsulating structure.
2. a kind of silica-based wafer level LED method for packing that do not have according to claim 1, it is characterized in that: described conductive electrode (200) is formed on the silicon body (100) by sputter, photoetching and/or electric plating method.
3. a kind of silica-based wafer level LED method for packing that do not have according to claim 1 and 2, it is characterized in that: described conductive electrode (200) is copper/tin or gold/tin.
4. a kind of silica-based wafer level LED method for packing that do not have according to claim 1 is characterized in that: described upside-down mounting is to finish by the mode that thermocompression bonding or upside-down mounting reflux.
5. a kind of silica-based wafer level LED method for packing that do not have according to claim 1, it is characterized in that: the exiting surface of described luminescence generated by light layer (400) is plane, cambered surface or lens face.
6. a kind of wafer level led chip encapsulating structure according to claim 1, it is characterized in that: described metal solder layer (500) is titanium/copper, titanium tungsten/copper or titanium tungsten/gold.
7. a kind of wafer level led chip encapsulating structure according to claim 1 is characterized in that: described dry etching or the wet etching of being etched to.
CN201310212099.7A 2013-05-31 2013-05-31 Silicon-free wafer-level LED packaging method Active CN103337586B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201310212099.7A CN103337586B (en) 2013-05-31 2013-05-31 Silicon-free wafer-level LED packaging method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201310212099.7A CN103337586B (en) 2013-05-31 2013-05-31 Silicon-free wafer-level LED packaging method

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CN103337586A true CN103337586A (en) 2013-10-02
CN103337586B CN103337586B (en) 2016-03-30

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106299040A (en) * 2016-08-18 2017-01-04 厦门市三安光电科技有限公司 The manufacture method of a kind of thin film flipped light emitting assembly and thin film flipped light emitting assembly thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101369615A (en) * 2007-08-17 2009-02-18 广东昭信光电科技有限公司 Packaging method for low-thermal resistance high-power light-emitting diode
CN102252219A (en) * 2010-05-28 2011-11-23 深圳市聚飞光电股份有限公司 Light-emitting diode (LED) street lamp and high-power LED device
CN102290524A (en) * 2011-09-21 2011-12-21 晶科电子(广州)有限公司 LED (Light Emitting Diode) device and LED (Light Emitting Diode) module device thereof
WO2013028418A1 (en) * 2011-08-23 2013-02-28 Tyco Electronics Corporation Metal clad circuit board

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101369615A (en) * 2007-08-17 2009-02-18 广东昭信光电科技有限公司 Packaging method for low-thermal resistance high-power light-emitting diode
CN102252219A (en) * 2010-05-28 2011-11-23 深圳市聚飞光电股份有限公司 Light-emitting diode (LED) street lamp and high-power LED device
WO2013028418A1 (en) * 2011-08-23 2013-02-28 Tyco Electronics Corporation Metal clad circuit board
CN102290524A (en) * 2011-09-21 2011-12-21 晶科电子(广州)有限公司 LED (Light Emitting Diode) device and LED (Light Emitting Diode) module device thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106299040A (en) * 2016-08-18 2017-01-04 厦门市三安光电科技有限公司 The manufacture method of a kind of thin film flipped light emitting assembly and thin film flipped light emitting assembly thereof
CN106299040B (en) * 2016-08-18 2019-01-11 厦门市三安光电科技有限公司 A kind of production method and its film flipped light emitting component of film flipped light emitting component

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