CN103324132A - Multichannel dynamic signal acquisition card based on PXI bus - Google Patents
Multichannel dynamic signal acquisition card based on PXI bus Download PDFInfo
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Abstract
The invention provides a multichannel dynamic signal acquisition card based on a PXI bus. The multichannel dynamic signal acquisition card based on the PXI bus is mainly composed of a multiple paths of analog signal conditioning circuits, an AD conversion circuit, a frequency doubling and phase-locked loop circuit, a DDS and AD clock distribution circuit, a PCI port circuit, a reference source circuit, an FPGA circuit, a constant flow source circuit and a TEDS intelligent sensor port circuit. According to the multichannel dynamic signal acquisition card based on the PXI, an accurate multichannel dynamic signal synchronous acquisition function is provided for test and measurement users, electric quantity signals can be acquired directly, non electrical quantity acquisition, based on IEPE, of the accelerated speed and microphone is achieved, the test requirements in the field of sound and vibration analysis are met to the maximum degree, and TEDS support is provided for the intelligent sensor following the CLASS1 standard of IEEE1451.4.
Description
Technical field
The present invention relates to hyperchannel dynamic signal acquisition card, be specifically related to a kind of hyperchannel dynamic signal acquisition card based on the PXI bus, belong to the virtual instrument technique field.
Background technology
At present, abroad intend port number based on the hyperchannel dynamic signal acquisition snap gauge of PXI bus and be 8 to the maximum, its high sampling rate is 102.4kSa/s, does not support TEDS intelligence sensor interface, and above-mentioned technical parameter is difficult to adapt to the technical requirement that improves constantly; Domestic at present also without the hyperchannel dynamic signal acquisition card release based on the PXI bus.
Summary of the invention
The purpose of this invention is to provide a kind of hyperchannel dynamic signal acquisition card based on the PXI bus, mainly solved prior art sampling rate and the lower problem of dynamic range.
Hyperchannel dynamic signal acquisition card based on the PXI bus provided by the invention, be provided with nearly 8 independently signal condition and acquisition channels at the PXI of 3U size integrated circuit board, high sampling rate is 204.8kSa/s, the dynamic signal acquisition of supporting TEDS intelligence sensor interface.
Concrete technical solution of the present invention is as follows:
Should comprise programmable logic controller (PLC) and analog signal conditioner circuit based on hyperchannel dynamic signal acquisition card of PXI bus, the analog signal conditioner circuit is connected respectively an end and is connected with programmable logic controller (PLC), reference source circuit, constant-current source circuit, AD clock distribution circuit and TEDS interface circuit; The other end of described AD clock distribution circuit is connected with the PXI interface circuit by the DDS circuit; Described PXI interface circuit also directly is connected with programmable logic controller (PLC) respectively, is connected with programmable logic controller (PLC) with phase-locked loop circuit by frequency multiplication; Described programmable logic controller (PLC) also is connected with the Trigger Function modular circuit with the DDR circuit.
Above-mentioned PXI interface circuit is comprised of protocol converter, PXI bus, PXI Trigger Bus and clock circuit, protocol converter, PXI Trigger Bus are connected an end and all are connected with the PXI bus with clock circuit, protocol converter is connected the other end and is connected with programmable logic controller (PLC) with the PXI Trigger Bus, the other end of clock circuit is connected with phase-locked loop circuit with frequency multiplication.
Above-mentioned analog signal conditioner circuit comprises a plurality of independently difference or pseudo-differential single channel analog signal conditioner circuit, and each passage has 1 independently 24 sigma-delta AD converter, each passage independent parallel sampling, and sampling rate is by the downward frequency division of DDS circuit.
The said reference source circuit comprises successively the high stability reference source that connects and for increasing the amplifier of driving force.
Above-mentioned constant-current source circuit is the constant-current circuit of zero-temperature coefficient.
Above-mentioned TEDS interface circuit is typical 2 line constant current-supplying sensors, common signal line.
Above-mentioned frequency multiplication and phase-locked loop circuit are comprised of integrated voltage controlled oscillator and phase-locked loop chip.
Above-mentioned DDS circuit is the DDS chip of built-in 10 figure place weighted-voltage D/A converters and voltage comparator.
The invention has the advantages that:
It is 204.8kSa/s analog acquisition passage that hyperchannel dynamic signal acquisition card based on the PXI bus provided by the invention not only provides nearly 8 high sampling rates, the TEDS intelligence sensor interface of two-wire system also is provided for each passage simultaneously, can so that the user makes up the dynamic signal acquisition system, effectively reduces system cost, have good engineering practical value.
Specifically, the present invention possesses following features:
Adopt highly integrated chip, designed nearly 8 analog channels at the PXI of monolithic 3U integrated circuit board, adopt 24 sigma-delta AD converter of AD company, high sampling rate is 204.8kSa/s, has realized hyperchannel and high sampling rate; Adopt the DDS circuit to produce the sampling clock of AD converter, the sampling rate step-length is little hertz of sampling of 36.38uS/s(), so that sampling rate arranges is meticulous flexibly, simultaneously, synchronism between the passage is high, and interchannel synchronism mainly is that the consistance by the consistance of sampling clock and analog channel guarantees.
Adopt multiplexer and programme-controlled gain instrument amplifier PGA, provide difference and pseudo-differential two kinds of input modes, be convenient to user selection; Adopt low-noise simulation signal condition technology, programme-controlled gain, program control filtering and multiple spot collimation technique and sigma-delta AD converter, the capture card dynamic range reaches 110dB, and the signal amplitude of collection has improved dynamic range from ± 30uV to ± 10V.
The acquisition function of the non electrical quantities such as acceleration based on IEPE, microphone is provided.Adopt single chip integrated constant current source chip, for providing conditioning based on sensors such as the acceleration of IEPE, microphones.For the intelligence sensor of the CLASS1 standard of following IEEE1451.4 provides the TEDS support.
Description of drawings
Fig. 1 is hyperchannel dynamic signal acquisition card schematic diagram;
Fig. 2 is single channel analog signal conditioner circuit diagram;
Fig. 3 is reference source circuit figure;
Fig. 4 is constant-current source circuit figure;
Fig. 5 is frequency multiplication and phase-locked loop circuit figure;
Fig. 6 is TEDS interface circuit figure;
Fig. 7 is the DDS circuit diagram;
Fig. 8 is AD clock distribution circuit figure;
Fig. 9 is the Trigger Function module circuit diagram;
Figure 10 is PXI interface circuit figure;
Figure 11 is the DDR circuit diagram;
Figure 12 is programmable logic controller (PLC) inner function module circuit diagram;
Accompanying drawing is detailed: 2-analog signal conditioner circuit; The 3-reference source circuit; The 4-constant-current source circuit; 5-frequency multiplication and phase-locked loop circuit; The 6-TEDS interface circuit; The 7-DDS circuit; The 8-AD clock distribution circuit; 9-Trigger Function modular circuit; The 10-PXI interface circuit; The 11-DDR circuit; The 13-programmable logic controller (PLC).
Embodiment
Below in conjunction with Figure of description, describe the specific embodiment of the present invention in detail.
This capture card can be divided into the circuit such as analog signal conditioner, AD conversion, frequency multiplication and phaselocked loop, DDS and AD clock distribution, pci interface, reference source circuit, FPGA, constant current source, TEDS intelligence sensor interface on function.Fig. 1 is hyperchannel dynamic signal acquisition card schematic diagram.
From the simulating signal of sensor input send at first that multiplexer exchanges, direct current, ground connection coupling select.The output signal of multiplexer is connected to accurate program controlled gain amplifier PGA, and PGA to the maximum input range near AD, can guarantee that signal has maximum signal to noise ratio (S/N ratio) with analog signal conditioner like this.PGA is single-ended signal output, and AD is the difference input, so just must increase the single-ended transfer difference amplifier of one-level precision.Differential signal also must carry out analogue low pass filtering to noise and process before entering AD converter, and 24 sigma-delta-converter AD7764 that filtered signal is delivered to the difference input at last again carry out analog to digital conversion.Fig. 2 is single channel analog signal conditioner circuit diagram.
The AD voltage reference of Low Drift Temperature, high stability is the assurance of high-precision number of degrees extraction system.Used the high stability reference source of the ADR444 of AD company as all AD converter among the design.It is 1ppm/ ℃ that the ADR444 temperature is floated representative value, is 3ppm/ ℃ to the maximum, and noise is 1.8uVp-p, and output voltage is 4.096V.4.096V reference voltage is followed by amplifier AD706 again, increases after the driving force for 8 tunnel AD converter.Fig. 3 is reference source circuit figure.
Constant current source adopts the LM334 chip.LM334 is the integrated three end adjustable constant-flow sources of monolithic that NS company produces, during use, as long as external 2 resistance R 1, R2(R2=10R1) and diode IN457 just can consist of the constant current source of zero-temperature coefficient.Select different R1 can make constant current value adjustable continuously from luA to l0mA.Fig. 4 is constant-current source circuit figure.
The TEDS circuit of this capture card is typical 2 line constant current-supplying sensors, common signal line.By the polarity of reverse signal line, diode allows sequential access amplifier or TEDS storer.When gauge tap was in " analog " position, the constant current source electric current of collection plate was the amplifier power supply by the diode of signal wire and top.Transmitter output shows as aanalogvoltage at signal wire.When gauge tap was in " digital " position, memory device was by the diode power supply of negative logic power supply by the below.Provided the pull down resistor (Rt) between TEDS memory chip terminal in the circuit.This resistance is used for discharging the electric charge of memory circuitry and lead capacitance, guarantees that the logical zero level satisfies the time slot requirement.The compatible sensor of IEEE1451.4 is connected to TP4 by the analog/digital switch.TP2 and TP6 are connected to respectively output (writing) and input (reading) port of FPGA, are used for reading and writing the TEDS information of intelligence sensor.Fig. 5 is TEDS interface circuit figure.
Voltage controlled oscillator VCXO produces the local clock of 40MHz, utilizes the PLL chip the 10M clock lock on this clock and the PXI bus.The 40MHz clock is for functional circuits such as FPGA, PCI9054, DDR.Fig. 6 is frequency multiplication and phase-locked loop circuit figure.
The sampling rate of this capture card is that 1kS/s is adjustable to 204.8kS/s, and for the accuracy that guarantees 24 bit AD sample rates be convenient to the user and arrange, the sampling clock of AD is produced by the DDS circuit on the integrated circuit board or decides from the clock of star-like triggering line transmission.DDS built-in chip type 10 figure place weighted-voltage D/A converter and voltage comparators can be exported the square wave of required frequency easily.Fig. 7 is the DDS circuit diagram.
In order to increase driving force, the output of the road clock of DDS becomes multipath clock through behind the clock buffer CDCLVC1110PW of low jitter again, for the AD converter of this integrated circuit board or be routed on the star-like triggering line AD converter for other integrated circuit board.Fig. 8 is AD clock distribution circuit figure.
Trigger source is divided into software triggering, analog channel triggering, external digital triggering, star-like triggering and PXI_TRIG[0..7] the backboard triggering.Fig. 9 is the Trigger Function module circuit diagram.
PCI9054 realizes the effect of PCI bridge, is a kind of relatively simple bus interface with the PCI protocol conversion of complexity, and Figure 10 is the pci interface circuit diagram.
The DDR partial circuit is selected the 32M X16BIT chip of MICRON company, and Figure 11 is the DDR circuit diagram.
FPGA mainly realizes following major function:
1, PCI9054 is controlled, realize the communication with pci bus;
2, the DDR chip is read and write control, realize the buffer memory of AD image data;
3, to the triggering configuration of each acquisition channel, control the multi-channel A/D synchronous acquisition;
4, the DDS chip is controlled, realized generation and the switching of AD sample frequency;
5, support intelligence sensor TEDS interface, realize the read-write operation to sensor TEDS;
6, support 3 kinds of data acquisition schemes: delayed trigger, leading triggering, continuous trigger.
Used fpga chip is the XC6SLX45-FG676 of SPARTAN-6, and configuring chip is XCF04S.Figure 12 is the FPGA peripheral circuit diagram.
FPGA is the control center of whole acquisition system among the design.The FPGA internal main will be divided into: acquisition control module, clock-reset module, local bus interface module, analog channel control module, routing module control, DDR control module, DDS sampling clock control module, simulation trigger control module and TEDS control module, EEPROM control module etc.
Claims (8)
1. based on the hyperchannel dynamic signal acquisition card of PXI bus, comprise programmable logic controller (PLC), it is characterized in that: also comprise the analog signal conditioner circuit, described analog signal conditioner circuit is connected respectively an end and is connected with programmable logic controller (PLC), reference source circuit, constant-current source circuit, AD clock distribution circuit and TEDS interface circuit; The other end of described AD clock distribution circuit is connected with the PXI interface circuit by the DDS circuit; Described PXI interface circuit also directly is connected with programmable logic controller (PLC) respectively, is connected with programmable logic controller (PLC) with phase-locked loop circuit by frequency multiplication; Described programmable logic controller (PLC) also is connected with the Trigger Function modular circuit with the DDR circuit.
2. the hyperchannel dynamic signal acquisition card based on the PXI bus according to claim 1, it is characterized in that: described PXI interface circuit is comprised of protocol converter, PXI bus, PXI Trigger Bus and clock circuit, protocol converter, PXI Trigger Bus are connected an end and all are connected with the PXI bus with clock circuit, protocol converter is connected the other end and is connected with programmable logic controller (PLC) with the PXI Trigger Bus, the other end of clock circuit is connected with phase-locked loop circuit with frequency multiplication.
3. the hyperchannel dynamic signal acquisition card based on the PXI bus according to claim 1 and 2, it is characterized in that: described analog signal conditioner circuit comprises a plurality of difference or pseudo-differential single channel analog signal conditioner circuit independently, each passage has 1 independently 24 sigma-delta AD converter, each passage independent parallel sampling, sampling rate is by the downward frequency division of DDS circuit.
4. the hyperchannel dynamic signal acquisition card based on the PXI bus according to claim 3 is characterized in that: described reference source circuit comprises the high stability reference source that connects successively and for increasing the amplifier of driving force.
5. the hyperchannel dynamic signal acquisition card based on the PXI bus according to claim 3, it is characterized in that: described constant-current source circuit is the constant-current source circuit of zero-temperature coefficient.
6. the hyperchannel dynamic signal acquisition card based on the PXI bus according to claim 3, it is characterized in that: described TEDS interface circuit is typical 2 line constant current-supplying sensors, common signal line.
7. the hyperchannel dynamic signal acquisition card based on the PXI bus according to claim 3, it is characterized in that: described frequency multiplication and phase-locked loop circuit are comprised of integrated voltage controlled oscillator and phase-locked loop chip.
8. the hyperchannel dynamic signal acquisition card based on the PXI bus according to claim 3, it is characterized in that: described DDS circuit is the DDS chip of built-in 10 figure place weighted-voltage D/A converters and voltage comparator.
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Cited By (11)
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| CN104698307A (en) * | 2014-10-13 | 2015-06-10 | 北京天高智机技术开发公司 | PXI (PCI extensions for instrumentation) bus-based frequency characteristic testing device and method |
| CN106707895A (en) * | 2017-02-24 | 2017-05-24 | 中国石油大学(北京) | High-precision synchronous vibration data collection card for various types of detection signals |
| CN106839963A (en) * | 2016-12-29 | 2017-06-13 | 北京航天测控技术有限公司 | A kind of bus deformeters of AXIe 0 and strain testing method |
| CN108020401A (en) * | 2016-10-31 | 2018-05-11 | 北京新长征天高智机科技有限公司 | A kind of multi-degree-of-freemechanical mechanical arm test system based on PXI buses |
| CN109522251A (en) * | 2018-09-28 | 2019-03-26 | 天津市英贝特航天科技有限公司 | A kind of high-speed synchronous serial port board and its working method based on PXIe bus |
| WO2019153520A1 (en) * | 2018-02-06 | 2019-08-15 | 东莞理工学院 | Signal acquisition card for iepe sensor |
| CN110321316A (en) * | 2019-06-19 | 2019-10-11 | 西安思丹德信息技术有限公司 | A kind of multi-channel synchronous data acquisition adaptive training control device and method |
| CN111007292A (en) * | 2019-11-26 | 2020-04-14 | 北京振兴计量测试研究所 | High-voltage amplifier device based on PXI bus and working method thereof |
| CN111308194A (en) * | 2019-12-06 | 2020-06-19 | 百科荣创(北京)科技发展有限公司 | Frequency characteristic tester |
| CN113541689A (en) * | 2020-04-17 | 2021-10-22 | 国控精仪（北京）科技有限公司 | Automatic calibration circuit and calibration method for analog acquisition potentiometer-free device |
| CN113533838A (en) * | 2021-07-06 | 2021-10-22 | 迪力普电子(常州)有限公司 | Wiring harness comprehensive test system and method based on FPGA |
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Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104698307A (en) * | 2014-10-13 | 2015-06-10 | 北京天高智机技术开发公司 | PXI (PCI extensions for instrumentation) bus-based frequency characteristic testing device and method |
| CN104698307B (en) * | 2014-10-13 | 2018-05-22 | 北京天高智机技术开发公司 | A kind of frequency characteristic test apparatus and method based on PXI buses |
| CN108020401A (en) * | 2016-10-31 | 2018-05-11 | 北京新长征天高智机科技有限公司 | A kind of multi-degree-of-freemechanical mechanical arm test system based on PXI buses |
| CN106839963A (en) * | 2016-12-29 | 2017-06-13 | 北京航天测控技术有限公司 | A kind of bus deformeters of AXIe 0 and strain testing method |
| CN106707895A (en) * | 2017-02-24 | 2017-05-24 | 中国石油大学(北京) | High-precision synchronous vibration data collection card for various types of detection signals |
| CN106707895B (en) * | 2017-02-24 | 2019-02-12 | 中国石油大学(北京) | A kind of high-precise synchronization vibrating data collection card of collection polymorphic type detection signal |
| WO2019153520A1 (en) * | 2018-02-06 | 2019-08-15 | 东莞理工学院 | Signal acquisition card for iepe sensor |
| CN109522251A (en) * | 2018-09-28 | 2019-03-26 | 天津市英贝特航天科技有限公司 | A kind of high-speed synchronous serial port board and its working method based on PXIe bus |
| CN110321316A (en) * | 2019-06-19 | 2019-10-11 | 西安思丹德信息技术有限公司 | A kind of multi-channel synchronous data acquisition adaptive training control device and method |
| CN110321316B (en) * | 2019-06-19 | 2021-05-25 | 西安思丹德信息技术有限公司 | Multi-channel synchronous data acquisition self-adaptive training control device and method |
| CN111007292A (en) * | 2019-11-26 | 2020-04-14 | 北京振兴计量测试研究所 | High-voltage amplifier device based on PXI bus and working method thereof |
| CN111007292B (en) * | 2019-11-26 | 2021-10-29 | 北京振兴计量测试研究所 | High-voltage amplifier device based on PXI bus and working method thereof |
| CN111308194A (en) * | 2019-12-06 | 2020-06-19 | 百科荣创(北京)科技发展有限公司 | Frequency characteristic tester |
| CN113541689A (en) * | 2020-04-17 | 2021-10-22 | 国控精仪（北京）科技有限公司 | Automatic calibration circuit and calibration method for analog acquisition potentiometer-free device |
| CN113541689B (en) * | 2020-04-17 | 2023-07-25 | 国控精仪（北京）科技有限公司 | Automatic calibration circuit and calibration method for analog acquisition potentiometer-free |
| CN113533838A (en) * | 2021-07-06 | 2021-10-22 | 迪力普电子(常州)有限公司 | Wiring harness comprehensive test system and method based on FPGA |
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Application publication date: 20130925 |