CN103312710A - E1 protocol converter with indication interfaces - Google Patents
E1 protocol converter with indication interfaces Download PDFInfo
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- CN103312710A CN103312710A CN2013102335043A CN201310233504A CN103312710A CN 103312710 A CN103312710 A CN 103312710A CN 2013102335043 A CN2013102335043 A CN 2013102335043A CN 201310233504 A CN201310233504 A CN 201310233504A CN 103312710 A CN103312710 A CN 103312710A
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- programmable logic
- complex programmable
- protocol converter
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Abstract
The invention discloses an E1 protocol converter with indication interfaces. The E1 protocol converter comprises a complex programmable logic device CPLD, a field programmable gate array FPGA, a microprocessor, a plurality of interface chips and indicator lamps. The interface chips include a plurality of multifunctional interface chips and E1 line interface chips, the multifunctional interface chips are conducted with the complex programmable logic device CPLD in a two-way manner, and the E1 line interface chips are conducted with the field programmable gate array FPGA in a two-way manner; the microprocessor is conducted with the complex programmable logic device CPLD in a two-way manner and is conducted with the field programmable gate array FPGA in a one-way manner; the indicator lamps are connected with the complex programmable logic device CPLD. The E1 protocol converter with the structure has the advantages that running conditions of various data time slots inside the complex programmable logic device CPLD can be timely reflected, so that corresponding adjustment can be carried out, and the complex programmable logic device CPLD is in the optimal working state.
Description
Technical field
The present invention relates to the communications field, be specifically related to have the E1 protocol converter of indication interface.
Background technology
Along with the sustainable development of computer technology and the communication technology, people constantly increase high bandwidth requirements, and the application that inserts high speed communication networks such as DDN (Digital Data Network) net, frame relay network is also more and more general.E1 is the transmission standard that China's telecommunication transmission net primary group uses, and speed is 2.048 Mb/s.Realize the mutual conversion of multichannel interface and E1 agreement, can be connected to E1 circuit at a high speed to plurality of devices simultaneously.Protocol converter can make to be in and adopt the main frame of different upper-layer protocols still to work in coordination on the communication network, finishes various Distributed Application.Have more data slot in CPLD inside, the variation of any one data slot operating position all can influence the operate as normal of CPLD, influences the operation of multi-protocol interface interface and E1 line interface.
Summary of the invention
The present invention has overcome the deficiencies in the prior art, E1 protocol converter with indication interface is provided, be provided with special indicator light, ruuning situation in order to inner each data slot of timely reflection complex programmable logic device (CPLD), to make corresponding adjustment, make it be in best operating state.
For solving above-mentioned technical problem, the present invention is by the following technical solutions: the E1 protocol converter with indication interface, comprise complex programmable logic device (CPLD), on-site programmable gate array FPGA, microprocessor, a plurality of interface chip and indicator light, described interface chip comprises versatile interface chip and E1 line interface chip, versatile interface chip wherein has a plurality of, all with the complex programmable logic device (CPLD) two-way admittance, E1 interface chip on-site programmable gate array FPGA two-way admittance; Described microprocessor and complex programmable logic device (CPLD) two-way admittance, the unidirectional conducting of microprocessor and on-site programmable gate array FPGA; Described indicator light is connected with complex programmable logic device (CPLD).
Further, described indicator light is LED light, and number is 30.
Further, described versatile interface chip model is LTC1546 or LTC1544, the versatile interface chip cross-distribution of two kinds of models.
Further, be connected with data storage RAM and the Data Buffer Memory Flash of two-way admittance on the described microprocessor.
Further, described complex programmable logic device (CPLD) carries out unidirectional the connection with keyboard.
Further, described keyboard is four to take advantage of the quadruple linkage dish.
Compared with prior art, the invention has the beneficial effects as follows:
1, the present invention is connected with a plurality of LED light at complex programmable logic device (CPLD), with the bright of indicator light with secretly indicate the operating position of 30 data time slots, in time find the operating position of data slot, then it is adjusted, thus the smooth and easy work of assurance multi-protocol interface interface and circuit chip.
2, adopt 4 * 4 keyboards, being used for receiving slot distributes that input is set is more convenient.
3, versatile interface chip LTC1546, LTC1544, the two combination constitutes Full Featured multi-protocol interface interface, support RS232, RS449, EIA530, EIA-530-A, V.35, V.36, agreement X.21, the selection of agreement can be undertaken by software fully.
Description of drawings
Fig. 1 is theory diagram of the present invention.
Embodiment
The present invention is further elaborated below in conjunction with accompanying drawing, and embodiments of the invention are not limited thereto.
Embodiment:
As shown in Figure 1, the present invention includes complex programmable logic device (CPLD), on-site programmable gate array FPGA, microprocessor, a plurality of interface chip and indicator light, indicator light is LED light, number is 30, is connected with data storage RAM and the Data Buffer Memory Flash of two-way admittance on the microprocessor.Complex programmable logic device (CPLD) wherein carries out unidirectional the connection with keyboard, and keyboard is four to take advantage of the quadruple linkage dish.The interface chip of present embodiment comprises versatile interface chip and E1 line interface chip, versatile interface chip wherein has a plurality of, all with the complex programmable logic device (CPLD) two-way admittance, E1 interface chip on-site programmable gate array FPGA two-way admittance, versatile interface chip model is LTC1546 or LTC1544, the versatile interface chip cross-distribution of two kinds of models.The microprocessor of present embodiment and complex programmable logic device (CPLD) two-way admittance, the unidirectional conducting of microprocessor and on-site programmable gate array FPGA; Described indicator light is connected with complex programmable logic device (CPLD).
At complex programmable logic device (CPLD) LED light is installed, totally 30, is used to refer to the operating position of 30 data time slots.When the LED lamp is lighted, represent that this time slot uses; When the LED lamp does not work, represent that this time slot is for idle.Judge more accurate convenience, guarantee the normal operation at multi-protocol interface interface.
Just can realize this invention as mentioned above.
Claims (6)
1. the E1 protocol converter that has the indication interface, it is characterized in that: comprise complex programmable logic device (CPLD), on-site programmable gate array FPGA, microprocessor, a plurality of interface chip and indicator light, described interface chip comprises versatile interface chip and E1 line interface chip, versatile interface chip wherein has a plurality of, all with the complex programmable logic device (CPLD) two-way admittance, E1 interface chip on-site programmable gate array FPGA two-way admittance; Described microprocessor and complex programmable logic device (CPLD) two-way admittance, the unidirectional conducting of microprocessor and on-site programmable gate array FPGA; Described indicator light is connected with complex programmable logic device (CPLD).
According to claim 1 have the indication interface the E1 protocol converter, it is characterized in that: described indicator light is LED light, number is 30.
According to claim 1 have the indication interface the E1 protocol converter, it is characterized in that: described versatile interface chip model is LTC1546 or LTC1544, the versatile interface chip cross-distribution of two kinds of models.
4. the E1 protocol converter with indication interface according to claim 1 is characterized in that: the data storage RAM and the Data Buffer Memory Flash that are connected with two-way admittance on the described microprocessor.
5. according to any described E1 protocol converter with indication interface of claim 1-4, it is characterized in that: described complex programmable logic device (CPLD) carries out unidirectional the connection with keyboard.
6. the E1 protocol converter with indication interface according to claim 5, it is characterized in that: described keyboard is four to take advantage of the quadruple linkage dish.
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CN2013102335043A CN103312710A (en) | 2013-06-14 | 2013-06-14 | E1 protocol converter with indication interfaces |
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CN2013102335043A CN103312710A (en) | 2013-06-14 | 2013-06-14 | E1 protocol converter with indication interfaces |
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101106430A (en) * | 2006-07-11 | 2008-01-16 | 上海科泰信息技术有限公司 | Optical access system of protocol converter |
CN201403101Y (en) * | 2009-03-19 | 2010-02-10 | 天津禄普电子科技有限公司 | E1/Ethernet data conversion unit |
CN103595689A (en) * | 2012-08-13 | 2014-02-19 | 成都思迈科技发展有限责任公司 | Multi-interface to E1 protocol converter |
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2013
- 2013-06-14 CN CN2013102335043A patent/CN103312710A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101106430A (en) * | 2006-07-11 | 2008-01-16 | 上海科泰信息技术有限公司 | Optical access system of protocol converter |
CN201403101Y (en) * | 2009-03-19 | 2010-02-10 | 天津禄普电子科技有限公司 | E1/Ethernet data conversion unit |
CN103595689A (en) * | 2012-08-13 | 2014-02-19 | 成都思迈科技发展有限责任公司 | Multi-interface to E1 protocol converter |
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Application publication date: 20130918 |