CN203289471U - A combined Ethernet gateway - Google Patents
A combined Ethernet gateway Download PDFInfo
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- CN203289471U CN203289471U CN2013203381203U CN201320338120U CN203289471U CN 203289471 U CN203289471 U CN 203289471U CN 2013203381203 U CN2013203381203 U CN 2013203381203U CN 201320338120 U CN201320338120 U CN 201320338120U CN 203289471 U CN203289471 U CN 203289471U
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- interface chip
- programmable gate
- array fpga
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Abstract
The utility model discloses a combined Ethernet gateway comprising a microcontroller, a wireless transmitting and receiving module, a random access memory SDRAM, an Ethernet PHY, a USB device, a complex programmable logic device CPLD, a field programmable gate array FPGA, a multifunctional interface chip, and a E1 line interface chip. The wireless transmitting and receiving module, the random access memory SDRAM, the Ethernet PHY, and the USB device are all communicated with the microcontroller bidirectionally. The microcontroller, the field programmable gate array FPGA, and the multifunctional interface chip are all communicated with the complex programmable logic device CPLD bidirectionally. The microcontroller is communicated with the field programmable gate array FPGA unidirectionally. The field programmable gate array FPGA is also connected with the E1 line interface chip conducted bidirectionally. By the above structure, the combined Ethernet gateway achieves connection and access conversion between point-to-multipoint devices, and achieves complete low-cost access from a business supplier central point to a user-end device as well as far-end devices.
Description
Technical field
The utility model relates to the communications field, is specifically related to the assembly type ethernet gateway.
Background technology
Ethernet is to have now the most general communication protocol standard that local area network (LAN) adopts now.Gateway is to adopt between the network of different architecture or agreement while carrying out intercommunication, is used for providing the facility of the Web-compatible functions such as protocol conversion, Route Selection, exchanges data.Using different communication protocol, data format or language, even between the diverse two kinds of systems of architecture, gateway is a translater., owing to can not carrying out exchanges data between different agreement, when transmitting, Ethernet and other network usually all can use gateway.Ethernet gateway equipment in the past is all point-to-point data access, back-to-back data transaction between two equipment.This kind ethernet gateway equipment can not with remote equipment together, realize a complete set of low-cost access solution from the service provider central point to client device, increased the cost of ethernet gateway.
The utility model content
The utility model has overcome the deficiencies in the prior art, the assembly type ethernet gateway is provided, accomplish connection and access conversion between the point-to-multipoint conversion equipment, and and these remote equipments together, realized a complete set of low cost access from the service provider central point to client device.
for solving above-mentioned technical problem, the utility model is by the following technical solutions: the assembly type ethernet gateway, comprise microcontroller, radio receiving transmitting module, random asccess memory SDRAM, ethernet PHY, USB device, complex programmable logic device (CPLD), on-site programmable gate array FPGA, versatile interface chip and E1 line interface chip, described radio receiving transmitting module, random asccess memory SDRAM, ethernet PHY and USB device all with the microcontroller diconnected, described microcontroller, on-site programmable gate array FPGA and versatile interface chip all with the complex programmable logic device (CPLD) diconnected, described microcontroller and on-site programmable gate array FPGA unilaterally connected, also be connected with the E1 line interface chip of two-way admittance on on-site programmable gate array FPGA.
Further, the model of described versatile interface chip is LTC1546 or LTC1544.
Further, be connected with the Data Buffer Memory SDRAM of two-way admittance on described microcontroller.
Further, the model of described radio receiving transmitting module is CC2520.
Further, the model of described microcontroller is AT91SAM9260.
Further, the model of described on-site programmable gate array FPGA is EP3C25F324C8.
Compared with prior art, the beneficial effects of the utility model are:
1, the utility model can be accomplished connection and the access conversion between the point-to-multipoint conversion equipment, and and these remote equipments together, realized a complete set of low cost access from the service provider central point to client device.
2, this assembly type gateway is compared with other access device, and the cost of the every gigabit of Ethernet service is lower.By the PDH/SDH/SONET network that spreads all over, the carrier-class Ethernet service is sent to those and can not obtain the website of existing Ethernet service.
Description of drawings
Fig. 1 is theory diagram of the present utility model.
Embodiment
Below in conjunction with accompanying drawing, the utility model is further elaborated, embodiment of the present utility model is not limited to this.
Embodiment:
As shown in Figure 1, the utility model comprises microcontroller, radio receiving transmitting module, random asccess memory SDRAM, ethernet PHY, USB device, complex programmable logic device (CPLD), on-site programmable gate array FPGA, versatile interface chip and E1 line interface chip.The radio receiving transmitting module of the present embodiment, random asccess memory SDRAM, ethernet PHY and USB device all with the microcontroller diconnected, described microcontroller, on-site programmable gate array FPGA and versatile interface chip all with the complex programmable logic device (CPLD) diconnected.The microcontroller of the present embodiment and on-site programmable gate array FPGA unilaterally connected, also be connected with the E1 line interface chip of two-way admittance on on-site programmable gate array FPGA.
The model of versatile interface chip used is LTC1546 or LTC1544, and two kinds of model combinations form Full Featured multi-protocol interface interface, supports RS232, RS449, EIA530, EIA-530-A, V.35, V.36, agreement X.21, the selection of agreement can be undertaken by software fully.The model of radio receiving transmitting module is CC2520, carries out wireless data transceiving.The model of on-site programmable gate array FPGA is EP3C25F324C8.Be connected with the Data Buffer Memory SDRAM of two-way admittance on microcontroller, the model of microcontroller is AT91SAM9260.In addition, the model of random asccess memory SDRAM, ethernet PHY, complex programmable logic device (CPLD), on-site programmable gate array FPGA and E1 line interface chip is respectively HY57V64162, DM9161, EPM7256 AETCl44-7, EP3C25F324C8 and XRT82D20.
The utility model can be with the multiple spot conversion equipment all by general versatile interface chip and the access of E1 line interface chip, change ethernet gateway equipment in the past is with point-to-point data access, accomplish connection and access conversion between the point-to-multipoint conversion equipment, and and remote equipment together, realized a complete set of low cost access from the service provider central point to client device.This assembly type gateway is compared with other access device, and the cost of the every gigabit of Ethernet service is lower, and practicality is stronger.
Just can realize this utility model as mentioned above.
Claims (6)
1. assembly type ethernet gateway, it is characterized in that: comprise microcontroller, radio receiving transmitting module, random asccess memory SDRAM, ethernet PHY, USB device, complex programmable logic device (CPLD), on-site programmable gate array FPGA, versatile interface chip and E1 line interface chip, described radio receiving transmitting module, random asccess memory SDRAM, ethernet PHY and USB device all with the microcontroller diconnected, described microcontroller, on-site programmable gate array FPGA and versatile interface chip all with the complex programmable logic device (CPLD) diconnected, described microcontroller and on-site programmable gate array FPGA unilaterally connected, also be connected with the E1 line interface chip of two-way admittance on on-site programmable gate array FPGA.
2. assembly type ethernet gateway according to claim 1, it is characterized in that: the model of described versatile interface chip is LTC1546 or LTC1544.
3. assembly type ethernet gateway according to claim 1, is characterized in that: the Data Buffer Memory SDRAM that is connected with two-way admittance on described microcontroller.
4. assembly type ethernet gateway according to claim 1, it is characterized in that: the model of described radio receiving transmitting module is CC2520.
5. assembly type ethernet gateway according to claim 1, it is characterized in that: the model of described microcontroller is AT91SAM9260.
6. according to claim 1-5 described assembly type ethernet gateway of any one, it is characterized in that: the model of described on-site programmable gate array FPGA is EP3C25F324C8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013203381203U CN203289471U (en) | 2013-06-14 | 2013-06-14 | A combined Ethernet gateway |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013203381203U CN203289471U (en) | 2013-06-14 | 2013-06-14 | A combined Ethernet gateway |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203289471U true CN203289471U (en) | 2013-11-13 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2013203381203U Expired - Fee Related CN203289471U (en) | 2013-06-14 | 2013-06-14 | A combined Ethernet gateway |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103297335A (en) * | 2013-06-14 | 2013-09-11 | 成都思迈科技发展有限责任公司 | Improved structure of gateway of ethernet network |
-
2013
- 2013-06-14 CN CN2013203381203U patent/CN203289471U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103297335A (en) * | 2013-06-14 | 2013-09-11 | 成都思迈科技发展有限责任公司 | Improved structure of gateway of ethernet network |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20131113 Termination date: 20140614 |
|
| EXPY | Termination of patent right or utility model |