CN103311287B - RC-IGBT (Reverse-Conducting Insulated-Gate Bipolar Transistor) provided with series P floating buried layer - Google Patents
RC-IGBT (Reverse-Conducting Insulated-Gate Bipolar Transistor) provided with series P floating buried layer Download PDFInfo
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- CN103311287B CN103311287B CN201310076733.9A CN201310076733A CN103311287B CN 103311287 B CN103311287 B CN 103311287B CN 201310076733 A CN201310076733 A CN 201310076733A CN 103311287 B CN103311287 B CN 103311287B
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Abstract
The invention discloses an RC-IGBT (Reverse-Conducting Insulated-Gate Bipolar Transistor) provided with a series P floating buried layer, which belongs to the field of semiconductor power devices. A P floating layer (10) (positioned in an N buffer layer (7) above a medium buried layer (12)), the medium buried layer (12) (positioned between an N collector region (8) and a P collector region (9)) and the series P floating buried layer (11) (positioned on the surface or inside a part or all of the N buffer layer (7) are added on the basis of the conventional RC-IGBT to restrain and even eliminate the phenomenon of Snapback during forward conduction and control the injection dose of a back hole in a reverse recovery process, so that the reverse recovery feature of the RC-IGBT is improved. As proved by simulation verification, due to the adoption of the novel RC-IGBT, the phenomenon of Snapback can be eliminated fully, meanwhile, a very large soft factor (S) can be provided, voltage overshoot occurring during reverse recovery is avoided, and the comprehensive performance of the device is improved greatly.
Description
Technical field
The invention belongs to field of semiconductor, relate to insulated gate bipolar transistor (insulated-gate bipolar transistor is called for short IGBT).
Background technology
PIN(Positive-Intrinsic Negative) diode (as shown in Figure 1) has PN junction potential barrier therefore can bear very high oppositely withstand voltage, has leakage current little, and the feature such as have stable high-temperature performance.When forward conduction, it adopts bipolarity to conduct electricity in addition, under high pressure level, have lower conduction voltage drop and conduction loss, is widely used in power circuit field.Particularly along with the extensive use of mesohigh IGBT, need a diode playing the effects such as afterflow, buffering, absorption in parallel with it, to pass through the reactive current in load, reduce the charging interval of electric capacity, suppress, because of the instantaneous oppositely high voltage produced in device or module stray inductance of load current, its demand to be increased further simultaneously.Due to the frequency of Modern Power Electronic Devices and improving constantly of performance, match to make the switching process of diode and power device, these diodes must have the ability opened fast and turn off fast on the basis with lower on-state voltage drop, namely there is short trr reverse recovery time, less reverse recovery current IRM, has soft reverse recovery characteristic simultaneously.And for traditional PIN diode owing to there are a large amount of excess carrier in the drift region when its forward conduction, high reverse recovery current IRM can be caused when turn off process, in addition because depletion layer expansion in turn off process is too fast, in drift region, charge carrier reduces rapidly, the Snap-off phenomenon of electric current can be caused, high di/dt brings again the fluctuation of anti-recovery voltage simultaneously, then causes a series of impact to whole module and system.
FCE(Field Charge Extraction) diode (as shown in Figure 2) is exactly hard switching characteristic in order to improve traditional PIN diode, by introducing one section of P+ collector electrode in N-Collector district, in turn off process, P+ collector electrode can inject a part of hole further in drift region, with in supplementary drift region by the charge carrier extracted rapidly.The electric current of diode slowly can be turned off, prevent too high di/dt, thus substantially increase the soft recovery characteristics of diode.
CIBH(Controlled Injection of Backside Holes) diode is as shown in Figure 3, the hard switching characteristic in order to improve traditional PIN diode equally, the implantation dosage in hole, the back side in turn off process is controlled by introducing a series of P floating floor in N-buffer district, reach the object improving diode reverse recovery characteristic, this CIBH diode is by being applied in its superior performance of IGBT monolithic and module verification.
IGBT(Insulate Gate Bipolar Transistor, insulated gate bipolar transistor) input impedance of existing MOSFET is high, control power is little, drive circuit is simple, the advantage that switching speed is high, the current density again with bipolar power transistor is large, saturation pressure reduces, the advantage that current handling capability is strong, so be widely used in field of power electronics, but IGBT is an one way conducting device, need an antiparallel diode to bear reverse voltage when application, this adds increased the manufacturing cost of IGBT, and bring encapsulation, the difficult problems such as welding.The people such as E.Napoli in 2002 propose and a kind ofly the IGBT of reverse-conducting can be called RC-IGBT, and this RC-IGBT achieves the integrated of IGBT and diode by the method introducing N-collector electrode on collector electrode.Traditional RC-IGBT(reverse-conducting insulated-gate bipolar transistor, reverse-conducting insulated gate bipolar transistor npn npn) as shown in Figure 4, collector electrode is made up of P-Collector and N-Collector.But this traditional RC-IGBT there will be a dynatron effect (snapback) when forward conduction.Solution snapback phenomenon that M.Rahimo etc. were artificial has afterwards invented again BIGT(Bi-mode Insulated Gate Transistor) as shown in Figure 5.This device is on traditional RC-IGBT basis, by increasing primitive unit cell area and it being divided into IGBT part and RC-IGBT part to solve snapback phenomenon, but due to large cellular size, (this patent adopts 600 μm to emulate, more than 2500 μm are needed) to thoroughly eliminate snapback, turn-off power loss can be increased again and bring temperature local to cross high integrity problem, making the combination property of device need to be further enhanced.
Summary of the invention
The present invention proposes a kind of RC-IGBT with Series P floating buried regions, while being intended to not affect other performance parameters, RC-IGBT can be made thoroughly to eliminate snapback phenomenon time on the one hand under forward conduction IGBT pattern, under reverse shutoff diode pattern, make it have the reverse recovery characteristic of ultra-soft on the other hand.
The RC-IGBT with Series P floating buried regions that the present invention proposes, between N-Collector and P-Collector of traditional RC-IGBT, introduce the electric isolution that dielectric buried layer realizes between N-Collector and P-Collector, and N-type resilient coating (n-buffer) the middle introducing p floating layer current bolt above dielectric buried layer, device is when forward conduction, the P floating layer current bolt introduced can block electrons current direction N-type collector electrode (N-Collector), electronic current is made to concentrate on P type collector electrode (P-Collector), such P-Collector district is not by the impact in N-Collector district, thus this Device singulation has been become IGBT part and DIODE(diode) part.When forward conduction, IGBT can work alone like this, well inhibits Snapback phenomenon.The RC-IGBT with Series P floating buried regions that the present invention proposes, between the drift region and resilient coating of traditional RC-IGBT, (or inner at resilient coating) introduces Series P floating buried regions spaced apart simultaneously, to reach the generation eliminating Snapback phenomenon.The RC-IGBT with Series P floating buried regions that the present invention proposes not only can thoroughly eliminate Snpaback phenomenon, can have the very large softness factor (S) simultaneously, avoid the voltage overshoot occurred during Reverse recovery, the combination property of device is improved greatly.
Technical scheme of the present invention is as follows:
Have a RC-IGBT for Series P floating buried regions, its basic structure as shown in Figure 6, comprises in the top layer of drift region, N-drift region 6, N-6 bottom with drift region, equally distributed multiple P type tagma 5, N-6 and has the N resilient coating 7 contacted with N-drift region 6; Have bottom N resilient coating 7 contact with N resilient coating 7 and the composite collector be made up of N collector region 8 and P collector region 9 in a lateral direction; At least there is in each P type tagma 5 surface, active area 1, a N+ active area 1, N+ contact with metal emitting 4; The surface of the N-drift region 6 between adjacent two P type tagmas 5 has a polygate electrodes 2, there is between the surface of polygate electrodes 2 and N-drift region 6 silicon dioxide gate oxide, there is between polygate electrodes 2 and metal emitting 4 silicon dioxide field oxide (in Figure of description, silicon dioxide gate oxide and silicon dioxide field oxide do not do strict differentiation, have employed same Reference numeral 3 to represent earth silicon material).Also have a dielectric buried layer 12 between described N collector region 8 and P collector region 9, described dielectric buried layer 12 realizes the electric isolution of N collector region 8 and P collector region 9; Also have a P floating layer 10 in N-type resilient coating 7 above described dielectric buried layer 12, N-type resilient coating 7 is divided into the N-type resilient coating between N collector region 8 and N-drift region 6 and the N-type resilient coating two parts between P collector region 9 and N-drift region 6 by described P floating layer 10.The described RC-IGBT with Series P floating buried regions also has Series P floating buried regions 11, be distributed in the surface of the N-type resilient coating between N collector region 8 and N-drift region 6, described Series P floating buried regions 11 also can be distributed in the centre of the N-type resilient coating between N collector region 8 and N-drift region 6 uniform intervals described Series P floating buried regions 11 uniform intervals.
The novel RC-IGBT device that the present invention proposes is on the basis of traditional RC-IGBT, increases p floating layer 10 and Series P floating buried regions 11 and dielectric buried layer 12, increases resistance and the electric current of collector area, make P-Collector/N-buffer junction voltage IR
buffermore easily reach 0.7V, effectively eliminate Snapback phenomenon, these P floating layers can substantially increase the reverse soft recovery characteristics of RC-IGBT as CIBH diode simultaneously.Need to further illustrate, described dielectric buried layer 12 material can be SiO
2, Si
3n
4, HfO
2or benzocyclobutene (BCB).In addition, this have a series of P floating layer and also entirely can be placed in (as Fig. 7) in N resilient coating (N-buffer), also (as Fig. 8) on whole N-buffer can be extended to, can also extend to (as Fig. 9) within whole N-buffer, the RC-IGBT(of groove grid trench structure can also be used for as Figure 10,11) and superjunction super junction RC-IGBT(as Figure 12,13) among.
General principle of the present invention is as follows:
The RC-IGBT with Series P floating buried regions that the present invention proposes, on traditional RC-IGBT basis, increase uniform series P floating buried regions 11(spaced apart between N-drift region 6 and N resilient coating 7, or be positioned at the inside of N resilient coating 7) and dielectric buried layer 12(between N collector region 8 and P collector region 9, realize the electric isolution between N collector region 8 and P collector region 9), the effect of P floating buried regions has three: the first, and the Series P floating layer between N-drift region 6 and N resilient coating 7 rises increases collector resistance R
buffereffect, make P-Collector/N-buffer junction voltage IR
buffermore easily reach 0.7V thus conducting faster, suppress the generation of Snapback phenomenon.Second, its effect of Series P floating layer between N resilient coating 7 inside is eliminate Snapback phenomenon equally, but its mechanism is different, it is then by block electrons current direction N-Collector, electronic current is made to concentrate on P-Collector, thus increase the electric current I in P-Collector district, thus make P-Collector/N-buffer junction voltage IR
buffermore easily reach 0.7V, well inhibit Snapback phenomenon.3rd, in reversely restoring process, all its working mechanisms of P floating layer are similar with the CIBT diode of people's inventions such as H.P.Felsl, control the injection in hole, back, thus improve the reverse recovery characteristic of RC-IGBT.Proved by simulating, verifying, this novel RC-IGBT not only can thoroughly eliminate Snpaback phenomenon, can have the very large softness factor (S) simultaneously, avoid the voltage overshoot occurred during Reverse recovery.It is to be noted there is the introducing of this series of P floating layer certain distance all apart due in the middle of it, there is very large electric current space, therefore the extraction of collector electrode to stored charge in N-drift region can not be affected in turn off process.The introducing of dielectric buried layer 12 prevents from P floating layer 10 to be connected with collector electrode to cause the impact of withstand voltage aspect in addition, and dielectric buried layer 12 also has certain current blocking effect simultaneously.
In sum, a kind of RC-IGBT structure with a series of floating buried regions that the present invention proposes, when substantially not affecting other parameters of device, can thoroughly eliminate snapback phenomenon, increase the Reverse recovery softness factor, thus improve the combination property of RC-IGBT.
Accompanying drawing explanation
Fig. 1 is traditional PIN diode structure schematic diagram.
Fig. 2 is FCE diode structure schematic diagram.
Fig. 3 is CIBH diode structure schematic diagram.
In Fig. 1 to Fig. 3: 5 is emitter P districts, and 6 is N-drift regions, and 7 is N resilient coatings, and 8 is N collector region, and 10 is P floating buried regions.
Fig. 4 is traditional RC-IGBT structural representation.
Fig. 5 is BIGT structural representation.
Fig. 6 is the structural representation (Series P floating buried regions 11 is positioned at part N resilient coating 7 surface) with the RC-IGBT of Series P floating buried regions that the present invention proposes.
Fig. 7 is the structural representation (it is inner that Series P floating buried regions 11 is positioned at part N resilient coating 7) with the RC-IGBT of Series P floating buried regions that the present invention proposes.
Fig. 8 is the structural representation (Series P floating buried regions 11 is positioned at whole N resilient coating 7 surface) with the RC-IGBT of Series P floating buried regions that the present invention proposes.
Fig. 9 is the structural representation (it is inner that Series P floating buried regions 11 is positioned at whole N resilient coating 7) with the RC-IGBT of Series P floating buried regions that the present invention proposes.
Figure 10 is the structural representation (Series P floating buried regions 11 is positioned at part N resilient coating 7 surface, and polygate electrodes 2 is trench gate <trench> structure) with the RC-IGBT of Series P floating buried regions that the present invention proposes.
Figure 11 is the structural representation (it is inner that Series P floating buried regions 11 is positioned at part N resilient coating 7, and polygate electrodes 2 is trench gate <trench> structure) with the RC-IGBT of Series P floating buried regions that the present invention proposes.
Figure 12 be the present invention propose there is the RC-IGBT of Series P floating buried regions structural representation (Series P floating buried regions 11 be positioned at part N resilient coating 7 surface, polygate electrodes 2 is trench gate <trench> structure, and drift region is super-junction structure).
Figure 13 is that (it is inner that Series P floating buried regions 11 is positioned at part N resilient coating 7 to the structural representation with the RC-IGBT of Series P floating buried regions that proposes of the present invention, polygate electrodes 2 is trench gate <trench> structure, and drift region is super-junction structure).
In Fig. 4 to Figure 13: 1 is N+ active area, and 2 is polygate electrodes, and 3 is silicon dioxide layers, 4 is metal emitting, 5 is P type tagmas, and 6 is N-drift regions, and 7 is N resilient coatings, 8 is N collector region, 9 is P collector region, and 10 is p floating layers, and 11 is Series P floating buried regions, 12 is dielectric buried layers, and 13 is P type bars (the P type post of super-junction structure) of genesis analysis
The BIGT of Figure 14 to be length be 600um, long traditional RC-IGBT for 300um, the long comparison diagram with the breakover voltage of the snapback of RC-IGBT at 25 DEG C and-40 DEG C of Series P floating buried regions for 75um, 300um.
Wherein Con-RC-IGBT is that tradition is against leading insulated gate bipolar transistor, BIGT is double mode gated transistor, Proposed is the RC-IGBT with Series P floating buried regions provided by the invention, abscissa is forward conduction voltage drop (Forward voltage drop Von), and ordinate is collector current (Collector current).
Figure 15 is traditional RC-IGBT of the RC-IGBT with Series P floating buried regions that length is respectively 75um, 300um, and 600um BIGT is at 100A/cm
2time switch off current model comparision figure.
Wherein Conventional RC-IGBT is that tradition is against leading insulated gate bipolar transistor, BIGT is double mode gated transistor, Proposed is the RC-IGBT with Series P floating buried regions provided by the invention, vignette is provided by the inventionly have current draw figure in the turn off process of the RC-IGBT of Series P floating buried regions, abscissa is time (Time), ordinate is collector current (Collector current), " Switching Simulation " expression " switch transition simulation " in figure, " IBGTMode " expression " IBGT type ".
Figure 16 is the RC-IGBT with P floating buried regions, the conduction voltage drop comparison diagram of traditional RC-IGBT, BIGT and traditional PIN diode.
Wherein Conven RC-IGBT is that tradition is against leading insulated gate bipolar transistor, BIGT is double mode gated transistor, Proposed is the RC-IGBT with Series P floating buried regions provided by the invention, Conven PIN is traditional PIN diode, and vignette is the reverse-conduction current distribution map with the RC-IGBT of Series P floating buried regions provided by the invention.
Figure 17 is the RC-IGBT with P floating buried regions, the reverse recovery current waveform comparison figure of traditional RC-IGBT, BIGT and traditional PIN diode.
Wherein Conventional RC-IGBT is that tradition is against leading insulated gate bipolar transistor, BIGT is double mode gated transistor, Proposed is the RC-IGBT with Series P floating buried regions, Conventional PIN provided by the invention is traditional PIN diode.
Figure 18 is the RC-IGBT with Series P floating buried regions that the present invention proposes, the Reverse recovery voltage waveform comparison diagram of traditional RC-IGBT, BIGT and traditional PIN diode.
Wherein Conventional RC-IGBT is that tradition is against leading insulated gate bipolar transistor, BIGT is double mode gated transistor, Proposed is the RC-IGBT with Series P floating buried regions, Conventional PIN provided by the invention is traditional PIN diode.
Figure 19 has the RC-IGBT of Series P floating buried regions in T1, T4 moment (Figure 17 mark the moment), traditional PIN diode, the comparison diagram of the electric current distribution of RC-IGBT, BIGT respectively.
Wherein Conventional RC-IGBT is traditional against leading insulated gate bipolar transistor, and BIGT is double mode gated transistor, and Proposed RC-IGBT is the RC-IGBT with Series P floating buried regions provided by the invention.
Figure 20 has the RC-IGBT of Series P floating buried regions in T1 ~ T5 moment (Figure 17 mark the moment), traditional PIN diode, the maximum electric field of RC-IGBT, BIGT, maximum electric field variable quantity, and the comparison diagram between depletion layer variable quantity respectively.
What wherein Figure 20 (a) provided is the variation diagram with the RC-IGBT of Series P floating buried regions provided by the invention, the variation diagram of traditional PIN diode that what Figure 20 (b) provided is, the variation diagram of what Figure 20 (c) provided is BIGT, the variation diagram of what Figure 20 (d) provided is traditional RC-IGBT.
Embodiment
Have a RC-IGBT for Series P floating buried regions, its basic structure as shown in Figure 6, comprises in the top layer of drift region, N-drift region 6, N-6 bottom with drift region, equally distributed multiple P type tagma 5, N-6 and has the N resilient coating 7 contacted with N-drift region 6; Have bottom N resilient coating 7 contact with N resilient coating 7 and the composite collector be made up of N collector region 8 and P collector region 9 in a lateral direction; At least there is in each P type tagma 5 surface, active area 1, a N+ active area 1, N+ contact with metal emitting 4; The surface of the N-drift region 6 between adjacent two P type tagmas 5 has a polygate electrodes 2, there is between the surface of polygate electrodes 2 and N-drift region 6 silicon dioxide gate oxide, there is between polygate electrodes 2 and metal emitting 4 silicon dioxide field oxide (in Figure of description, silicon dioxide gate oxide and silicon dioxide field oxide do not do strict differentiation, have employed same Reference numeral 3 to represent earth silicon material).Also have a dielectric buried layer 12 between described N collector region 8 and P collector region 9, described dielectric buried layer 12 realizes the electric isolution of N collector region 8 and P collector region 9; Also have a P floating layer 10 in N-type resilient coating 7 above described dielectric buried layer 12, N-type resilient coating 7 is divided into the N-type resilient coating between N collector region 8 and N-drift region 6 and the N-type resilient coating two parts between P collector region 9 and N-drift region 6 by described P floating layer 10.The described RC-IGBT with Series P floating buried regions also has Series P floating buried regions 11, be distributed in the surface of the N-type resilient coating between N collector region 8 and N-drift region 6, described Series P floating buried regions 11 also can be distributed in the centre of the N-type resilient coating between N collector region 8 and N-drift region 6 uniform intervals described Series P floating buried regions 11 uniform intervals.
The novel RC-IGBT device that the present invention proposes is on the basis of traditional RC-IGBT, increase P floating layer 10, Series P floating buried regions 11 and dielectric buried layer 12, under forward conduction IGBT pattern, increase resistance and the electric current of collector area, oppositely turn off the increase anti-recovery softness factor under diode operation pattern.
Can obtain by MEDICI simulation software, to provided traditional PIN diode as shown in Figure 1, traditional RC-IGBT as shown in Figure 4, BIGT as shown in Figure 5, the RC-IGBT with Series P floating buried regions has as shown in Figure 6 carried out emulating comparing, the simulation parameter of the 1200V RC-IGBT of analogue simulation thin slice manufacture technics, traditional RC-IGBT and BIGT is N-drift region thickness is 120um, and doping content is 7 × 10
13cm
-3, carrier lifetime is 10us, and ambient temperature is 300K, and the length of traditional RC-IGBT is 300um, and wherein the length of N collector region and P collector region is 600um than being 1:4, BIGT length, and the length with the RC-IGBT of Series P floating buried regions is 75um.The difference of the RC-IGBT and traditional RC-IGBT and BIGT with Series P floating buried regions provided by the present invention is that novel RC-IGBT adds P floating layer 10, Series P floating buried regions 11 and dielectric buried layer 12, and the length of this device is less.Because P floating layer 10 can stop electron stream to N collector region when forward conduction, the N resilient coating that electronics will be accumulated on the right of P floating layer, thus the electric current added in N resilient coating, Series P floating buried regions 11 provides an electronic barrier, adds the resistance of collector region.When Reverse recovery, these P floating buried regions can improve again the anti-recovery characteristics of diode.
The BIGT of Figure 14 to be length be 600um, long traditional RC-IGBT for 300um, long breakover voltage (the Δ V with the snapback of the RC-IGBT of Series P floating buried regions for 75um, 300um
sB) comparison diagram when 25 DEG C and-40 DEG C, there is snapback phenomenon when electric current is about 2.5A in BIGT 25 DEG C time, the degree Δ V of generation snapback phenomenon
sB=1.2V.Tradition RC-IGBT is that snapback phenomenon occurs about 3A at electric current, Δ V
sB=1.5V, there is snapback phenomenon Δ V in BIGT-40 DEG C time when electric current is 5A
sBsnapback phenomenon Δ V is there is in=1.3V, traditional RC-IGBT when electric current is 6A
sB=1.6V.Can find out that temperature is lower, snapback phenomenon is serious all the more, and BIGT is than the Δ V of traditional RC-IGBT
sBlower, can partly suppress snapback phenomenon, if need eliminate completely, then need to widen size (more than 2500um) further, but the turn-off performance of BIGT can be affected again like this.For the RC-IGBT that the present invention has Series P floating buried regions, 25 DEG C time, though when length is 75um or when length is 300um Δ V
sB=0V, completely eliminates snapback phenomenon.Even and if-40 DEG C time, do not have snapback phenomenon to occur too.Therefore snapback phenomenon can be eliminated well by adding this Series P floating buried regions.
Figure 15 is long traditional RC-IGBT for 300um, and the long BIGT for 600um is 100A/cm with the long RC-IGBT with Series P floating buried regions for 75um in current density
2, forward voltage drop turns off Property comparison schematic diagram under being the same case of 2V, turn-off time is when being defined as IGBT shutoff, collector current drops to the time required for 10% from 90%, through simulating, verifying, the turn-off time of tradition RC-IGBT is 2.4us, the turn-off time of BIGT is 1.6us, the RC-IGBT turn-off time with Series P floating buried regions in this paper is 1us, about 55% is reduced than traditional RC-IGBT turn-off time, about 32% is reduced than BIGT, from figure, vignette it can also be seen that, the current draw pattern with the RC-IGBT of Series P floating buried regions that the present invention proposes is two kinds, one is that short circuit is extracted, a kind of is NPN extraction.Be in P floating buried regions 11 between N-buffer and drift region owing to also there is a lot of gap between them, current line can freely be passed through, therefore little to extraction time effects.And be in P floating layer 10 in N-buffer and can, as the base of NPN transistor, help to extract the excess carrier above P-Collector.And for traditional RC-IGBT and BIGT, although they exist short circuit and extract path, electric current mainly concentrates on P-Collector region, so the speed of extraction can be slower.
Figure 16 is the RC-IGBT with Series P floating buried regions, the conduction voltage drop comparison diagram of traditional RC-IGBT, BIGT and traditional PIN diode, and from figure, we can obtain, when current density is 100A/cm
2time, the conduction voltage drop of four kinds of devices is respectively 1.04V, 1.08V, 1.26V, 0.88V, and the forward voltage drop with the RC-IGBT of Series P floating buried regions is slightly higher than traditional PIN diode, but relative to other two structures, reverse-conducting pressure drop is lower.In figure, vignette gives the electric current distribution of the RC-IGBT of this new construction, can find out homogeneous current distribution, and current line can smoothly by the space between P floating buried regions 11.
Figure 17 is the RC-IGBT with Series P floating buried regions, and the reverse recovery current waveform comparison figure of traditional RC-IGBT, BIGT and traditional PIN diode, the softness factor of four kinds of devices is respectively 7.1,4.6,4.5,0.3 as seen from the figure.Can find out, the softness factor other device relative with the RC-IGBT of Series P floating buried regions provided by the invention improves 54%, 55% respectively, and 23 times.For ultra-soft Reverse recovery, traditional PI N is not only very hard Reverse recovery, but also there is the phenomenon such as Snap-off and current fluctuation.
Figure 18 is the RC-IGBT with Series P floating buried regions, traditional RC-IGBT, the Reverse recovery voltage waveform comparison diagram of BIGT and traditional PIN diode, as seen from the figure except the RC-IGBT with Series P floating buried regions provided by the invention, all there is the situation such as voltage overshoot and fluctuation in other device, for traditional PIN diode, this phenomenon reason is because the Snap-off of electric current and high di/dt causes, and for BIGT and traditional RC-IGBT, the mechanism of the fluctuation of reverse voltage can clearly be found out by Figure 19, because in reversely restoring process, the imbalance of depletion layer causes, and basic reason is to suppress Snapback phenomenon, their size must be sufficiently large, large size result in again the skewness of electric current in device, the concussion of current/voltage is result in the extraction process of Reverse recovery charge carrier.
Figure 20 is the RC-IGBT with Series P floating buried regions, traditional RC-IGBT, BIGT and traditional PIN diode at Reverse recovery T1 ~ T5(as Figure 17, shown in 18) comparison diagram in process between maximum field variable quantity and depletion layer variable quantity.To the RC-IGBT(with Series P floating buried regions provided by the invention as Suo Shi Figure 20 (a)), maximum electric field Emax=150KV/cm, Δ Emax=50KV/cm, Δ Wdeple=40 μm.To traditional PIN diode (as Suo Shi Figure 20 (b)), maximum electric field Emax=120KV/cm, Δ Emax=105KV/cm, Δ Wdeple=100 μm.To BIGT(as Suo Shi Figure 20 (c)), maximum electric field Emax=210KV/cm, Δ Emax=150KV/cm, Δ Wdeple=70 μm.To traditional RC-IGBT(as Suo Shi Figure 20 (d)), maximum electric field Emax=220KV/cm, Δ Emax=140KV/cm, Δ Wdeple=50 μm.From maximum electric field, the RC-IGBT with Series P floating buried regions provided by the invention is significantly low relative to BIGT and traditional RC-IGBT structure Emax in anti-recovery process, reduces 79% respectively, about 80%, and improves 20% to traditional PIN diode.From the variation delta Emax of maximum electric field, the relatively traditional PIN diode of RC-IGBT with Series P floating buried regions provided by the invention reduces 50%, and relative BIGT reduces by 70%, and relatively traditional RC-IGBT, reduces 60%.From the variation delta Wdeple of depletion layer, the RC-IGBT with Series P floating buried regions provided by the invention is low relative to other structure, namely at Reverse recovery T1 ~ T5(as Figure 17, shown in 18) whole process in, depletion layer changes less, and the fluctuation of so anti-restoring current voltage also will be less.
In sum, a kind of RC-IGBT with a series of P floating layer proposed by the invention, under forward conduction IGBT pattern, snapback phenomenon is completely eliminated through simulating, verifying, oppositely turning off the anti-recovery characteristics under diode mode with ultra-soft, and the fluctuation of no current and voltage in whole reversely restoring process.
A kind of RC-IGBT with a series of P floating layer, for schematic diagram 6, its concrete methods of realizing comprises: choose N-type <100> crystal orientation zone melting single-crystal liner, field oxidation, be etched with source region, long grid oxygen, deposit Poly, the injection of P body, N+ active area is injected, deposit BSPSG, punching is deposit emitter metal also, emitter metal exposure and etching, inject P floating buried regions (11), back surface field stop layer injects, back side N+ and P+ collector electrode inject and annealing, inner to field stop layer in N+ and P+ intersection etch silicon, inject P floating layer 10, deposit dielectric buried layer.Back face metalization, passivation etc.
In the process implemented, according to the designing requirement of concrete device, the RC-IGBT with Series P floating buried regions that the present invention proposes, its surperficial MOS district and drift region to become, this have a series of P floating buried regions and also entirely can be placed in (as Fig. 7) in N-buffer layer, can extend to (as Fig. 8) on whole N-buffer, can extend to (as Fig. 9) within whole N-buffer, the RC-IGBT(of groove grid trench structure can also be used for as Figure 10,11) and superjunction super junction RC-IGBT(as Figure 12,13) in.When specifically making, burying oxygen separator and can use Si
3n
4, HfO
2, benzocyclobutene (BCB) replaces burying oxide layer SiO
2, during making devices, also the semi-conducting material such as available carborundum, GaAs, indium phosphide or germanium silicon replaces body silicon.
Claims (7)
1. one kind has the RC-IGBT of Series P floating buried regions, comprise N-drift region (6), have equally distributed multiple P type tagma (5) in the top layer of N-drift region (6), the bottom of N-drift region (6) has the N resilient coating (7) contacted with N-drift region (6); N resilient coating (7) bottom have contact with N resilient coating (7) and the composite collector be made up of N collector region (8) and P collector region (9) in a lateral direction; At least have a N+ active area (1) in each P type tagma (5), N+ active area (1) surface contacts with metal emitting (4); The surface of the N-drift region (6) between adjacent two P type tagmas (5) has a polygate electrodes (2), between the surface of polygate electrodes (2) and N-drift region (6), there is silicon dioxide gate oxide, between polygate electrodes (2) and metal emitting (4), there is silicon dioxide field oxide;
Also have a dielectric buried layer (12) between described N collector region (8) and P collector region (9), described dielectric buried layer (12) realizes the electric isolution of N collector region (8) and P collector region (9); Also have a P floating layer (10) in the N-type resilient coating (7) of described dielectric buried layer (12) top, N-type resilient coating (7) is divided into the N-type resilient coating between N collector region (8) and N-drift region (6) and the N-type resilient coating two parts between P collector region (9) and N-drift region (6) by described P floating layer (10);
It is characterized in that:
The described RC-IGBT with Series P floating buried regions also has Series P floating buried regions (11), is distributed in the surface of the N-type resilient coating between N collector region (8) and N-drift region (6) described Series P floating buried regions (11) uniform intervals.
2. the RC-IGBT with Series P floating buried regions according to claim 1, it is characterized in that, described Series P floating buried regions (11) is distributed in the surface of the N-type resilient coating between P collector region (9) and N-drift region (6) simultaneously uniform intervals.
3. one kind has the RC-IGBT of Series P floating buried regions, comprise N-drift region (6), have equally distributed multiple P type tagma (5) in the top layer of N-drift region (6), the bottom of N-drift region (6) has the N resilient coating (7) contacted with N-drift region (6); N resilient coating (7) bottom have contact with N resilient coating (7) and the composite collector be made up of N collector region (8) and P collector region (9) in a lateral direction; At least have a N+ active area (1) in each P type tagma (5), N+ active area (1) surface contacts with metal emitting (4); The surface of the N-drift region (6) between adjacent two P type tagmas (5) has a polygate electrodes (2), between the surface of polygate electrodes (2) and N-drift region (6), there is silicon dioxide gate oxide, between polygate electrodes (2) and metal emitting (4), there is silicon dioxide field oxide;
Also have a dielectric buried layer (12) between described N collector region (8) and P collector region (9), described dielectric buried layer (12) realizes the electric isolution of N collector region (8) and P collector region (9); Also have a P floating layer (10) in the N-type resilient coating (7) of described dielectric buried layer (12) top, N-type resilient coating (7) is divided into the N-type resilient coating between N collector region (8) and N-drift region (6) and the N-type resilient coating two parts between P collector region (9) and N-drift region (6) by described P floating layer (10);
It is characterized in that:
The described RC-IGBT with Series P floating buried regions also has Series P floating buried regions (11), is distributed in the inside of the N-type resilient coating between N collector region (8) and N-drift region (6) described Series P floating buried regions (11) uniform intervals.
4. the RC-IGBT with Series P floating buried regions according to claim 3, it is characterized in that, described Series P floating buried regions (11) is distributed in the inside of the N-type resilient coating between P collector region (9) and N-drift region (6) simultaneously uniform intervals.
5. according to Claims 1-4 arbitrary described in there is the RC-IGBT of Series P floating buried regions, it is characterized in that, described dielectric buried layer (12) material is SiO
2, Si
3n
4, HfO
2or benzocyclobutene.
6. according to Claims 1-4 arbitrary described in there is the RC-IGBT of Series P floating buried regions, it is characterized in that, described polygate electrodes (2) is planar gate electrodes structure or trench gate electrode structure.
7. according to Claims 1-4 arbitrary described in there is the RC-IGBT of Series P floating buried regions, it is characterized in that also there is in described N-drift region (6) the P type bar of longitudinal separation distribution, make drift region form super-junction structure.
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| CN201310076733.9A CN103311287B (en) | 2013-03-11 | 2013-03-11 | RC-IGBT (Reverse-Conducting Insulated-Gate Bipolar Transistor) provided with series P floating buried layer |
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