CN103295937A - 芯片的绑定设备和方法 - Google Patents

芯片的绑定设备和方法 Download PDF

Info

Publication number
CN103295937A
CN103295937A CN2013101898012A CN201310189801A CN103295937A CN 103295937 A CN103295937 A CN 103295937A CN 2013101898012 A CN2013101898012 A CN 2013101898012A CN 201310189801 A CN201310189801 A CN 201310189801A CN 103295937 A CN103295937 A CN 103295937A
Authority
CN
China
Prior art keywords
chip
radian
substrate
pressure head
base station
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2013101898012A
Other languages
English (en)
Inventor
李�瑞
权宁万
宋勇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Beijing BOE Optoelectronics Technology Co Ltd
Original Assignee
Beijing BOE Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing BOE Optoelectronics Technology Co Ltd filed Critical Beijing BOE Optoelectronics Technology Co Ltd
Priority to CN2013101898012A priority Critical patent/CN103295937A/zh
Publication of CN103295937A publication Critical patent/CN103295937A/zh
Priority to US14/387,804 priority patent/US20160254246A1/en
Priority to PCT/CN2013/085114 priority patent/WO2014187063A1/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/75981—Apparatus chuck
    • H01L2224/75982—Shape
    • H01L2224/75983—Shape of the mounting surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83193—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832—Applying energy for connecting
    • H01L2224/83201—Compression bonding
    • H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20—Parameters
    • H01L2924/201—Temperature ranges
    • H01L2924/20105—Temperature range 150 C=<T<200 C, 423.15 K =< T < 473.15K
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Adhesives Or Adhesive Processes (AREA)

Abstract

本发明实施例公开了一种芯片的绑定设备和方法，涉及液晶显示设备的制作工艺领域，能够很大程度改善芯片和基板在绑定后发生的翘曲问题。该芯片的绑定设备包括：包括基台和压头，所述基台用于承载基板的一面具有向下的第一弧度，所述压头与芯片接触的一面具有向下的第二弧度，所述具有第一弧度的基台和所述具有第二弧度的压头匹配。

Description

芯片的绑定设备和方法
技术领域
本发明涉及液晶显示设备的制作工艺领域，尤其涉及一种芯片的绑定设备和方法。
背景技术
为了更好的降低成本，目前小尺寸液晶显示产品基本采用（Chip On Glass，简称COG）的芯片绑定工艺方法对液晶显示面板进行驱动，具体为在裸芯片上形成凸点后，在基板上直接与液晶显示屏的引线相连接。
在COG绑定工艺过程中，进行主压时，高温的压头先接触到芯片，通过芯片将热量传导到各向异性导电胶和基板，此时，基板与所在平台的温度差异较大，造成两者之间膨胀尺寸有差异。各向异性导电胶固化后，芯片与基板之间的相对位置就固定下来，主压结束后，芯片和基板冷却下来，芯片收缩的尺寸比基板大，使得芯片的两端产生较大的对基板的应力，这样就导致芯片和基板产生翘曲。而芯片和基板产生翘曲会导致芯片剥离、芯片断裂、显示效果明暗不均等不良后果。
目前解决芯片和基板翘曲的问题主要采用低温各向异性导电胶产品，但是目前该产品价格昂贵，而且技术不成熟。
发明内容
本发明所要解决的技术问题在于提供一种芯片的绑定设备和方法，能够很大程度改善芯片和基板在绑定后发生的翘曲问题。
为解决上述技术问题，本发明采用如下技术方案：
本发明的第一方面提供一种芯片的绑定设备，包括基台和压头，
所述基台用于承载基板的一面具有向下的第一弧度，所述压头与芯片接触的一面具有向下的第二弧度，所述具有第一弧度的基台和所述具有第二弧度的压头匹配。
所述第一弧度和所述第二弧度的曲率半径相等。
所述第一弧度的边缘的切线方向与水平线的夹角为0.5°～1.5°。
在本发明的技术方案中，本发明所提供的芯片绑定的设备的基台具有向下凹陷的第一弧度，压头具有向下突出的第二弧度，所述具有第一弧度的基台和所述具有第二弧度的压头匹配。该基台和压头在对芯片和基板进行主压，以将芯片绑定在基板上的过程中，芯片与基板具有一定的向下弯曲的弧度。芯片与基板在冷却的过程中，由于芯片收缩的尺寸比基板大，向下弯曲的基板和芯片在冷却过程中向着弧形的圆心方向发生形变，冷却结束后芯片和基板变得较为平整，大大减小了芯片和基板之间的应力，防止芯片和基板产生翘曲，进而防止芯片玻璃、芯片断裂、显示效果明暗不均等不良后果的产生。
本发明的第二方面提供一种芯片的绑定工艺方法，包括：
将基板设置于具有向下的第一弧度的基台上；
在所述基板上涂覆各向异性导电胶，将芯片放置于所述各向异性导电胶上并进行预固定；
利用具有向下的第二弧度的压头，将所述芯片绑定在所述基板上；
其中，所述具有第一弧度的基台和所述具有第二弧度的压头匹配。
所述第一弧度和所述第二弧度的曲率半径相等。
所述第一弧度的边缘的切线方向与水平线的夹角为0.5°～1.5°。
所述各向异性导电胶涂覆于所述基板的两个相邻的边缘侧。
所述利用具有第二弧度的压头，将所述芯片绑定在所述基板上包括：
所述压头的温度为150℃～170℃。
所述基板为玻璃基板。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例中的芯片的绑定设备的结构示意图；
图2为本发明实施例中的芯片的绑定设备的使用示意图；
图3为本发明实施例中的主压过程中芯片和基板的形变情况示意图；
图4为本发明实施例中的冷却后的芯片和基板的形变情况示意图；
图5为本发明实施例中的测试结果示意图；
图6为本发明实施例中的芯片的绑定方法的流程示意图。
附图标记说明：
1—基台；               2—压头；                  3—基板；
4—芯片；               5—各向异性导电胶。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明实施例提供一种芯片的绑定设备，如图1所示，该芯片的绑定设备包括基台1和压头2，
所述基台1用于承载基板的一面具有向下的第一弧度，所述压头2与芯片的一面具有向下的第二弧度，所述具有第一弧度的基台1和所述具有第二弧度的压头2匹配。
如图1所示，所述基台1具有向下凹陷的第一弧度，该第一弧度的曲率半径为r1，所述压头2具有向下突起的第二弧度，该第二弧度的曲率半径为r2。当利用该基台1和压头2进行芯片绑定工艺时，该基台1和所述压头2相配合，如图2所示；由于基板3和芯片4具有一定的弹性，尤其芯片4具有一定的延展性，故而基台1和压头2在进行主压过程的同时，使得该基板3和芯片4具有一定的向下弯曲的弧度，如图3所示；芯片4和基板3在冷却的过程中，由于芯片4收缩的尺寸比基板大，就使得原本向下弯曲的基板3和芯片4在冷却过程中向着弧形的圆心方向发生形变，冷却结束后芯片4和基板3变得较为平整，如图4所示。大大减小了芯片4和基板3之间的应力，防止芯片4和基板3产生翘曲，进而防止芯片4剥离、芯片4断裂、显示效果明暗不均等不良后果的产生。
需要说明的是，位于芯片4和基板3之间的为一层各向异性导电胶5，其中，各向异性导电胶5主要包括树脂黏着剂、导电粒子两大部分，树脂黏着剂的功能除了防湿气、黏着、耐热及绝缘功能外，主要用于将芯片4绑定在基板3上，固定芯片4与基板3间电极的相对位置，并提供压迫力量以维持电极与导电粒子间的接触面积。
进一步的，为了提高基台1和压头2之间的配合程度，所述第一弧度和所述第二弧度的曲率半径应相等，即r1=r2；同时，为了防止在主压过程中，芯片4或基板3发生断裂等不良后果，所述第一弧度的边缘的切线方向与水平线的夹角θ一般为0.5°～1.5°这样比较微小的角度，第一弧度的边缘的切线方向与水平线的夹角θ取值应视基板的尺寸而定。下表示出了几种常见尺寸的基板的θ的取值对基板的影响。
Figure BDA00003222211000051
上表中的L0～L3表示基板产生的不良现象的轻重程度，L3为最重。
由上表中可知，每一尺寸的基板都有一个最为合适的夹角θ的取值，一般来说，当该尺寸的基板3和芯片4在具有最合适的夹角对应的弧度的基台1和压头2的作用下，对冷却后的基板3和芯片2进行平坦度测试，即测试绑定后的芯片2的翘曲程度；翘曲程度的测量方法是使用非接触式探头连续测试绑定后的芯片中的被测表面的高度，得到一条连续的曲线，然后取曲线最高点与最低点的高度差来表示翘曲程度。一般的，高度差越大，表示该芯片2的翘曲程度越厉害；反之，高度差越小，表示该芯片2的翘曲程度越小。
在本发明实施例中，如图5所示，正面测试（即芯片2位于基板3的上方）时基板3和芯片2近似处于水平状态，此时最高点和最低点之间的差值仅为0.01mm；反面测试（即芯片2位于基板3的下方）时最高点和最低点之间的差值为0.15mm，对于本发明所提供的基板3和芯片2而言，重力的影响较小。进而可知本发明所提供的芯片的绑定设备大大减小了芯片4两端对基板3的应力，有效地防止芯片和基板产生翘曲。
在本实施例的技术方案中，本发明所提供的芯片绑定的设备的基台具有向下凹陷的第一弧度，压头具有向下突出的第二弧度，所述具有第一弧度的基台和所述具有第二弧度的压头匹配。该基台和压头在对芯片和基板进行主压以将芯片绑定在基板上的过程中，芯片与基板具有一定的向下弯曲的弧度。芯片与基板在冷却的过程中，由于芯片收缩的尺寸比基板大，向下弯曲的基板和芯片在冷却过程中向着弧形的圆心方向发生形变，冷却结束后芯片和基板变得较为平整，大大减小了芯片和基板之间的应力，防止芯片和基板产生翘曲，进而防止芯片玻璃、芯片断裂、显示效果明暗不均等不良后果的产生。
进一步的，本发明实施例还提供了一种利用上述的芯片的绑定设备的芯片的绑定方法，具体如图6所示，该方法包括：
步骤S101、将基板设置于具有向下的第一弧度的基台上；
步骤S102、在所述基板上涂覆各向异性导电胶，将芯片放置于所述各向异性导电胶上并进行预固定；
步骤S103、利用具有向下的第二弧度的压头，将所述芯片绑定在所述基板上；
由前文的叙述可知，所述具有第一弧度的基台和所述具有第二弧度的压头匹配。
并且，为了提高基台1和压头2的配合程度，优选的，所述第一弧度和所述第二弧度的曲率半径相等。
为了防止基板1在主压的过程中破损，所述第一弧度的边缘的切线方向与水平线的夹角为0.5°～1.5°。
由于芯片4通常设置在基板的两个相邻的边缘侧，所述各向异性导电胶5涂覆于所述基板3的两个相邻的边缘侧。
通常，各向异性导电胶5需要得到150℃～170℃的温度，才能进行熔化其内部的树脂黏着剂，进行绑定处理，所以步骤S103中，所述压头2的温度优选为150℃～170℃。具体的，压头2的温度应根据各向异性导电胶5的适用温度来选择。
一般的，所述基板1优选为玻璃基板，除此之外还可为塑料等透明材质制成。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以所述权利要求的保护范围为准。

Claims (9)

1.一种芯片的绑定设备，包括基台和压头，其特征在于，
所述基台用于承载基板的一面具有向下的第一弧度，所述压头与芯片接触的一面具有向下的第二弧度，所述具有第一弧度的基台和所述具有第二弧度的压头匹配。
2.根据权利要求1所述的芯片的绑定设备，其特征在于，
所述第一弧度和所述第二弧度的曲率半径相等。
3.根据权利要求1所述的芯片的绑定设备，其特征在于，
所述第一弧度的边缘的切线方向与水平线的夹角为0.5°～1.5°。
4.一种芯片的绑定方法，其特征在于，包括：
将基板设置于具有向下的第一弧度的基台上；
在所述基板上涂覆各向异性导电胶，将芯片放置于所述各向异性导电胶上并进行预固定；
利用具有向下的第二弧度的压头，将所述芯片绑定在所述基板上；
其中，所述具有第一弧度的基台和所述具有第二弧度的压头匹配。
5.根据权利要求4所述的芯片的绑定方法，其特征在于，
所述第一弧度和所述第二弧度的曲率半径相等。
6.根据权利要求4所述的芯片的绑定方法，其特征在于，
所述第一弧度的边缘的切线方向与水平线的夹角为0.5°～1.5°。
7.根据权利要求4所述的芯片的绑定方法，其特征在于，
所述各向异性导电胶涂覆于所述基板的两个相邻的边缘侧。
8.根据权利要求4所述的芯片的绑定方法，其特征在于，所述利用具有第二弧度的压头，将所述芯片绑定在所述基板上包括：
所述压头的温度为150℃～170℃。
9.根据权利要求4所述的芯片的绑定方法，其特征在于，
所述基板为玻璃基板。
CN2013101898012A 2013-05-21 2013-05-21 芯片的绑定设备和方法 Pending CN103295937A (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN2013101898012A CN103295937A (zh) 2013-05-21 2013-05-21 芯片的绑定设备和方法
US14/387,804 US20160254246A1 (en) 2013-05-21 2013-10-12 Apparatus and method for bonding chips
PCT/CN2013/085114 WO2014187063A1 (zh) 2013-05-21 2013-10-12 芯片的绑定设备和方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2013101898012A CN103295937A (zh) 2013-05-21 2013-05-21 芯片的绑定设备和方法

Publications (1)

Publication Number Publication Date
CN103295937A true CN103295937A (zh) 2013-09-11

Family

ID=49096599

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2013101898012A Pending CN103295937A (zh) 2013-05-21 2013-05-21 芯片的绑定设备和方法

Country Status (3)

Country Link
US (1) US20160254246A1 (zh)
CN (1) CN103295937A (zh)
WO (1) WO2014187063A1 (zh)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014187063A1 (zh) * 2013-05-21 2014-11-27 京东方科技集团股份有限公司 芯片的绑定设备和方法
WO2017107094A1 (zh) * 2015-12-23 2017-06-29 深圳市柔宇科技有限公司 绑定装置及柔性显示模组的绑定方法
CN107819015A (zh) * 2017-10-30 2018-03-20 武汉华星光电半导体显示技术有限公司 显示装置、及阵列基板与ic芯片的绑定方法
CN109597254A (zh) * 2019-01-08 2019-04-09 深圳市华星光电半导体显示技术有限公司 芯片绑定区域的结构及显示面板
CN110544655A (zh) * 2019-09-03 2019-12-06 云谷（固安）科技有限公司 绑定装置及绑定方法
CN110730611A (zh) * 2019-09-30 2020-01-24 云谷（固安）科技有限公司 曲面显示屏绑定装置及曲面显示屏绑定方法
CN111276392A (zh) * 2018-12-04 2020-06-12 中科院微电子研究所昆山分所 一种固相键合装置及一种固相键合方法
CN113442099A (zh) * 2021-06-29 2021-09-28 Tcl华星光电技术有限公司 一种基板加工载台

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10446728B2 (en) * 2014-10-31 2019-10-15 eLux, Inc. Pick-and remove system and method for emissive display repair
US11128786B2 (en) * 2014-11-21 2021-09-21 Apple Inc. Bending a circuit-bearing die
JP6793523B2 (ja) * 2016-10-31 2020-12-02 デクセリアルズ株式会社 接続体の製造方法、接続方法、接続装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6053036A (ja) * 1983-09-02 1985-03-26 Mitsubishi Electric Corp 半導体素子の製造方法
JP2003046032A (ja) * 2001-07-26 2003-02-14 Hitachi Ltd 銅複合材放熱基板、半導体パワーモジュール及びその製造方法
JP2006066566A (ja) * 2004-08-26 2006-03-09 Casio Comput Co Ltd ボンディング装置
CN1753160A (zh) * 2004-09-21 2006-03-29 中华映管股份有限公司 芯片－玻璃接合工艺、热压工艺及其装置
JP2011086698A (ja) * 2009-10-14 2011-04-28 Canon Machinery Inc ボンディング装置
CN102768419A (zh) * 2011-12-05 2012-11-07 北京京东方光电科技有限公司 一种cog绑定工艺方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3405269B2 (ja) * 1999-04-26 2003-05-12 ソニーケミカル株式会社 実装方法
US7755103B2 (en) * 2006-08-03 2010-07-13 Sumitomo Electric Industries, Ltd. Nitride gallium semiconductor substrate and nitride semiconductor epitaxial substrate
JP2012038766A (ja) * 2010-08-03 2012-02-23 Sumitomo Electric Ind Ltd 検出装置、受光素子アレイ、半導体チップ、これらの製造方法、および光学センサ装置
US9793355B2 (en) * 2012-11-30 2017-10-17 Lg Innotek Co., Ltd. Epitaxial wafer and switch element and light-emitting element using same
CN103295937A (zh) * 2013-05-21 2013-09-11 北京京东方光电科技有限公司 芯片的绑定设备和方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6053036A (ja) * 1983-09-02 1985-03-26 Mitsubishi Electric Corp 半導体素子の製造方法
JP2003046032A (ja) * 2001-07-26 2003-02-14 Hitachi Ltd 銅複合材放熱基板、半導体パワーモジュール及びその製造方法
JP2006066566A (ja) * 2004-08-26 2006-03-09 Casio Comput Co Ltd ボンディング装置
CN1753160A (zh) * 2004-09-21 2006-03-29 中华映管股份有限公司 芯片－玻璃接合工艺、热压工艺及其装置
JP2011086698A (ja) * 2009-10-14 2011-04-28 Canon Machinery Inc ボンディング装置
CN102768419A (zh) * 2011-12-05 2012-11-07 北京京东方光电科技有限公司 一种cog绑定工艺方法

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014187063A1 (zh) * 2013-05-21 2014-11-27 京东方科技集团股份有限公司 芯片的绑定设备和方法
US10126578B2 (en) 2015-12-23 2018-11-13 Shenzhen Royole Technologies Co., Ltd. Bonding apparatus and bonding method of flexible display module
WO2017107094A1 (zh) * 2015-12-23 2017-06-29 深圳市柔宇科技有限公司 绑定装置及柔性显示模组的绑定方法
CN107210242A (zh) * 2015-12-23 2017-09-26 深圳市柔宇科技有限公司 绑定装置及柔性显示模组的绑定方法
WO2019085138A1 (zh) * 2017-10-30 2019-05-09 武汉华星光电半导体显示技术有限公司 显示装置、及阵列基板与 ic 芯片的绑定方法
CN107819015A (zh) * 2017-10-30 2018-03-20 武汉华星光电半导体显示技术有限公司 显示装置、及阵列基板与ic芯片的绑定方法
CN107819015B (zh) * 2017-10-30 2019-11-15 武汉华星光电半导体显示技术有限公司 显示装置、及阵列基板与ic芯片的绑定方法
CN111276392A (zh) * 2018-12-04 2020-06-12 中科院微电子研究所昆山分所 一种固相键合装置及一种固相键合方法
CN111276392B (zh) * 2018-12-04 2023-02-28 昆山微电子技术研究院 一种固相键合装置及一种固相键合方法
CN109597254A (zh) * 2019-01-08 2019-04-09 深圳市华星光电半导体显示技术有限公司 芯片绑定区域的结构及显示面板
CN110544655A (zh) * 2019-09-03 2019-12-06 云谷（固安）科技有限公司 绑定装置及绑定方法
CN110544655B (zh) * 2019-09-03 2021-09-14 云谷（固安）科技有限公司 绑定装置及绑定方法
CN110730611A (zh) * 2019-09-30 2020-01-24 云谷（固安）科技有限公司 曲面显示屏绑定装置及曲面显示屏绑定方法
CN110730611B (zh) * 2019-09-30 2020-12-08 云谷（固安）科技有限公司 曲面显示屏绑定装置及曲面显示屏绑定方法
CN113442099A (zh) * 2021-06-29 2021-09-28 Tcl华星光电技术有限公司 一种基板加工载台

Also Published As

Publication number Publication date
US20160254246A1 (en) 2016-09-01
WO2014187063A1 (zh) 2014-11-27

Similar Documents

Publication Publication Date Title
CN103295937A (zh) 芯片的绑定设备和方法
CN101435939B (zh) 液晶显示装置
CN102768419B (zh) 一种cog绑定工艺方法
US10500816B2 (en) Substrate structure, method for attaching flexible substrate and method for peeling off flexible substrate
CN202710881U (zh) 一种液晶显示设备
US20190148327A1 (en) Driving chip, display substrate, display device and method for manufacturing display device
TWI540591B (zh) A connection method, a method of manufacturing a connector, and a linker
CN105280836A (zh) 一种制备柔性保护层的方法及柔性显示器件
CN105502958A (zh) 一种修复玻璃基板裂纹的方法
CN112574682B (zh) 一种用于MiniLED巨量转移的多层结构胶带及其制备方法
CN106952887A (zh) 柔性显示面板及其制造方法
CN203365865U (zh) 一种阵列基板、覆晶薄膜和显示装置
CN104166255B (zh) 液晶显示模组的驱动芯片的组装方法
CN101329927A (zh) 导电胶带离型膜及导电胶带
CN107283989A (zh) 压合装置及在显示面板上压合胶体的方法
CN108333818A (zh) 显示面板及其制造方法
CN104534348A (zh) 一种背光模组及显示装置
CN101141027B (zh) 平面显示器基板的电路连接结构与其连接方法
CN101251670B (zh) 液晶显示装置及其制作方法
CN206447777U (zh) 玻璃减薄设备
CN108807486A (zh) 一种显示面板的制备方法及显示装置
CN103144071A (zh) 一种超薄玻璃的剥离方法
CN204843439U (zh) 水平调整机构以及包含该水平调整机构的本压邦定装置
WO2021142751A1 (zh) 一种丙烯酸导电胶及其制备方法和应用
TWI616124B (zh) 柔性電路板及其製造方法、顯示模組

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20130911

RJ01 Rejection of invention patent application after publication