CN103280407B - ∑形凹槽的制作方法 - Google Patents

∑形凹槽的制作方法 Download PDF

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CN103280407B
CN103280407B CN201310217267.1A CN201310217267A CN103280407B CN 103280407 B CN103280407 B CN 103280407B CN 201310217267 A CN201310217267 A CN 201310217267A CN 103280407 B CN103280407 B CN 103280407B
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李全波
张瑜
黄君
彭树根
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Shanghai Huali Microelectronics Corp
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Abstract

本发明提供一种∑形凹槽的制作方法，包括：提供半导体衬底，所述半导体衬底上形成有栅极，所述栅极和半导体衬底表面形成有保护层；利用等离子体刻蚀工艺，对所述保护层和半导体衬底进行刻蚀，在所述半导体衬底内形成∑形凹槽。本发明的制作方法不需要湿法刻蚀工艺，无需使用湿法刻蚀设备，仅需要通过离子体刻蚀工艺就可形成∑形凹槽，简化了工艺流程，更加容易实现工艺控制，形成的∑形凹槽更加靠近沟道，器件增强效果更好。

Description

∑形凹槽的制作方法
技术领域
本发明涉及半导体技术领域，尤其涉及∑形凹槽的制作方法。
背景技术
随着半导体制造技术的进步，半导体器件的特征尺寸不断缩小，当半导体器件的特征尺寸缩小至40纳米及以下时，需要使用嵌入式锗硅外延（使用embedded epitaxial SiGe）技术来增强PMOS晶体管的驱动电流。而在锗硅外延生长之前需要形成在半导体衬底上形成凹槽。凹槽的形状有U形和∑形两种，∑形凹槽因为形状更接近沟道，增强驱动电流的效果更佳。
现有的∑形凹槽的制作方法请参考图1-图3所示。首先，提供半导体衬底10，所述半导体衬底10上形成有栅极20。在所述栅极20上形成保护层40，所述保护层40的材质为氮化硅层，用于保护栅极20。然后，请参考图2，进行等离子体刻蚀工艺，在所述半导体衬底10中形成凹槽40，所述凹槽的侧壁垂直于沟槽的底部或与沟槽底部倾斜。接着，请参考图3，进行湿法刻蚀工艺，形成∑形凹槽。
由于需要等离子体刻蚀和湿法刻蚀两种不同的工艺，需要专用的设备和相应的刻蚀液。需要对现有工艺进行改进，以简化工艺流程，更加容易进行工艺控制。
发明内容
本发明解决的问题是提供一种∑形凹槽的制作方法，不需要湿法刻蚀工艺，仅需要通过离子体刻蚀工艺就可形成∑形凹槽，简化了工艺流程，更加容易实现工艺控制。
为解决上述问题，本发明提供一种∑形凹槽的制作方法，包括：
提供半导体衬底，所述半导体衬底上形成有栅极，所述栅极和半导体衬底表面形成有保护层；
利用等离子体刻蚀工艺，对所述保护层和半导体衬底进行刻蚀，在所述半导体衬底内形成∑形凹槽。
可选地，所述等离子体刻蚀工艺包括:
利用含第一刻蚀气体进行等离子体刻蚀工艺，所述第一刻蚀气体包括含碳的氟化物；利用第二刻蚀气体进行等离子体刻蚀工艺，所述第二刻蚀气体为含硫的氟化物；利用第三刻蚀气体进行等离子体刻蚀工艺，所述第三刻蚀气体为含硫的氟化物、含溴化氢和O2的混合气体。
可选地，所述第一刻蚀气体包括CF4，CF4的流量范围为40-110sccm。
可选地，所述第二刻蚀气体包括SF6，SF6的流量范围为5-20sccm，刻蚀腔室的压力范围为40-60mtorr，刻蚀功率为200-300W，偏置功率为0W，刻蚀时间为15-25秒。
可选地，第三刻蚀气体包括SF6，HBr和O2形成聚合物气体，所述SF6的流量范围为5-10sccm，刻蚀腔室的压力范围为5-10mtorr，刻蚀功率为100-200W，偏置功率为200-300W，刻蚀时间为10-20秒。
可选地，依次利用所述第一刻蚀气体、第二刻蚀气体和第三刻蚀气体进行所述等离子体刻蚀工艺。
可选地，所述等离子体刻蚀工艺利用LAM kiyo或kiyo45设备进行。
可选地，所述保护层的材质为氮化硅，其厚度范围为100-150埃。
可选地，所述∑形凹槽的垂直深度范围为400-600埃，侧向距离为50-100埃。
与现有技术相比，本发明具有以下优点：
本发明的制作方法不需要湿法刻蚀工艺，无需使用湿法刻蚀设备，仅需要通过离子体刻蚀工艺就可形成∑形凹槽，简化了工艺流程，更加容易实现工艺控制，形成的∑形凹槽更加靠近沟道，器件增强效果更好。
附图说明
图1-图3是现有技术的∑形凹槽的制作方法剖面结构示意图；
图4是本发明的∑形凹槽的制作方法流程示意图；
图5-图6是本发明一个实施例的∑形凹槽的制作方法剖面结构示意图。
具体实施方式
本发明提供一种∑形凹槽的制作方法，请参考图4，图4为本发明的∑形凹槽的制作方法流程示意图，所述制作方法包括：
步骤S1，提供半导体衬底，所述半导体衬底上形成有栅极，所述栅极和半导体衬底表面形成有保护层；
步骤S2，利用等离子体刻蚀工艺，对所述保护层和半导体衬底进行刻蚀，在所述半导体衬底内形成∑形凹槽。
下面结合具体实施例对本发明的技术方案进行详细的说明。为了更好说明本发明的技术方案，请参考图5-图6所示的本发明一个实施例的∑形凹槽的制作方法的剖面结构示意图。
请参考图5，提供半导体衬底100，所述半导体衬底100上形成有栅极200。在所述栅极200上形成保护层300，所述保护层300的材质为氮化硅，用于保护栅极200。所述保护层300的厚度范围为100-150埃。
然后，请参考图6，仅进行等离子体刻蚀工艺，在半导体衬底100内形成∑形凹槽500。作为一个实施例，所述等离子体刻蚀工艺包括:
利用含第一刻蚀气体进行等离子体刻蚀工艺，所述第一刻蚀气体包括含碳的氟化物；利用第二刻蚀气体进行等离子体刻蚀工艺，所述第二刻蚀气体为含硫的氟化物；利用第三刻蚀气体进行等离子体刻蚀工艺，所述第三刻蚀气体为含硫的氟化物、含溴化氢和O2的混合气体。
作为一个实施例，所述第一刻蚀气体包括CF4，CF4的流量范围为40-110sccm；所述第二刻蚀气体包括SF6，SF6的流量范围为5-20sccm，刻蚀腔室的压力范围为40-60mtorr，刻蚀功率为200-300W，偏置功率为0W，刻蚀时间为15-25秒；第三刻蚀气体包括SF6，HBr和O2形成聚合物气体，所述SF6的流量范围为5-10sccm，刻蚀腔室的压力范围为5-10mtorr，刻蚀功率为100-200W，偏置功率为200-300W，刻蚀时间为10-20秒。
作为一个实施例，所述等离子体刻蚀工艺利用LAM kiyo或kiyo45设备进行，依次利用所述第一刻蚀气体、第二刻蚀气体和第三刻蚀气体进行所述等离子体刻蚀工艺。本发明利用了不同的等离子体，使之分别具有各向同性和各向异性，再配合不同的气体流量比和刻蚀时间，刻蚀成∑形凹槽结构，形成的∑形凹槽更加靠近沟道。该方法无需采用沿晶向刻蚀的湿法工艺，并使制造工艺流程简化，有利于工艺控制。作为一个实施例，所述∑形凹槽500的垂直深度D范围为400-600埃，侧向距离L为50-100埃。
综上，本发明的制作方法不需要湿法刻蚀工艺，无需使用湿法刻蚀设备，仅需要通过离子体刻蚀工艺就可形成∑形凹槽，简化了工艺流程，更加容易实现工艺控制，形成的∑形凹槽更加靠近沟道，器件增强效果更好。
因此，上述较佳实施例仅为说明本发明的技术构思及特点，其目的在于让熟悉此项技术的人士能够了解本发明的内容并据以实施，并不能以此限制本发明的保护范围。凡根据本发明精神实质所作的等效变化或修饰，都应涵盖在本发明的保护范围之内。

Claims (8)

1.一种∑形凹槽的制作方法，其特征在于，包括：
提供半导体衬底，所述半导体衬底上形成有栅极，所述栅极和半导体衬底表面形成有保护层；
利用等离子体刻蚀工艺，对所述保护层和半导体衬底进行刻蚀，在所述半导体衬底内形成∑形凹槽；
其中，所述等离子体刻蚀工艺包括:利用含第一刻蚀气体进行等离子体刻蚀工艺，所述第一刻蚀气体包括含碳的氟化物；利用第二刻蚀气体进行等离子体刻蚀工艺，所述第二刻蚀气体为含硫的氟化物；利用第三刻蚀气体进行等离子体刻蚀工艺，所述第三刻蚀气体为含硫的氟化物、含溴化氢和O2的混合气体。
2.如权利要求1所述的∑形凹槽的制作方法，其特征在于，所述第一刻蚀气体包括CF4，CF4的流量范围为40-110sccm。
3.如权利要求1所述的∑形凹槽的制作方法，其特征在于，所述第二刻蚀气体包括SF6，SF6的流量范围为5-20sccm，刻蚀腔室的压力范围为40-60mtorr，刻蚀功率为200-300W，偏置功率为0W，刻蚀时间为15-25秒。
4.如权利要求1所述的∑形凹槽的制作方法，其特征在于，第三刻蚀气体包括SF6，HBr和O2形成聚合物气体，所述SF6的流量范围为5-10sccm，刻蚀腔室的压力范围为5-10mtorr，刻蚀功率为100-200W，偏置功率为200-300W，刻蚀时间为10-20秒。
5.如权利要求1所述的∑形凹槽的制作方法，其特征在于，依次利用所述第一刻蚀气体、第二刻蚀气体和第三刻蚀气体进行所述等离子体刻蚀工艺。
6.如权利要求1所述的∑形凹槽的制作方法，其特征在于，所述等离子体刻蚀工艺利用LAM kiyo或kiyo45设备进行。
7.如权利要求1所述的∑形凹槽的制作方法，其特征在于，所述保护层的材质为氮化硅，其厚度范围为100-150埃。
8.如权利要求1所述的∑形凹槽的制作方法，其特征在于，所述∑形凹槽的垂直深度范围为400-600埃，侧向距离为50-100埃。
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