CN103258816A - Semiconductor lightning stroke protection device - Google Patents
Semiconductor lightning stroke protection device Download PDFInfo
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- CN103258816A CN103258816A CN2013101722335A CN201310172233A CN103258816A CN 103258816 A CN103258816 A CN 103258816A CN 2013101722335 A CN2013101722335 A CN 2013101722335A CN 201310172233 A CN201310172233 A CN 201310172233A CN 103258816 A CN103258816 A CN 103258816A
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Abstract
The invention relates to a semiconductor lightning stroke protection device which comprises a protector module, a PN combined type semiconductor crystal grain, a first lead, a second lead, coating layers and sealing colloid. The protector module comprises a first end sheet and a second end sheet which are arranged oppositely. The PN combined type semiconductor crystal grain is placed between the first end sheet and the second end sheet, and the first end sheet and the second end sheet are respectively connected with the PN combined type semiconductor crystal grain in a soldering tin joint sealing mode. The first lead is conductively connected with the first end sheet, and the second lead is conductively connected with the second end sheet. The coating layers wrap the outside of the first end sheet, the outside of the second end sheet and the outside of the PN combined type semiconductor crystal grain. The other end of the first lead and the other end of the second lead respectively penetrate through the coating layers and the sealing colloid respectively to be exposed. By means of the semiconductor lightning stroke protection device, protected assemblies or protected devices can still operate normally and effectively under situations that the semiconductor lightning stroke protection device bears high-electric current density sudden pulse currents and lighting stroke impact waves. Lightning stroke resistance reliability is high, and various international lightning shock and sudden pulse current impact standards are met. Stable voltage can be kept when the device is impacted by high currents, and the problem of fast voltage fluctuation does not happen.
Description
Technical field
The present invention relates to a kind of lightning strike protection device, especially relate to a kind of semiconductor protection device that utilizes semiconductor to develop to make and can anti-heavy current impact.
Background technology
Since the semiconductor subassembly invention, equipment such as human designed circuit, communication have just constantly been jeopardized such as big electric current such as thunderbolt, EMC or electromagnetic interference.In order to solve the problem of this respect, assemblies such as rheostat, ceramic component, gas discharge tube are come out one after another, yet because the congenital material of these assemblies and design problem, no matter reliability (reliability) or electrical parameter concentration degree, all do not have the stablizing of conventional semiconductor devices, and component characteristic can begin all to degenerate after whenever bearing the shock wave that once is struck by lightning.In addition, regular meeting makes the assembly short circuit to these assemblies under the high rush of current ripple suffering, perhaps moment make voltage unexpected rise to the zone that the back segment circuit can not bear.
The lightning Protection assembly that the manufacture of semiconductor of prior art is designed or lightning strike protection device also all can't effectively survive under high current density environment or the extremely very brief instantaneous large-current thunderbolt shock wave.And at this significant deficiency; the lightning Protection assembly of prior art or the solution of lightning strike protection device; all be to reach by the method for serial connection gas discharge tube or ceramic component; yet; since assemblies such as above-mentioned gas discharge tube or ceramic component all have reliability and under impulse current voltage can produce the problem of fluctuation rapidly; the protection effect is had a greatly reduced quality, even can't protect expensive equipment, cause a lot of unnecessary loss.
Traditional PN diode can be used for as protection surging or ESD (electrostatic interference).When principle was accepted surging for the PN diode, assembly electrically can enter collapse district, and then leads energy off, the energy that the big small end of the encapsulation of design component or PN diode is led off according to need and deciding.But under fixed-area, along with the energy of leading off rises, voltage also can continue to rise, and is accompanied by the high heat energy that assembly produces, and causes the phenomenon of thermal breakdown (thermal run away).Therefore under heavy current impact, traditional PN diode design concept can not adopt.
Along with development of times, the thyristor of the follow-up invention of scientist (THYRISTOR) can effectively bear high rush of current ripple really, however for fear of start-up time long, and be not suitable for and bear at the high current density shock wave of the utmost point in blink.
Therefore, press at present and a kind ofly have high reliability, high stability, impact in surging and still can stablize voltage down, and the semiconductor lightning Protection device that can impact in thunderbolt or the surging of the big electric current of utmost point short time inner dissipation.
Summary of the invention
For solving the deficiencies in the prior art, the object of the present invention is to provide a kind of thunderbolt of anti-instantaneous large-current or the impact of assault echelon, make rear end significant components or equipment all can be subjected to the semiconductor lightning strike protection device of good protection.
For achieving the above object, the present invention is achieved by the following technical solutions:
A kind of semiconductor lightning strike protection device; it is characterized in that; comprise a protector module; described protector module comprises first dististyle; second dististyle; PN junction mould assembly semiconductor grain; first lead-in wire; second lead-in wire; coat and adhesive body; described first dististyle and second dististyle are oppositely arranged; described PN maqting type semiconductor grain is arranged between first dististyle and second dististyle; and connect airtight with scolding tin with second dististyle with first dististyle respectively and be connected; described coat is coated on described first dististyle; the outside of second dististyle and PN junction mould assembly semiconductor grain; described adhesive body then is coated on the outside of coat; and an end of described first lead-in wire is connected with the first dististyle conductive phase; the other end passes coat and adhesive body is exposed on the external; equally; one end of described second lead-in wire is connected with the second dististyle conductive phase, and the other end passes coat and adhesive body is exposed on the external.
Further, described PN junction mould assembly semiconductor grain is at least two, and between the adjacent PN maqting type semiconductor grain also electrical Joint conductive copper sheet is arranged.
In addition, described first dististyle and second dististyle are copper sheet.
Described coat is the varnish layer.
The material of described adhesive body is disposable pressed powder type epoxy resin.
Described first lead-in wire and second lead-in wire then are solid copper wire.
In addition, described PN maqting type semiconductor grain meets the specification of Type-1 in the test of international norm lightning Protection, can bear the thunderbolt shock wave of 10/1000us.
And the ion doping concentration in the N type semiconductor district of described PN maqting type semiconductor grain is that every cubic centimeter of 5E20 ion and doping depth are 40 microns, and the ion doping concentration in P type semiconductor district is every cubic centimeter of 1.6E17 ion.
Perhaps, described PN maqting type semiconductor grain meets the specification of Type-2 in the test of international norm lightning Protection, can bear the thunderbolt shock wave of 8/20us.
And the ion doping concentration in the N type semiconductor district of described PN maqting type semiconductor grain is that every cubic centimeter of 2E20 ion and doping depth are 70 microns, and the ion doping concentration in P type semiconductor district is every cubic centimeter of 3.66E17 ion.
The invention has the beneficial effects as follows: the present invention can make protected assembly or device still normally, work effectively under the situation of bearing high current density surging and thunderbolt shock wave; And anti-thunderbolt reliability height meets various international thunderbolts and surging and impacts specification; And when being subjected to high rush of current, still keep burning voltage, do not produce the problem of voltage fluctuation rapidly.
Description of drawings
Fig. 1 is a kind of lightning strike protection device test waveform figure;
Fig. 2 is the described a kind of semiconductor lightning strike protection device cutaway view of one embodiment of the invention;
Fig. 3 is the described a kind of protector module cutaway view of one embodiment of the invention;
Fig. 4 is the described PN maqting type of one embodiment of the invention semiconductor grain vertical view;
Fig. 5 is the cutaway view of the A-A direction of Fig. 4;
Fig. 6 is the described a kind of PN maqting type semiconductor grain ion doping concentration of one embodiment of the invention and doping depth graph of relation;
Fig. 7 is the cutaway view of the described a kind of coat of one embodiment of the invention;
Fig. 8 is the cutaway view of the described a kind of adhesive body of one embodiment of the invention;
Fig. 9 is the described a kind of PN maqting type semiconductor grain collapse point of one embodiment of the invention and collapse district and electricity slurry diffusion schematic diagram;
Figure 10 is the cutaway view of the B-B direction of Fig. 9;
Figure 11 is the described a kind of PN maqting type semiconductor grain of one embodiment of the invention and the equivalent capacity figure that is connected in series;
Figure 12 is the described a kind of semiconductor lightning strike protection device stereogram of one embodiment of the invention;
Figure 13 is the thunderbolt ripple test data figure of the described a kind of semiconductor lightning strike protection device of one embodiment of the invention.
Main Reference numeral implication is among the figure:
100, semiconductor lightning strike protection device
10, protector module
11, first dististyle
111, the first conductive bond face
112, first end face
12, second dististyle
121, the second conductive bond face
122, second end face
13, first lead-in wire
131, first end points
132, second end points
14, second lead-in wire
141, the 3rd end points
142, the 4th end points
15, PN maqting type semiconductor grain
151, contact zone
152, PN composition surface
153, protective layer
154, the first N type semiconductor district
155, P type semiconductor district
156, the second N type semiconductor district
16, conductive copper sheet
20, coat
30, adhesive body
BP, collapse point
BZ, breakdown region
C, PN maqting type semiconductor grain equivalent capacity
D, PN maqting type semiconductor grain thickness
DPA, exhaustion region
E, electricity slurry
I
D, electricity slurry electric current
I
P, impulse current
I
TH, peak current half
S1, S2, begin to enter the zone of semiconductor gain phenomenon
Zone B, the logical zone of high-current flow.
Embodiment
Below in conjunction with the drawings and specific embodiments the present invention is carried out concrete introduction.
Fig. 1 is a kind of lightning strike protection device test waveform figure.
As shown in Figure 1: aspect the quantification definition and test of thunderbolt, scientist is divided into polytype according to the result of observation of nature phenomenon with shock wave, to be used for the different types of thunderbolt ripple of definition, and can utilize board equipment to produce test waves, the ability of testing the lightning Protection assembly.Wherein the most important also general with 10/1000us shown in Figure 1 (Type-1) and 8/20us (Type-2) waveform again.
Wherein, containing of 10/1000us means: in 10/1000 (Type-1) waveform of test waves as shown in Figure 1; from time 0 beginning; the lightning strike protection device begins to bear the rush of current of test waves; test waves reaches peak current (lowest high-current value) when the time is 10 microseconds, and the current value of test waves is down to half I of peak current when the time is 1000 microseconds
THAnd continue to reduce.
The connotation of 8/20us then is: as shown in Figure 1 in 8/20 of test waves (Type-2) waveform; from time 0 beginning; the lightning strike protection device begins to bear the rush of current of test waves; test waves reaches peak current when the time is 8 microseconds, and the current value of test waves is down to half I of peak current when the time is 20 microseconds
THAnd continue to reduce.
Observe this two waveform, the 8/20us test waves is hurriedly many than the 10/1000us rise time, and the heavy current impact time that has shortened 20%, 10/1000us test waveform then is the duration of 50 times of 8/20us test waveforms.Therefore, at the category difference that different test waves are tested, the emphasis of paying attention to separately is also different, and the lightning Protection assembly also must provide different design with the different demand of correspondence.
Fig. 2 is the described a kind of semiconductor lightning strike protection device cutaway view of one embodiment of the invention.
As shown in Figure 2: a kind of semiconductor lightning strike protection device 100, it comprises: protector module 10, coat 20 and adhesive body 30.
Fig. 3 is the described a kind of protector module cutaway view of one embodiment of the invention;
As shown in Figure 3: a kind of protector module 10, it is used for absorbing thunderbolt or the surging of big electric current.Protector module 10 comprises: first dististyle 11, second dististyle 12, first lead-in wire, 13, second lead-in wire 14 and at least one PN maqting type semiconductor grain 15.
Second dististyle 12 also can be copper sheet, second dististyle 12 and first dististyle 11 are oppositely arranged, second dististyle 12 has one second conductive bond face 121 and second end face 122 corresponding with the second conductive bond face 121, and wherein the second conductive bond face 121 and the first conductive bond face 111 are toward each other.
First lead-in wire 13 can be solid copper wire, and two ends of first lead-in wire 13 are respectively first end points 131 and second end points 132.Wherein first end points 131 can be affixed with first end face, 112 conductive phases of first dististyle 11.
Second lead-in wire 14 also can be solid copper wire, and two ends of second lead-in wire 14 are respectively the 3rd end points 141 and the 4th end points 142.Wherein the 3rd end points 141 can be affixed with second end face, 122 conductive phases of second dististyle 12.
15 of PN maqting type semiconductor grains are arranged between first dististyle 11 and second dististyle 12.First dististyle 11 and second dististyle 12 connect airtight with scolding tin with the first conductive bond face 111 and the second conductive bond face 121 and adjacent PN maqting type semiconductor grain 15 respectively again and are connected.For example, when protector module 10 only had a PN maqting type semiconductor grain 15, this PN maqting type semiconductor grain 15 was solidly connected to the first conductive bond face 111 and the second conductive bond face 121 respectively with scolding tin.
And as shown in Figures 2 and 3; protector module 10 can have two above PN maqting type semiconductor grains 15; at this moment; between per two adjacent PN maqting type semiconductor grains 15, further include conductive copper sheet 16; the first conductive bond face 111 and the second conductive bond face 121 connect airtight with scolding tin with adjacent PN maqting type semiconductor grain 15 respectively and are connected, the two sides of conductive copper sheet 16 then respectively with adjacent PN maqting type semiconductor grain 15 with the electrical Joint of scolding tin.
Fig. 4 is the described PN maqting type of one embodiment of the invention semiconductor grain vertical view; Fig. 5 is the cutaway view of the A-A direction of Fig. 4.
As shown in Figure 4: the upper surface of PN maqting type semiconductor grain 15 has a contact zone 151, as the zone that electrically connects with the outside or scolding tin joins.Same, as shown in Figure 5, the lower surface of PN maqting type semiconductor grain 15 also has a contact zone 151, as with the outside electrically connects or scolding tin joins zone.
As shown in Figure 5: PN maqting type semiconductor grain 15 has the first N type semiconductor district 154, P type semiconductor district 155, the second N type semiconductor district 156 and protective layer 153.The protection of all protected floor 153 of PN composition surface 152 outer rims in P type semiconductor district 155 and the first N type semiconductor district 154 and the second N type semiconductor district 156 is to avoid producing its normal operation of interference effect.
Fig. 6 is the described a kind of PN maqting type semiconductor grain ion doping concentration of one embodiment of the invention and doping depth graph of relation.
Fig. 6 be PN maqting type semiconductor grain 15 in the ion doping stage of manufacture of semiconductor, be doped into P type semiconductor district 155 and the first N type semiconductor district 154 and the ion doping concentration in the second N type semiconductor district 156 and the graph of a relation of doping depth.
As shown in Figure 6: ion doping concentration and the doping depth that can control PN maqting type semiconductor grain 15, meet the specification of international norm lightning Protection test Type-1 with making, thereby can bear the PN maqting type semiconductor grain 15 of the thunderbolt shock wave of 10/1000us.Make the ion doping concentration in the first N type semiconductor district 154 and the second N type semiconductor district 156 be about 5E20 particles/cubic-cm (being that 20 a powers ion of 10 is multiply by in every cubic centimeter of doping 5) by control ion doping concentration and doping depth, and the ion doping concentration in P type semiconductor district 155 is about 1.6E17 particles/cubic-cm (being that 17 a powers ion of 10 is multiply by in every cubic centimeter of doping 1.6), and the doping depth in the first N type semiconductor district 154 and the second N type semiconductor district 156 all is about 40 microns.
As seen from Figure 6: D is PN maqting type semiconductor grain thickness, (thereby scope is 0 ~ 40 to the doping depth that the specification that meets international norm lightning Protection test Type-1 can be born the first N type semiconductor district 154 of PN maqting type semiconductor grain 15 of thunderbolt shock wave of 10/1000us and the second N type semiconductor district 156 from 0 to 40 micron respectively, its thickness equals 40 microns) and D-40 to D micron (scope is D-40 ~ D, and its thickness equals 40 microns).
Equally, as shown in Figure 6: can control PN maqting type semiconductor grain 15 ion doping concentration and doping depths, test the PN maqting type semiconductor grain 15 that the specification of Type-2 can be born the thunderbolt shock wave of 8/20us thereby meet the international norm lightning Protection with making.Make the ion doping concentration in the first N type semiconductor district 154 and the second N type semiconductor district 156 be about 2E20 particles/cubic-cm (being that 20 a powers ion of 10 is multiply by in every cubic centimeter of doping 2) by control ion doping concentration and doping depth, and the ion doping concentration in P type semiconductor district 155 is about 3.66E17 particles/cubic-cm (being that 17 a powers ion of 10 is multiply by in every cubic centimeter of doping 3.66), and the doping depth in the first N type semiconductor district 154 and the second N type semiconductor district 156 all is about 70 microns.
Can be found out by Fig. 6 simultaneously: D is PN maqting type semiconductor grain thickness, (scope is 0 ~ 70 from 0 to 70 micron respectively thereby the specification that meets international norm lightning Protection test Type-2 can be born in the PN maqting type semiconductor grain 15 of thunderbolt shock wave of 8/20us the first N type semiconductor district 154 and the second N type semiconductor district, 156 volume doping depths, its thickness equals 70 microns) and D-70 to D micron (scope is D-70 ~ D, and its thickness equals 70 microns).
In addition, as Fig. 2-shown in Figure 6: PN maqting type semiconductor grain 15 also can pass through semiconductor Mei Shashi (mesa type) processing procedure manufacturing, and all meets the requirement of international lightning test standard IEC61643-1 or UL1449.
Fig. 7 is the cutaway view of the described a kind of coat of one embodiment of the invention.
As shown in Figure 7: coat 20 is insulation, waterproof, resistant to elevated temperatures material, in order to coating protector module 10, and only has the some a part of and second lead-in wire 14 of first lead-in wire 13 to pass coat 20 to coat 20 outsides.And described coat 20 can be a varnish (varnish) coat 20.
Fig. 8 is the cutaway view of the described a kind of adhesive body of one embodiment of the invention.
As shown in Figure 8: adhesive body 30 is formed by megohmite insulant; in order to coat the coat 20 that has coated protector module 10 fully; and only there is the some a part of and second lead-in wire 14 of first lead-in wire 13 to extend through coat 20 and adhesive body 30 respectively, makes the 4th end points 142 of second end points 132 of first lead-in wire 13 and second lead-in wire 14 be positioned at the outside of adhesive body 30.Adhesive body 30 can be a kind of disposal solidifying powder-type epoxy resin; its way is 150 degree Celsius approximately for protector module 10 integral body that will coat coat 20 are heated to; again its contact powder-type epoxy resin is made the epoxy resin fusing and coats coat 20 fully, treat just not redeformation behind the epoxy resin cure.
Fig. 9 is the described a kind of PN maqting type semiconductor grain collapse point of one embodiment of the invention and collapse district and electricity slurry diffusion schematic diagram; Figure 10 is the cutaway view of the B-B direction of Fig. 9.
As Fig. 9 and shown in Figure 10: because the architectural characteristic on semiconductor PN composition surface 152 itself, generally speaking, high surge currents I
PThe collapse point BP that produces builds on the zone in four corners of crystal grain, and the electricity slurry e that collapse (avalanche) produces is thus toward diffusion all around.At the moment of collapse, impulse current I
PAlmost only circulate in the breakdown region BZ, and along with collapse time is more of a specified duration, the electric current that the electricity slurry e that collapse (avalanche) produces forms is more big, breakdown region BZ just continues to enlarge till breakdown region BZ covers whole chip area.Yet, starch the increase of the electric current of e formation along with electricity, the semiconductor gain phenomenon then produces, breakdown region BZ just and then changes the logical zone of more low-impedance high-current flow into, original collapse phenomenon will fade away, and the exhaustion region DPA at remaining PN interface also will fade away because electricity starches electric current I D diffusion, and then enlarges impulse current I
PCirculating area.So, just, can reach the effect that absorbs the heavy current impact ripple.
Aspect the size of selecting PN maqting type semiconductor grain 15, do design with reference to the magnitude of current size that must bear usually.Characteristic of semiconductor according to ion doping concentration and the degree of depth, the PN maqting type semiconductor grain 15 of Type-1 specification has the lower obstacle that strides into and enters the semiconductor gain phenomenon, in other words, can produce the semiconductor gain phenomenon in lower current density and in than the short time, this characteristic represents that the logical region area of its high-current flow is less compared to the PN maqting type semiconductor grain 15 of Type-2 specification.And the PN maqting type semiconductor grain 15 of Type-2 specification just can enter the semiconductor gain phenomenon under the time of higher current density and comparatively delay, and the logical region area of its required high-current flow is bigger.For instance, at the impulse current I of protected assembly or the 100 required thunderbolts of passing through of semiconductor lightning strike protection device or surging
PDuring greater than the situation of 3KA, the length of side of a square PN maqting type semiconductor grain 15 needs more than the 5mm usually.More big crystal grain contact area, its diffusion time will be more long, and then the impact that can bear the bigger magnitude of current.
Figure 11 is the described a kind of PN maqting type semiconductor grain of one embodiment of the invention and the equivalent capacity figure that is connected in series.
As shown in figure 11: the semiconductor lightning strike protection device 100 with two above PN maqting type semiconductor grains 15 also can be applied to reduce semiconductor lightning strike protection device 100 capacitances.In Figure 11, C is the equivalent capacity of PN maqting type semiconductor grain 15, the characteristic that capacitance diminishes when being in series by electric capacity, the combination of a plurality of PN maqting type of the serial connection shown in Fig. 8 first half semiconductor grain 15 and conductive copper sheet 16, be equal to the equivalent electric circuit shown in Fig. 8 Lower Half a plurality of equivalent capacity C are connected, its whole combination capacitor value will diminish.So, the user can be combined into it easily and use required capacitance.
Figure 12 is the described a kind of semiconductor lightning strike protection device stereogram of one embodiment of the invention.
As Fig. 2-shown in Figure 12: semiconductor lightning strike protection device 100; its with varnish as coat 20; and with disposal solidifying powder-type epoxy resin as adhesive body 30, wherein adhesive body 30 extends the some that coats first lead-in wire, 13 and second lead-in wire 14 that passes coat 20 and adhesive body 30 respectively.The semiconductor lightning strike protection device 100 of manufactured according to this; compare with the adhesive body 30 of the black collagen material of conventional solid; because the black glue processing procedure of conventional solid need use the matched moulds machine to carry out the plastic packaging processing procedure; disposal solidifying powder-type epoxy resin has more easily structural change adaptability and applicable to any structure, also can avoid because produce when matched moulds and colloid solidification push pressure and cause the damage of black box.
Figure 13 is the thunderbolt ripple test data figure of the described a kind of semiconductor lightning strike protection device of one embodiment of the invention.
As shown in figure 13: at the same components area and use under the big electric current surging test of 10/1000us specification, the voltage-current characteristic curve of the PN maqting type semiconductor grain of making according to Type-1 or Type-2 specification 15.According to ion doping concentration and degree of depth volume characteristic of semiconductor, the PN maqting type semiconductor grain 15 of Type-1 specification has the lower obstacle that strides into and enters the semiconductor gain phenomenon, in other words, can produce the semiconductor gain phenomenon in lower current density and in than the short time, the PN maqting type semiconductor grain 15 of Type-1 specification as shown in figure 13 namely begins to enter the semiconductor gain phenomenon from the S1 zone.
Simultaneously as shown in figure 13, the PN maqting type semiconductor grain 15 of Type-2 specification just just can begin to enter the semiconductor gain phenomenon under the time of higher current density and comparatively delay in the S2 zone, and also therefore the logical region area of its required high-current flow is bigger.
Please more in the lump with reference to figure 5 and Fig. 6, control ion doping concentration can change the efficient that penetrates on electricity slurry e conduction velocity and PN composition surface 152, and then effectively the needed current density of semiconductor gain phenomenon takes place in change.The ion doping concentration that meets the Type-1 specification; can make the PN maqting type semiconductor grain 15 of same components area under lower current densities;, dissipation power increases circulating current density because descending; the circulation that so can increase thunder-strike current reaches more than 2 times, has promoted the surging protective capability and tolerance persistence of Type-1 specification PN maqting type semiconductor grain 15 greatly.
And for the thunderbolt of the 8/20us more than 3KA ripple, 15 of PN maqting type semiconductor grains that carry out the Type-2 specification of ion doping according to the embodiment of the invention have excellent expressive ability, can bear moment 10000 (ampere/square centimeter) above high current density.
As shown in figure 13, Type-1 specification PN maqting type semiconductor grain 15 is different with Type-2 specification PN maqting type semiconductor grain 15 test results, it mainly is the electrical characteristic difference of paying attention to because of according to the PN maqting type semiconductor grain 15 of 10/1000us (Type-1) or the manufacturing of 8/20us (Type-2) specification, 8/20us (Type-2) pays attention to the magnitude of current of circulation huge amount in the extremely of short duration time, and 10/1000us (Type-1) then pays attention to bear the long time of high-amperage.The user can comply with different demands, selects to use the described ion doping concentration of the embodiment of the invention and doping depth, makes to meet the different semiconductor lightning strike protection devices 100 that use specification.
The present invention is illustrated according to above-described embodiment, should be appreciated that above-described embodiment does not limit the present invention in any form, and all employings are equal to replaces or technical scheme that the equivalent transformation mode obtains, all drops within protection scope of the present invention.
Claims (10)
1. semiconductor lightning strike protection device; it is characterized in that; comprise a protector module; described protector module comprises first dististyle; second dististyle; PN junction mould assembly semiconductor grain; first lead-in wire; second lead-in wire; coat and adhesive body; described first dististyle and second dististyle are oppositely arranged; described PN maqting type semiconductor grain is arranged between first dististyle and second dististyle; and connect airtight with scolding tin with second dististyle with first dististyle respectively and be connected; described coat is coated on described first dististyle; the outside of second dististyle and PN junction mould assembly semiconductor grain; described adhesive body then is coated on the outside of coat; and an end of described first lead-in wire is connected with the first dististyle conductive phase; the other end passes coat and adhesive body is exposed on the external; equally; one end of described second lead-in wire is connected with the second dististyle conductive phase, and the other end passes coat and adhesive body is exposed on the external.
2. a kind of semiconductor lightning strike protection device according to claim 1 is characterized in that, described PN junction mould assembly semiconductor grain is at least two, and between the adjacent PN maqting type semiconductor grain also electrical Joint conductive copper sheet is arranged.
3. a kind of semiconductor lightning strike protection device according to claim 1 and 2 is characterized in that described first dististyle and second dististyle are copper sheet.
4. a kind of semiconductor lightning strike protection device according to claim 1 and 2 is characterized in that described coat is the varnish layer.
5. a kind of semiconductor lightning strike protection device according to claim 1 and 2 is characterized in that, the material of described adhesive body is disposable pressed powder type epoxy resin.
6. a kind of semiconductor lightning strike protection device according to claim 1 and 2 is characterized in that, described first lead-in wire and second lead-in wire are solid copper wire.
7. a kind of semiconductor lightning strike protection device according to claim 1 and 2 is characterized in that, described PN maqting type semiconductor grain meets the specification of Type-1 in the test of international norm lightning Protection, can bear the thunderbolt shock wave of 10/1000us.
8. a kind of semiconductor lightning strike protection device according to claim 7; it is characterized in that; the ion doping concentration in the N type semiconductor district of described PN maqting type semiconductor grain is that every cubic centimeter of 5E20 ion and doping depth are 40 microns, and the ion doping concentration in P type semiconductor district is every cubic centimeter of 1.6E17 ion.
9. a kind of semiconductor lightning strike protection device according to claim 1 and 2 is characterized in that, described PN maqting type semiconductor grain meets the specification of Type-2 in the test of international norm lightning Protection, can bear the thunderbolt shock wave of 8/20us.
10. a kind of semiconductor lightning strike protection device according to claim 9; it is characterized in that; the ion doping concentration in the N type semiconductor district of described PN maqting type semiconductor grain is that every cubic centimeter of 2E20 ion and doping depth are 70 microns, and the ion doping concentration in P type semiconductor district is every cubic centimeter of 3.66E17 ion.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN201498983U (en) * | 2009-08-26 | 2010-06-02 | 苏州晶讯科技股份有限公司 | Programmable semiconductor anti-surge protective device with deep well structure |
| CN101764400A (en) * | 2009-12-11 | 2010-06-30 | 龚建良 | Surge absorption device |
| CN102544112A (en) * | 2010-12-07 | 2012-07-04 | 中国振华集团永光电子有限公司 | Transient voltage suppression diode |
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2013
- 2013-05-10 CN CN201310172233.5A patent/CN103258816B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201498983U (en) * | 2009-08-26 | 2010-06-02 | 苏州晶讯科技股份有限公司 | Programmable semiconductor anti-surge protective device with deep well structure |
| CN101764400A (en) * | 2009-12-11 | 2010-06-30 | 龚建良 | Surge absorption device |
| CN102544112A (en) * | 2010-12-07 | 2012-07-04 | 中国振华集团永光电子有限公司 | Transient voltage suppression diode |
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