CN103227634A - Low-power dissipation USB (Universal Serial Bus) high-speed signal level conversion circuit - Google Patents

Low-power dissipation USB (Universal Serial Bus) high-speed signal level conversion circuit Download PDF

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Publication number
CN103227634A
CN103227634A CN2013101762525A CN201310176252A CN103227634A CN 103227634 A CN103227634 A CN 103227634A CN 2013101762525 A CN2013101762525 A CN 2013101762525A CN 201310176252 A CN201310176252 A CN 201310176252A CN 103227634 A CN103227634 A CN 103227634A
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China
Prior art keywords
effect transistor
field effect
field
node
effect tube
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CN2013101762525A
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Chinese (zh)
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关健
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SUZHOU WENXIN MICROELECTRONIC TECHNOLOGY Co Ltd
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SUZHOU WENXIN MICROELECTRONIC TECHNOLOGY Co Ltd
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Priority to CN2013101762525A priority Critical patent/CN103227634A/en
Publication of CN103227634A publication Critical patent/CN103227634A/en
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Abstract

The invention discloses a low-power dissipation USB (Universal Serial Bus) high-speed signal level conversion circuit. A first node is formed through the connection of the grid of a first field-effect tube and the grid and the drain of a second field-effect tube; a third node is formed through the connection of the drain of a fifth field-effect tube and the drain of the first field-effect tube; a second node and a fourth node are respectively formed through the symmetrical connection of a third field-effect tube, a fourth field-effect tube and a seventh field-effect tube relative to the first field-effect tube, the second field-effect tube and the fifth field-effect tube; the drain of a ninth field-effect tube is respectively connected with the sources of a tenth field-effect tube and an eleventh field-effect tube; both the drain of the tenth field-effect tube and the grid of the eleventh field-effect tube are connected to the third node; both the grid of the tenth field-effect tube and the drain of the eleventh field-effect tube are connected to the fourth node; a twelfth field-effect tube is connected between the first node and the ground; a fourteenth field-effect tube is connected between the second node and the drain of a sixth field-effect tube; and a thirteenth field-effect tube and a fifteenth field-effect tube are symmetrically connected relative to the twelfth field-effect tube and the fourteenth field-effect tube. By adopting the low-power dissipation USB high-speed signal level conversion circuit, the power dissipation can be reduced.

Description

A kind of low-power consumption USB high speed signal level switching circuit
Technical field
The present invention relates to CMOS integrated circuit (IC) design field, relate in particular to a kind of low-power consumption USB high speed signal level switching circuit.
Background technology
Generally, USB2.0 data from digital circuit blocks, the output level of digital circuit blocks is 1.0V or 1.2V, and the bus driver level of USB2.0 is 3.3V, and this just needs a level shifting circuit that low-voltage signal (1.0V or 1.2V) is converted to high-voltage signal.Under the fast mode of USB2.0, its data frequency has reached 480MHz, so can not be with common low speed level translator.Fig. 1 is existing high-speed level change-over circuit, when transfer of data or free time higher current drain is arranged all, has increased the power consumption of USB2.0.
Summary of the invention
The technical problem that the present invention mainly solves provides a kind of low-power consumption USB high speed signal level switching circuit, and power consumption is lower during the free of data transmission, reduces circuit power consumption, has improved the serviceability of circuit.
For solving the problems of the technologies described above, the technical solution used in the present invention is: a kind of low-power consumption USB high speed signal level switching circuit is provided, comprise first to the 8th field effect transistor, the drain and gate of the grid of described first field effect transistor and second field effect transistor electrically connects and forms first node, the drain and gate of the grid of the 3rd field effect transistor and the 4th field effect transistor electrically connects and forms Section Point, the drain electrode of the drain electrode of the 5th field effect transistor and first field effect transistor electrically connects and forms the 3rd node, the drain electrode of the drain electrode of the 7th field effect transistor and the 3rd field effect transistor electrically connects and forms the 4th node, described level shifting circuit further comprises open circuit, described open circuit comprises the 9th to the 15 field effect transistor, the drain electrode of described the 9th field effect transistor electrically connects with the source electrode of the tenth to the 11 field effect transistor respectively, the drain electrode of the tenth field effect transistor and the grid of the 11 field effect transistor all electrically connect with the 3rd node, the grid of the tenth field effect transistor and the drain electrode of the 11 field effect transistor all electrically connect with the 4th node, described the 12 field effect transistor is connected between first node and the ground, the 13 field effect transistor is connected between Section Point and the ground, the 14 field effect transistor is connected between the drain electrode of Section Point and the 6th field effect transistor, and the 15 field effect transistor is connected between the drain electrode of first node and the 8th field effect transistor.
In a preferred embodiment of the present invention, described first to fourth field effect transistor and the 9th to the 11 field effect transistor are the P-channel field-effect transistor (PEFT) pipe.
In a preferred embodiment of the present invention, described the 5th to the 8th field effect transistor and the 12 to 15 field effect transistor are N channel field-effect pipe.
In a preferred embodiment of the present invention, the source ground of described the 12 field effect transistor, drain electrode electrically connects with first node; The source ground of the 13 field effect transistor, drain electrode electrically connects with Section Point; The drain electrode of the source electrode of the 14 field effect transistor and the 6th field effect transistor electrically connects, and drain electrode electrically connects with Section Point, and the drain electrode of the source electrode of the 15 field effect transistor and the 8th field effect transistor electrically connects, and drain electrode electrically connects with first node.
In a preferred embodiment of the present invention, the source electrode of the source electrode of described first to fourth field effect transistor and the 9th field effect transistor all is connected with power supply.
In a preferred embodiment of the present invention, the source grounding of described the 5th to the 8th field effect transistor.
In a preferred embodiment of the present invention, described the 3rd node and the 4th node are signal output part.
In a preferred embodiment of the present invention, the grid of the grid of described the 5th field effect transistor and the 7th field effect transistor is signal input part.
In a preferred embodiment of the present invention, described level shifting circuit further comprises the control signal output circuit, described control signal output circuit comprises first output of exporting first signal and second output of exporting secondary signal, the grid of described the 12 to the 13 field effect transistor all electrically connects with first output, and the grid of the 14 to the 15 field effect transistor and the 9th field effect transistor all electrically connects with second output.
The invention has the beneficial effects as follows: power consumption is lower during the free of data transmission, reduces circuit power consumption, has improved the serviceability of circuit.
Description of drawings
Fig. 1 is the circuit diagram of existing high speed signal level switching circuit;
Fig. 2 is the circuit diagram of low-power consumption USB high speed signal level switching circuit of the present invention;
Fig. 3 is the circuit diagram of the low-power consumption USB high speed signal level switching circuit of open circuit of the present invention when not working;
The circuit diagram of the low-power consumption USB high speed signal level switching circuit when Fig. 4 is open circuit of the present invention work.
The mark of each parts is as follows in the accompanying drawing: M1, first field effect transistor; M2, second field effect transistor; M3, the 3rd field effect transistor; M4, the 4th field effect transistor; M5, the 5th field effect transistor; M6, the 6th field effect transistor; M7, the 7th field effect transistor; M8, the 8th field effect transistor; M9, the 9th field effect transistor; M10, the tenth field effect transistor; M11, the 11 field effect transistor; M12, the 12 field effect transistor; M13, the 13 field effect transistor; M14, the 14 field effect transistor; M15, the 15 field effect transistor; VCC, power supply; INP, first input signal; INN, second input signal; OUTN, first output signal; OUTP, second output signal; PD, first signal; PDB, secondary signal; A1, first node; A2, Section Point; A3, the 3rd node; A4, the 4th node.
Embodiment
Below in conjunction with accompanying drawing preferred embodiment of the present invention is described in detail, thereby protection scope of the present invention is made more explicit defining so that advantages and features of the invention can be easier to be it will be appreciated by those skilled in the art that.
See also Fig. 1 to Fig. 4, the embodiment of the invention comprises:
A kind of low-power consumption USB high speed signal level switching circuit comprises the first to the 15 field effect transistor, and wherein, the 9th to the 15 field effect transistor is formed open circuit.Described first to fourth field effect transistor and the 9th to the 11 field effect transistor are the P-channel field-effect transistor (PEFT) pipe.Described the 5th to the 8th field effect transistor and the 12 to the 15 field effect transistor are N channel field-effect pipe.
The drain and gate of the grid of the first field effect transistor M1 of the present invention and the second field effect transistor M2 electrically connects and forms first node a1, the drain and gate of the grid of the 3rd field effect transistor M3 and the 4th field effect transistor M4 electrically connects and forms Section Point a2, the drain electrode of the drain electrode of the 5th field effect transistor M5 and the first field effect transistor M1 electrically connects and forms the 3rd node a3, and the drain electrode of the drain electrode of the 7th field effect transistor M7 and the 3rd field effect transistor M3 electrically connects and form the 4th node a4.The grid of the grid of described the 5th field effect transistor M5 and the 7th field effect transistor M7 is signal input part, and described the 3rd node a3 and the 4th node a4 are signal output part.
The drain electrode of described the 9th field effect transistor M9 electrically connects with the source electrode of the tenth to the 11 field effect transistor respectively; The drain electrode of the tenth field effect transistor M10 and the grid of the 11 field effect transistor M11 all electrically connect with the 3rd node a3, and the grid of the tenth field effect transistor M10 and the drain electrode of the 11 field effect transistor M11 all electrically connect with the 4th node a4; The source ground of described the 12 field effect transistor M12, drain electrode electrically connects with first node a1; The source ground of the 13 field effect transistor M13, drain electrode electrically connects with Section Point a2; The drain electrode of the source electrode of the 14 field effect transistor M14 and the 6th field effect transistor M6 electrically connects, and drain electrode electrically connects with Section Point a2; The drain electrode of the source electrode of the 15 field effect transistor M15 and the 8th field effect transistor M8 electrically connects, and drain electrode electrically connects with first node a1.Wherein, described the 12 field effect transistor M12 and the 13 field effect transistor M13 are undersized than pipe.
USB high speed signal level switching circuit of the present invention further comprises the control signal output circuit, described control signal output circuit comprises first output of exporting the first signal PD and second output of exporting secondary signal PDB, the grid of described the 12 to the 13 field effect transistor all electrically connects with first output, and the grid of the 14 to the 15 field effect transistor and the 9th field effect transistor M9 all electrically connects with second output.
When using USB high speed signal level switching circuit of the present invention, the source electrode of the source electrode of described first to fourth field effect transistor M4 and the 9th field effect transistor M9 all is connected with power supply VCC, the source grounding of described the 5th to the 8th field effect transistor M8, the described first signal PD controls the 12 field effect transistor M12 and the 13 field effect transistor M13 disconnects or closure, and described secondary signal PDB controls the 9th field effect transistor M9, the 14 field effect transistor M14 and the 15 field effect transistor M15 disconnects or closure.Wherein, the 12 to the 15 field effect transistor is a N channel field-effect pipe, conducting when the grid input high level; The 9th field effect transistor M9 is the P-channel field-effect transistor (PEFT) pipe, conducting when the grid input low level.
When USB high speed signal level switching circuit of the present invention transmits data, described signal input part input low-voltage signal, the the 5th to the 8th field effect transistor M8 conducting, the first signal PD of described control signal output circuit output is a low level, secondary signal PDB is a high level, described the 9th field effect transistor M9, the 12 field effect transistor M12 and the 13 field effect transistor M13 disconnect, described the 14 field effect transistor M14 and the 15 field effect transistor M15 conducting, therefore, the the tenth to the 11 field effect transistor all disconnects, the transfer of data principle is consistent with existing level shifting circuit with process, described signal output part output high-voltage signal.In the present embodiment, described USB high speed signal level switching circuit is applied to the USB2.0 circuit, and described low-voltage signal is 1.2V, and described high-voltage signal is 3.3V.
When USB high speed signal level switching circuit of the present invention does not transmit data, the first signal PD of described control signal output circuit output is a high level, secondary signal PDB is a low level, described the 9th field effect transistor M9, the 12 field effect transistor M12 and the 13 field effect transistor M13 conducting, described the 14 field effect transistor M14 and the 15 field effect transistor M15 disconnect, therefore, the described the tenth and the equal conducting of the 11 field effect transistor, described the 12 field effect transistor M12 and the 13 field effect transistor M13 are equal to resistance at this moment, the electric current that flows through is less, and described USB high speed signal level switching circuit enters low power consumpting state.In addition, the voltage of described first node a1 and Section Point a2 is consistent during data with transmission, can avoid so never transmitting data to that first Bit data distorts in the process of transmission data transaction.
Power consumption was lower when free of data of the present invention was transmitted, and reduced circuit power consumption, had improved the serviceability of circuit.
The above only is embodiments of the invention; be not so limit claim of the present invention; every equivalent structure or equivalent flow process conversion that utilizes specification of the present invention and accompanying drawing content to be done; or directly or indirectly be used in other relevant technical fields, all in like manner be included in the scope of patent protection of the present invention.

Claims (9)

1. low-power consumption USB high speed signal level switching circuit, comprise first to the 8th field effect transistor, the drain and gate of the grid of described first field effect transistor and second field effect transistor electrically connects and forms first node, the drain and gate of the grid of the 3rd field effect transistor and the 4th field effect transistor electrically connects and forms Section Point, the drain electrode of the drain electrode of the 5th field effect transistor and first field effect transistor electrically connects and forms the 3rd node, the drain electrode of the drain electrode of the 7th field effect transistor and the 3rd field effect transistor electrically connects and forms the 4th node, it is characterized in that, described level shifting circuit further comprises open circuit, described open circuit comprises the 9th to the 15 field effect transistor, the drain electrode of described the 9th field effect transistor electrically connects with the source electrode of the tenth to the 11 field effect transistor respectively, the drain electrode of the tenth field effect transistor and the grid of the 11 field effect transistor all electrically connect with the 3rd node, the grid of the tenth field effect transistor and the drain electrode of the 11 field effect transistor all electrically connect with the 4th node, described the 12 field effect transistor is connected between first node and the ground, the 13 field effect transistor is connected between Section Point and the ground, the 14 field effect transistor is connected between the drain electrode of Section Point and the 6th field effect transistor, and the 15 field effect transistor is connected between the drain electrode of first node and the 8th field effect transistor.
2. low-power consumption USB high speed signal level switching circuit as claimed in claim 1 is characterized in that described first to fourth field effect transistor and the 9th to the 11 field effect transistor are the P-channel field-effect transistor (PEFT) pipe.
3. low-power consumption USB high speed signal level switching circuit as claimed in claim 2 is characterized in that, described the 5th to the 8th field effect transistor and the 12 to 15 field effect transistor are N channel field-effect pipe.
4. low-power consumption USB high speed signal level switching circuit as claimed in claim 3 is characterized in that, the source ground of described the 12 field effect transistor, and drain electrode electrically connects with first node; The source ground of the 13 field effect transistor, drain electrode electrically connects with Section Point; The drain electrode of the source electrode of the 14 field effect transistor and the 6th field effect transistor electrically connects, and drain electrode electrically connects with Section Point, and the drain electrode of the source electrode of the 15 field effect transistor and the 8th field effect transistor electrically connects, and drain electrode electrically connects with first node.
5. low-power consumption USB high speed signal level switching circuit as claimed in claim 3 is characterized in that, the source electrode of the source electrode of described first to fourth field effect transistor and the 9th field effect transistor all is connected with power supply.
6. low-power consumption USB high speed signal level switching circuit as claimed in claim 3 is characterized in that the source grounding of described the 5th to the 8th field effect transistor.
7. low-power consumption USB high speed signal level switching circuit as claimed in claim 1 is characterized in that described the 3rd node and the 4th node are signal output part.
8. low-power consumption USB high speed signal level switching circuit as claimed in claim 1 is characterized in that the grid of the grid of described the 5th field effect transistor and the 7th field effect transistor is signal input part.
9. low-power consumption USB high speed signal level switching circuit as claimed in claim 1, it is characterized in that, described level shifting circuit further comprises the control signal output circuit, described control signal output circuit comprises first output of exporting first signal and second output of exporting secondary signal, the grid of described the 12 to the 13 field effect transistor all electrically connects with first output, and the grid of the 14 to the 15 field effect transistor and the 9th field effect transistor all electrically connects with second output.
CN2013101762525A 2013-05-14 2013-05-14 Low-power dissipation USB (Universal Serial Bus) high-speed signal level conversion circuit Pending CN103227634A (en)

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Application Number Priority Date Filing Date Title
CN2013101762525A CN103227634A (en) 2013-05-14 2013-05-14 Low-power dissipation USB (Universal Serial Bus) high-speed signal level conversion circuit

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Application Number Priority Date Filing Date Title
CN2013101762525A CN103227634A (en) 2013-05-14 2013-05-14 Low-power dissipation USB (Universal Serial Bus) high-speed signal level conversion circuit

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080164931A1 (en) * 2006-11-22 2008-07-10 Freescale Semiconductor, Inc. Level shifter circuit
CN101262219A (en) * 2007-02-12 2008-09-10 三星电子株式会社 Level shifter capable of high speed operation and high-speed level shifting method
CN101686048A (en) * 2008-07-10 2010-03-31 台湾积体电路制造股份有限公司 Low leakage voltage level shifting circuit
CN203289402U (en) * 2013-05-14 2013-11-13 苏州文芯微电子科技有限公司 Low-power-consumption high-speed signal level conversion circuit for USB (universal serial bus)

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080164931A1 (en) * 2006-11-22 2008-07-10 Freescale Semiconductor, Inc. Level shifter circuit
CN101262219A (en) * 2007-02-12 2008-09-10 三星电子株式会社 Level shifter capable of high speed operation and high-speed level shifting method
CN101686048A (en) * 2008-07-10 2010-03-31 台湾积体电路制造股份有限公司 Low leakage voltage level shifting circuit
CN203289402U (en) * 2013-05-14 2013-11-13 苏州文芯微电子科技有限公司 Low-power-consumption high-speed signal level conversion circuit for USB (universal serial bus)

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Application publication date: 20130731