CN103187494A - High voltage light-emitting diode and manufacturing method thereof - Google Patents
High voltage light-emitting diode and manufacturing method thereof Download PDFInfo
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- CN103187494A CN103187494A CN2013100912328A CN201310091232A CN103187494A CN 103187494 A CN103187494 A CN 103187494A CN 2013100912328 A CN2013100912328 A CN 2013100912328A CN 201310091232 A CN201310091232 A CN 201310091232A CN 103187494 A CN103187494 A CN 103187494A
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Abstract
The invention relates to a manufacturing method of a high voltage light-emitting diode. The manufacturing method of the high voltage light-emitting diode comprises the steps of forming an insulating buffer layer on a substrate; forming an n-type semiconductor layer, an active layer and a p-type semiconductor layer on the insulating buffer layer; patterning the n-type semiconductor layer, the active layer and the p-type semiconductor layer, then etching the n-type semiconductor layer, the active layer and the p-type semiconductor layer to form grooves till the insulating buffer layer is exposed out of the bottoms of the grooves, forming a plurality of isolated luminous units through the grooves; and forming metal interconnecting wires, and connecting the adjacent luminous units in series. The manufacturing method is characterized in that the grooves are 2.5mu m-4mu m deep. By adopting the manufacturing method of the high voltage light-emitting diode, the damages to the active area of LED (light-emitting diode), which are caused by the long-term plasma bombardment, are reduced, and the luminous degree of LED is improved.
Description
Technical field
The present invention relates to a kind of high pressure inverted structure light-emitting diode chip for backlight unit.More specifically, the present invention relates to a kind of high-voltage LED chip structure and manufacture method thereof with buffer insulation layer.
Background technology
Light-emitting diode (LED) has life-span length, energy-saving and environmental protection, coloury advantage, therefore, along with the development of technology such as extension, chip, encapsulation, the further raising of luminous efficiency, LED progressively is used for every field such as illumination, demonstration, medical treatment.Traditional gallium nitride based light emitting diode is operated under the direct voltage, and voltage range is at 2.9-3.5V, and operating current is generally 20mA.In order to allow light-emitting diode reach the required brightness of general lighting, generally the operating current of led chip to be brought up to more than the 100mA, at present commonly used have 100mA, 350mA and a 700mA.When LED is used for general lighting, need the electric main about 220V-380V to drive, if adopt the high-capacity LED chip of big electric current, need a bigger transformer in the drive unit, need simultaneously by filter rectifier alternating current to be transformed into direct current, thereby cause whole LED light fixture volume bigger, the life-span also reduces greatly owing to the introducing of electrochemical capacitor (life-span only is 2000-5000 hour).In addition, the line loss that big current drives causes is also than higher, thereby the energy consumption that causes wasting increases, and the burden of light fixture heat radiation also increases.
In US Patent No. 6787999, the single light-emitting diode that many individual packages are good adopts the mode of series connection to be installed in and forms the baroluminescence diode array on the PCB substrate, is used for the high pressure occasion.This scheme can be saved the bigger transformer of volume, also can reduce operating current.But this scheme makes the volume of illuminating module increase greatly, and because each tube core passes through pin interconnection, heat dispersion and reliability decrease again.
In Chinese invention patent application CN102867837A, disclose a kind of on Sapphire Substrate the led array by deep trench isolation, the LED that has realized chip-scale is integrated, reduced the encapsulation volume of illuminating module, adopt the chip-scale layer metal interconnection to replace pin interconnection, improved the reliability of led array.But, in the prior art scheme, as Fig. 1, owing to epitaxial loayer will be etched into Sapphire Substrate 10 from p-type layer 13, needing etching depth is the isolation deep trouth 101 of 4-7um, make interconnection line 20 between each LED unit 100 owing to get over so dark isolation deep trouth 101 the reliability variation, thereby cause the rate of finished products of high-voltage LED chip very low, under high pressure working life also reduces greatly, and deep etching technique process and increased the manufacturing cost of high-voltage LED for the thickening electrode process of realizing the safety interconnection, these problems have influenced industrialization and the commercialization of high-voltage LED greatly, cause the present market utilization rate of high-voltage LED still very low; In addition, the time that deep etching needs is long, and when adopting the ICP etching, plasma bombardment can cause damage to the LED active area for a long time, reduces the luminosity of LED.
Summary of the invention
The objective of the invention is to, a kind of high-voltage LED chip and manufacture method thereof with buffer insulation layer is provided, it can reduce long plasma bombardment the LED active area is caused damage, improves the luminosity of LED.
The invention provides a kind of manufacture method of baroluminescence diode chip for backlight unit, comprising:
Form the buffer insulation layer at substrate;
Form n type semiconductor layer, active layer and p-type semiconductor layer at the buffer insulation layer;
The graphical described n type semiconductor layer of after etching, active layer and p-type semiconductor layer form groove, expose the buffer insulation layer until channel bottom, thereby form a plurality of luminescence units by trench isolations;
Form metal interconnecting wires, adjacent luminescence unit is together in series; It is characterized in that:
The degree of depth of described groove is 2.5um-4um.
The present invention also provides a kind of baroluminescence diode chip for backlight unit, comprising:
Substrate and the epitaxial buffer layer on described substrate;
Have a plurality of luminescence units at epitaxial buffer layer, the isolated groove by the epitaxial buffer layer top between the luminescence unit separates; Each luminescence unit comprises n type semiconductor layer, active layer and p-type semiconductor layer;
Metal interconnecting wires is together in series adjacent luminescence unit; It is characterized in that:
Described epitaxial buffer layer is the buffer insulation layer, and the gross thickness of described n type semiconductor layer, active layer and p type semiconductor layer is 2.5um-4um.
The invention has the beneficial effects as follows: this high-voltage LED chip adopts the buffer insulation layer, the about 2.5-4um of LED epitaxy layer thickness of substrate top, deep trouth only need etch into the buffer insulation layer, and need not to etch into substrate, thereby reduce the etching depth of deep trouth greatly, interconnection line layer through deep trouth between the chip unit can be done thinlyyer, and the reliability of interconnection line also improves greatly under the prerequisite that reduces manufacturing cost, can reduce long-time dry etching to the damage of LED simultaneously.
Description of drawings
For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail, wherein:
Fig. 1 is prior art mesohigh led chip structural representation;
Fig. 2-Fig. 5 is the technical process schematic diagram according to the preparation high-voltage LED chip of first embodiment of the invention;
Embodiment
The invention will be further described below in conjunction with Fig. 2 to Fig. 5 and embodiment.
The basic LED epitaxial loayer of gallium nitride (GaN) comprises substrate 20, the resilient coating 21 that forms at substrate surface and n type semiconductor layer 22, active layer 23, the p-type semiconductor layer 24 that forms at resilient coating 21.Substrate 20 is Sapphire Substrate, SiC substrate, Si substrate, GaN substrate or AlN substrate.Resilient coating 21 is the buffer insulation layer, can be AlN, BN, or the superlattice structure of AlN/GaN, or the GaN of involuntary doping is carried out the p-type light dope, the insulation GaN resilient coating that compensation forms.
Wherein, the AlN resilient coating comprises AlN nucleating layer and the AlN template layer on Sapphire Substrate surface.In MOCVD equipment, feed trimethyl aluminium (TMAl), reacting gas NH
3With carrier gas H
2The temperature to 1000 that at first raises ℃ feeds H
2, to Sapphire Substrate high temperature preliminary treatment a few minutes; Reduce the temperature to then between 500-800 ℃, preferred the about 550-600 of temperature ℃, epitaxial growth low temperature AI N nucleating layer, growth thickness is about between the 20-100nm; The temperature that raises then between 1100-1600 ℃, preferred temperature between 1200-1300 ℃, the growing AIN template layer.Keep MOCVD reative cell low-pressure state in all AlN layer growth processes, between the pressure 30torr-150torr, preferably at 50-100torr.The thickness of AlN resilient coating is 200nm-10um, preferred 500nm-2um.
Because the GaN of involuntary doping is generally n type semiconductor, mix a small amount of Mg therein and wherein electronics is compensated can form insulation GaN layer, utilize this insulation GaN layer can prevent that as resilient coating electric current from passing through from resilient coating.Lightly doped amount is determined according to carrier concentration in the n type semiconductor.The thickness of insulation GaN is 2um-5um.Growth course is with reference to the formation method of low temperature GaN resilient coating in the prior art.
P-type semiconductor layer 24 can be the GaN that Mg mixes, and the GaN material that n type semiconductor 22 mixes for Si, active area 23 comprises the multi-quantum pit structure that GaN/InGaN or AlGaN/InGaN form.The gross thickness of p-type semiconductor layer 24, n type semiconductor layer 22 and active layer 23 is 2.5um-4um.
As Fig. 3, adopt photoresist to carry out graphically to GaN base LED epitaxial layer structure, form groove 241 by dry method or wet etching to buffer insulation layer 21 surface then, isolate LED luminescence unit 242 with this groove 241.Etching process adopts the ICP etching, perhaps utilizes sulfuric acid and phosphoric acid to corrode at a certain temperature.
After etching forms groove 241 or before, adopt dry etching formation table top 243, expose n type semiconductor layer 22, as shown in Figure 4.
As Fig. 5, in groove 241 and the sidewall of adjacent LED luminous units 242 form insulating medium layer 26, insulating medium layer 26 can be silica, silicon nitride or aluminium nitride etc., can form by modes such as PECVD, sputter or spin coatings.The thickness of insulating medium layer 26 exists
It prevents electric leakage as the passivation layer of LED luminescence unit 242 sidewalls.
Form the transparent electrode layer (not shown) as current extending at p-type semiconductor layer 24, this transparent electrode layer can be ITO, Ni/Au alloy or ZnO etc., and transparent electrode layer can form by the mode of sputter or EB.Transparent electrode layer can form before or after etched trench 241 and table top.
Then, on the transparent electrode layer of p-type semiconductor layer 24, form p electrode pads 28, form n electrode pads 29 in n type semiconductor layer 22.
At last, between the p electrode pads 28 of adjacent LED luminescence unit 242 and n electrode pads 29, form metal interconnecting wires 27, make that the LED luminescence unit 242 in the chip is together in series.Metal interconnecting wires 27 forms simultaneously with p and n electrode pads 28,29 and is graphical.Because the degree of depth of groove 241 only has 2.5um-4um, therefore, the thickness of metal interconnecting wires 27 can be thinner, for example gross thickness can
As everyone knows, the semiconductor alloy electrode adopts noble metals such as Pt, Au more, and metal thickness reduces the cost of manufacture that can reduce chip significantly.
Secondly, gash depth of the prior art is generally at least at 5um-8um, and in order to reduce the loss of active area, the groove width in the chip between the luminescence unit is between 10um-20um, under this depth-to-width ratio condition, the reliability of metal interconnecting wires on LED luminescence unit sidewall is difficult to guarantee.And special LED epitaxial structure makes that gash depth only is to be easy to form reliable electrode interconnection by 2.5um-4um among the present invention.
In addition, when etching depth reduces by a half, etch period also corresponding minimizing half, thereby make damage that dry etching brings also reduce greatly the influence of LED brightness.
Embodiment 1
Utilize MOCVD equipment to form the AlN resilient coating at Sapphire Substrate c face, the thickness of AlN resilient coating is 1.2um; Order forms thick GaN/InGaN multiple quantum well layer and the thick p-type GaN layer of 100-300nm of n type GaN layer, 100-200nm about 3um on the AlN resilient coating.
After epitaxial wafer cleaned, electron beam evaporation formed the ito transparent electrode layer on p-type GaN layer, and graphical back ICP etching table top is to exposing n type GaN layer; The PECVD silica also can adopt photoresist to be sequestered in and form the isolated groove that the degree of depth is about 3.5um between the LED luminescence unit as the masking layer of etching groove; Photoetching forms p, n electrode pads zone and metal interconnecting wires zone after removing masking layer, utilizes electron beam evaporation CrPtAu to form p, n electrode pads and metal interconnecting wires, and the gross thickness of CrPtAu is about
At last, attenuate Sapphire Substrate and laser cutting form the high-voltage LED chip behind the sliver.The high-voltage LED chip is in series by 16 LED luminescence units, and operating voltage is about 50V.
More than explanation is just illustrative for the purpose of the present invention; and nonrestrictive, those of ordinary skills understand, under the situation that does not break away from the spirit and scope that following claims limit; can make many modifications, variation or equivalence, but all will fall within the scope of protection of the present invention.
Claims (9)
1. the manufacture method of a baroluminescence diode chip for backlight unit comprises:
Form the buffer insulation layer at substrate;
Form n type semiconductor layer, active layer and p-type semiconductor layer at the buffer insulation layer;
The graphical described n type semiconductor layer of after etching, active layer and p-type semiconductor layer form groove, expose the buffer insulation layer until channel bottom, thereby form a plurality of luminescence units by trench isolations;
Form metal interconnecting wires, adjacent luminescence unit is together in series; It is characterized in that:
The degree of depth of described groove is 2.5um-4um.
2. the manufacture method of baroluminescence diode chip for backlight unit as claimed in claim 1, wherein said buffer insulation layer is AlN or AlN/GaN superlattice.
3. the manufacture method of baroluminescence diode chip for backlight unit as claimed in claim 1, wherein said buffer insulation layer carries out the formed insulation of p-type light dope GaN resilient coating for the GaN to involuntary doping.
4. the manufacture method of baroluminescence diode chip for backlight unit as claimed in claim 1, wherein the thickness of metal interconnecting wires is
5. the manufacture method of baroluminescence diode chip for backlight unit as claimed in claim 1, the degree of depth of wherein said groove is 2.5um-3um.
6. the manufacture method of baroluminescence diode chip for backlight unit as claimed in claim 5, wherein said groove forms by dry etching.
7. the manufacture method of baroluminescence diode chip for backlight unit as claimed in claim 1, wherein substrate is Sapphire Substrate, SiC or Si substrate.
8. the manufacture method of baroluminescence diode chip for backlight unit as claimed in claim 1, wherein the drive current of each luminescence unit is 20-40mA.
9. baroluminescence diode chip for backlight unit comprises:
Substrate and the epitaxial buffer layer on described substrate;
Have a plurality of luminescence units at epitaxial buffer layer, the isolated groove by the epitaxial buffer layer top between the luminescence unit separates; Each luminescence unit comprises n type semiconductor layer, active layer and p-type semiconductor layer;
Metal interconnecting wires is together in series adjacent luminescence unit; It is characterized in that:
Described epitaxial buffer layer is the buffer insulation layer, and the gross thickness of described n type semiconductor layer, active layer and p-type semiconductor layer is 2.5um-4um.
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Cited By (6)
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| CN103762222A (en) * | 2014-01-24 | 2014-04-30 | 中国科学院半导体研究所 | Modularized array high-voltage LED chip and method for manufacturing modularized array high-voltage LED chip |
| CN104538522A (en) * | 2014-12-31 | 2015-04-22 | 杭州士兰明芯科技有限公司 | High-voltage chip LED structure and manufacturing method thereof |
| CN108365061A (en) * | 2018-02-06 | 2018-08-03 | 映瑞光电科技(上海)有限公司 | A kind of LED chip and its manufacturing method |
| CN110061110A (en) * | 2016-04-18 | 2019-07-26 | 首尔伟傲世有限公司 | Light emitting diode |
| CN111725251A (en) * | 2020-07-04 | 2020-09-29 | 厦门友来微电子有限公司 | High-resolution full-color micro LED display |
| CN109244208B (en) * | 2018-09-27 | 2024-02-20 | 佛山市国星半导体技术有限公司 | High-voltage LED chip and manufacturing method thereof |
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Application publication date: 20130703 |