CN103137478A

CN103137478A - Manufacturing method and structure of fin field-effect transistor (FinFET) device

Info

Publication number: CN103137478A
Application number: CN2011103745953A
Authority: CN
Inventors: 赵猛
Original assignee: Semiconductor Manufacturing International Shanghai Corp
Current assignee: Semiconductor Manufacturing International Shanghai Corp
Priority date: 2011-11-21
Filing date: 2011-11-21
Publication date: 2013-06-05

Abstract

The invention provides a manufacturing method and structure of a fin field-effect transistor (FinFET) device. A fin-shaped strained silicon channel region in an hourglass shape is adopted to replace a fin-shaped strained silicon channel region in a traditional rectangular or square shape, breadth-length ratio of a fin-shaped strained silicon channel is increased, driving current of the FinFET device is remarkably improved, and a manufacturing process is simple.

Description

The manufacture method of FinFET device and structure

Technical field

The present invention relates to field of semiconductor manufacture, relate in particular to a kind of manufacture method and structure of FinFET device.

Background technology

MOSFET (metal oxide semiconductor field effect is answered transistor) is the main member of most of semiconductor device, when channel length during less than 100nm, in traditional MOSFET, because the semi-conducting material around the silicon substrate of active area makes between source electrode and drain region interactive, the distance of drain electrode and source electrode also shortens thereupon, produce short-channel effect, the so control ability variation of grid to raceway groove, the difficulty of grid voltage pinch off (pinch off) raceway groove is also increasing, inferior threshold values electric leakage (Subthrehhold leakage) phenomenon is more easily occured.

FINFET (Fin Field effect transistor, FinFET) be that a kind of new metal oxide semiconductor field effect is answered transistor, its structure forms on silicon-on-insulator (SOI) substrate usually, comprise that narrow and isolated silicon strip (is the channel structure of vertical-type, also claim fin), fin both sides are with grid structure.The FinFET structure makes device less, and performance is higher.

As shown in Figure 1, a kind of structure of FinFET device in prior art comprises: SOI substrate 10, source electrode 11, drain electrode 12, fin-shaped strain silicon channel district 13 and the conductive grid structure 14 that is centered around 13 both sides, fin-shaped strain silicon channel district and top.Wherein, source electrode 11, drain electrode 12 and fin-shaped strain silicon channel district 13, to obtain by strained silicon layer and ion implantation technology that patterning is covered on SOI substrate dielectric layer, described fin-shaped strain silicon channel district 13 is generally rectangular shape or square shape, and namely itself and source electrode 11st district and drain electrode 12nd district are " H " font.Described fin-shaped strain silicon channel district 13 thickness as thin as a wafer, and three faces of its protrusion are controlled, are subject to the control of grid.Like this, grid just can comparatively be easy to construct at channel region entirely exhaust structure, thoroughly cuts off the conductive path of raceway groove.

Along with the semiconductor industry is drive on boldly to the 22nm technology node, the FinFET device that requires to make has smaller szie and Geng Gao drive current, yet the FinFET device manufacturing of prior art can not be satisfied this requirement.

Summary of the invention

The object of the present invention is to provide a kind of manufacture method and structure of FinFET device, by increasing the breadth length ratio of fin-shaped strain silicon channel, significantly improve the drive current of device.

For addressing the above problem, the present invention proposes a kind of manufacture method of FinFET device, comprising:

Silicon substrate is provided, forms strained silicon layer on described silicon substrate;

The described strained silicon layer of patterning, the fin-shaped strain silicon channel district of formation source region and drain region and the hourglass shape between described source region and drain region;

Formation is centered around the both sides, fin-shaped strain silicon channel district of described hourglass shape and the grid structure of top;

Take described grid structure as mask, source/drain ion injection is carried out in described source region and drain region, form source electrode and drain electrode.

Further, described source region and drain region are carried out also comprising: take described grid structure as mask, lightly-doped source/drain region Implantation is carried out in described source region and drain region, form lightly-doped source/drain electrode extension area before or after source/drain ion injects.

Further, described silicon substrate is silicon-on-insulator substrate or pure silicon substrate.

Accordingly, the present invention also provides a kind of FinFET device architecture, comprising:

Silicon substrate;

Be positioned at source electrode and drain electrode on described silicon body substrate;

The fin-shaped strain silicon channel district of the hourglass shape between described source electrode and drain electrode; And,

Be centered around the both sides in fin-shaped strain silicon channel district of described hourglass shape and the grid structure of top.

Compared with prior art, the manufacture method of FinFET device provided by the invention and structure, the rectangular shape that fin-shaped strain silicon channel district's replacement of employing hourglass shape is traditional or the fin-shaped strain silicon channel district of square shape, increased the breadth length ratio of fin-shaped strain silicon channel, make the drive current of FinFET device significantly improve, manufacturing process is simple.

Description of drawings

Fig. 1 is the structural representation of a kind of FinFET device of prior art;

Fig. 2 is the flow chart of the FinFET device fabrication of the specific embodiment of the invention;

Fig. 3 A to 3D is the structural representation of the FinFET device fabrication of the specific embodiment of the invention.

Embodiment

Be described in further detail below in conjunction with the manufacture method of the drawings and specific embodiments to the FinFET device of the present invention's proposition.

As shown in Figure 2, the present invention proposes a kind of manufacture method of FinFET device, comprising:

S201 provides the silicon substrate substrate, forms strained silicon layer on described silicon substrate substrate;

S202, the described strained silicon layer of patterning, the fin-shaped strain silicon channel district of formation source region and drain region and the hourglass shape between described source region and drain region;

S203 forms and is centered around the both sides, fin-shaped strain silicon channel district of described hourglass shape and the grid structure of top;

S204 take described grid structure as mask, carries out source/drain ion injection to described source region and drain region, forms source electrode and drain electrode.

Below in conjunction with accompanying drawing 3A～3D, S201 shown in Figure 2～S204 step is described in further detail.

S201 provides silicon substrate, forms strained silicon layer on described silicon substrate.

As shown in Figure 3A, silicon substrate substrate 300 is provided, can be SOI (silicon-on-insulator) substrate, pure silicon substrate etc., on described silicon substrate 300, by forming strained silicon layer 301a such as the usual manner of chemical vapour deposition (CVD) and Implantation etc., such as forming strained silicon layer 301a or adopt, the chemical vapour deposition (CVD) of the mist that adopts silane and germane forms strained silicon layer 301a in the Ge~+ implantation silicon layer.Also comprise Implantation ion or fluorine ion in the described strained silicon layer 301a after forming strained silicon layer 301a, with the fault of construction that improvement is produced by sneaking into of other ions, carbon ion or fluorine ion are for example 2%～13% in the concentration of strained silicon layer 301a.

S202, the described strained silicon layer of patterning, the fin-shaped strain silicon channel district of formation source region and drain region and the hourglass shape between described source region and drain region.

As shown in Fig. 3 B, take hourglass shape mask plate (not shown) as mask, the described strained silicon layer 301a of patterning, obtain the fin-shaped strain silicon channel district 301 of source region 302a, drain region 303a and hourglass shape, that is to say, source region 302a, drain region 303a and the fin-shaped strain silicon channel district between described source region and drain region 301 are the hourglass shape, and hourglass shape herein also can be understood as the funnel-form of bowknot shape or two docking.The fin-shaped strain silicon channel district 301 of hourglass shape has larger breadth length ratio W/L with respect to the fin-shaped strain silicon channel district 13 of rectangular shape traditional in Fig. 1 or square shape, makes the drive current of FinFET device significantly improve

S203 forms and is centered around the both sides, fin-shaped strain silicon channel district of described hourglass shape and the grid structure of top.

As shown in Figure 3 C, deposition gate oxide and grid layer (not shown) above the fin-shaped strain silicon channel district 301 of silicon substrate 300, source region 302a, drain region 303a and hourglass shape, etching grid layer and gate oxide successively again form the grid structure 304 of the both sides, fin-shaped strain silicon channel district and the top that are centered around described hourglass shape.Preferably, after forming grid structure 304, also form contact etch stop layer (CESL) above the fin-shaped strain silicon channel district 301 of silicon substrate 300, source region 302a, drain region 303a, hourglass shape and grid structure 304, and planarization makes grid structure 304 reach the predefine height.

S204 take described grid structure as mask, carries out the source-drain electrode Implantation to described source region and drain region, forms source electrode and drain electrode.

As shown in Fig. 3 D, take described grid structure 304 as mask, described source region 302a, drain region 303a are carried out the source-drain electrode Implantation, form source electrode 302 and drain electrode 303.

In other embodiments of the invention, before or after described 302a, drain region 303a are carried out source/drain ion injection, also comprise: take described grid structure as mask, lightly-doped source/drain region Implantation is carried out in described source region and drain region, form lightly-doped source/drain electrode extension area, obtain longer effective raceway groove, further improve short-channel effect, improve carrier mobility, reduce junction capacitance and junction leakage, obtain higher device drive current.

Accordingly, the present invention also proposes a kind of FinFET device architecture, as shown in Fig. 3 D, comprising:

Silicon substrate 300;

Be positioned at source electrode 302 and drain electrode 303 on described silicon substrate;

The fin-shaped strain silicon channel district 301 of the hourglass shape between described source electrode and drain electrode; And,

Be centered around the both sides in fin-shaped strain silicon channel district of described hourglass shape and the grid structure 304 of top.

Wherein, silicon substrate 300 can be SOI (silicon-on-insulator) substrate, pure silicon substrate etc.

Need to prove, theoretical and research all shows, improves the breadth length ratio of carrier mobility, grid capacitance, raceway groove and reduce threshold voltage etc. all to increase favourable to the drive current of MOS device.The manufacture method of FinFET device provided by the invention and structure, the rectangular shape that fin-shaped strain silicon channel district's replacement of employing hourglass shape is traditional or the fin-shaped strain silicon channel district of square shape, increased the breadth length ratio of fin-shaped strain silicon channel, make the drive current of FinFET device significantly improve, manufacturing process is simple.

Obviously, those skilled in the art can carry out various changes and modification and not break away from the spirit and scope of the present invention invention.Like this, if within of the present invention these are revised and modification belongs to the scope of claim of the present invention and equivalent technologies thereof, the present invention also is intended to comprise these changes and modification interior.

Claims

1. the manufacture method of a FinFET device, is characterized in that, comprising:

2. the manufacture method of FinFET device as claimed in claim 1, it is characterized in that, described source region and drain region are carried out before or after source/drain ion injects, also comprise: take described grid structure as mask, lightly-doped source/drain region Implantation is carried out in described source region and drain region, form lightly-doped source/drain electrode extension area.

3. the manufacture method of FinFET device as claimed in claim 1, is characterized in that, described silicon substrate is silicon-on-insulator substrate or pure silicon substrate.

4. a FinFET device architecture, is characterized in that, comprising:

Silicon substrate;

5. the manufacture method of FinFET device as claimed in claim 5, is characterized in that, described silicon substrate is silicon-on-insulator substrate or pure silicon substrate.