CN103107107B - 提高厚膜混合集成电路同质键合系统批量生产性的方法 - Google Patents

提高厚膜混合集成电路同质键合系统批量生产性的方法 Download PDF

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CN103107107B
CN103107107B CN201210535642.2A CN201210535642A CN103107107B CN 103107107 B CN103107107 B CN 103107107B CN 201210535642 A CN201210535642 A CN 201210535642A CN 103107107 B CN103107107 B CN 103107107B
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aluminium
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CN103107107A (zh
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杨成刚
苏贵东
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Guizhou Zhenhua Fengguang Semiconductor Co.,Ltd.
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    • HELECTRICITY
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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    • H01L2924/19101Disposition of discrete passive components
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Abstract

本发明公开了提高厚膜混合集成电路同质键合系统批量生产性的方法,该方法选择由有机纤维制成的旋转式抛光垫,贵金属抛光液,通过旋转式抛光机对整个金导带及键合区进行整体抛光;然后进行电阻浆料印刷、烧结和调阻;接着用机械掩模的方法,在高真空溅射台或蒸发台中,在键合区表面形成一层铝薄膜、镍-铬-铝或铬-铜-铝复合薄膜;最后,按常规混合集成电路集成工艺,将半导体芯片和片式元器件集成在处理后的厚膜基片上,半导体芯片的键合采用硅-铝丝键合,管脚与基片间采用金丝键合,即实现质量一致性好、可靠性高的金-金、铝-铝同质键合。本方法生产的器件应用领域广泛,特别适用于大功率、高可靠、宇航级领域,具有广阔市场和应用空间。

Description

提高厚膜混合集成电路同质键合系统批量生产性的方法
技术领域
本发明涉及集成电路,进一步来说,涉及混合集成电路,尤其涉及同质键合系统的厚膜混合集成电路。
背景技术
原有厚膜混合集成电路同质键合系统的生产是:在陶瓷衬底基片上,采用丝网印刷的方式,将金浆、银浆或钯-银浆料等导体浆料、钌系电阻浆料,按产品版图设计的要求,在基片上形成导带、阻带图形,经高温烧结后成型。在导带的端头、或指定的地方,形成键合区域、半导体芯片组装区域、或其它片式元器件组装区域,其余区域(包括厚膜阻带)用玻璃铀绝缘层进行表面保护。在基片上进行半导体芯片、其他片式元器件的组装,芯片(通常为铝键合区)、导带(通常为金或银键合区)、管脚(通常为金或镍键合区)之间采用金丝或硅-铝丝进行键合联接,形成完整的电路连接。
由此形成的键合系统为金-铝(Au-Al)、银-铝(Ag-Al)或镍-铝(Ni-Al)异质键合系统,其中,银导带、钯银导带中,银容易氧化,且在长期通电情况下,容易产生电迁移现象,严重影响器件的可靠性,通常表现为键合强度的衰退;金导带在大电流情况下,在Au-Al键合系统中,键合接触区域金层电迁移现象明显,在Au-Al间容易形成“紫斑”,其产物成份为AuAl2,造成Au-Al键合时形成的合金点疏松和空洞化, 最终键合力大幅下降;金-铝键合系统在高温下,由于金向铝中扩散,Au-Al间形成“白斑”, 其产物为Au2Al、Au5Al2、Au5Al,形成一层脆而绝缘的金属间化合物(即金铝化合物),这种产物可以使合金点电导率大幅降低, 严重时可以形成开路。因此,采用金-铝(Au-Al)、银-铝(Ag-Al)异质键合系统生产的混合集成电路不能应用在高可靠的场合,镍-铝(Ni-Al)异质键合系统的键合质量相对比较可靠,但与同质键合系统相比,还是存在一定的差异,采用镍-铝(Ni-Al)异质键合系统生产的混合集成电路不能应用在宇航级高可靠领域。
为此,常采用如下的现有技术来解决:(1)利用金属掩模,直接在厚膜基片金键合区上选择性溅射或蒸发铝薄膜,或镍-铬-铝、铬-铜-铝复合薄膜,以实现金-金(Au-Au)、铝-铝(Al-Al)同质键合。存在的问题是,由于厚膜金导带表面比较粗糙,表面平整度较差,因此,在其表面直接形成的薄膜厚度均匀性、薄膜质量均匀性比较差,导致铝-铝(Al-Al)键合质量的一致性较差,不能保证所有键合点的质量满足要求,采用此工艺生产的产品成品率较低,可靠性难以提高。(2)采用在铜片上电镀镍或铝作过渡片,将其贴装在键合区上,再进行键合。这种方法明显不适用于多键合点、高密度、细间距的场合,同样,严重制约产品质量的一致性、批量生产性。
经检索,目前涉及混合集成电路键合系统的中国专利申请件仅有1件,即ZL200910102792.2号“高可靠厚膜混合集成电路键合系统及其制造方法”,但该专利与本发明并无关系,目前尚无提高厚膜混合集成电路同质键合系统批量生产性的申请件。
发明内容
本发明的目的是提供提高厚膜混合集成电路同质键合系统批量生产性的方法,以克服原有技术的缺陷,解决同质键合系统的批量生产性问题。
发明人经过研究,发现由于厚膜材料及丝网印刷工艺的固有特性,厚膜导带/键合区表面比较粗糙,表面平整度较差,其粗糙度通常在2~5μm,而薄膜厚度通常控制在1~5μm,因此,在其表面直接形成的薄膜厚度均匀性、薄膜质量均匀性比较差,导致铝-铝(Al-Al)键合质量的一致性较差,从而造成每个同质键合系统键合拉力、可靠性的一致性比较差,为了实现上述目标,必须解决键合区域表面的平整度问题。
为达到上述发明目的,发明人是从一次性提高每个同质键合系统质量一致性的角度出发,采用整体化学机械抛光(CMP)的方法来实现的,即:选择由有机纤维制成的旋转式抛光垫,贵金属抛光液,通过旋转式抛光机对整个金导带及键合区进行整体抛光,使其表面平整度≤0.1μm;然后进行电阻浆料的印刷、烧结和调阻;接着采用机械掩模的方法,在高真空溅射台或蒸发台中,在已抛光的键合区表面形成一层铝薄膜、镍-铬-铝或铬-铜-铝复合薄膜;最后,按常规混合集成电路集成工艺,将半导体芯片和片式元器件集成在处理后的厚膜基片上,半导体芯片的键合采用硅-铝丝键合,管脚与基片之间采用金丝键合,即实现质量一致性好、可靠性高的金-金(Au-Au)、铝-铝(Al-Al)同质键合,从而提高厚膜混合集成电路同质键合系统批量生产性。
上述贵金属抛光液的磨粒硬度为5GPa~50GPa,粒子直径≤100nm。
上述铝薄膜、或镍-铬-铝复合薄膜或铬-铜-铝复合薄膜的厚度通常控制在1~5μm。
上述片式元器件不包括半导体芯片。
本发明方法有以下特点:① 通过一次性整体化学机械抛光,使厚膜基片上的所有键合区表面的平整度同时控制在≤0.1μm,一次性提高所有键合区表面制备铝薄膜厚度和质量的一致性、均匀性,一次性提高所有同质键合
系统的质量一致性,从而提高厚膜混合集成电路的大批量可生产性;②由于所有金键合区表面一次性抛光整平,同步提高了基片与管脚端面金-金键合的可靠性;③改善厚膜金导带键合区与硅-铝丝的键合性能,形成高可靠同质键合系统,提高了厚膜混合集成电路长期充分可靠工作的能力;④通过改变金属掩模通孔尺寸的大小,可以在同一金导带键合区上形成局部铝键合区,可同时兼容金丝键合(键合区与镀金管脚之间)、硅-铝丝键合(基片键合区与芯片键合区之间),形成高可靠完美键合系统。用本方法生产的此类器件广泛应用于航天、航空、船舶、精密仪器、通讯、工业控制等领域,特别适用于大功率、高可靠、宇航级等应用领域,具有广阔的市场前景和应用空间。
附图说明
    附图用以比较本发明与原有技术的区别,并进一步说明本发明方法。
图1为原有一种集成技术示意图,图2为原有另一种集成技术示意图,图3为原有技术的金导带/金键合区放大示意图,图4 为原有技术的金键合区淀积铝膜后放大示意图,图5为本发明的整体(键合区/导带)化学机械抛光放大示意图,图6为本发明的整体(键合区/导带)抛光后淀积铝膜放大示意图,图7为本发明的集成技术示意图,图8为原有的工艺流程图,图9为本发明的工艺流程图。
图中,1为管基,2为底座,3为管脚镀镍端面,4为表面粗糙的金导带/金键合区,5为半导体芯片,6为硅铝丝内引线,7为阻带,8为片式元器件,9为陶瓷基片,10为管脚,11为管脚镀金端面,12为金丝内引线,13为表面粗糙的铝膜键合区,14为表面平整的金导带/金键合区,15为表面平整的铝膜键合区。
图9中虚线框内为本发明增添的工艺步骤。
具体实施方式
实施例1:
原有技术中铝-铝、金-金的同质键合流程如图8所示,工艺如下:
(1) 陶瓷基片、金浆料、钌系电阻浆料的准备;
(2) 基片清洗与烘干、管壳清洗与烘干;
(3) 厚膜导体浆料的印刷与烘干(150℃、10min);
(4) 电阻浆料的印刷和烘干(150℃、10min);
(5) 成膜烧结(850℃、10min,总时间35min);
(6) 调整电阻(激光调阻);
(7) 参数及功能测试;
(8) 玻璃釉的印刷和烘干(150℃、10min);
(9) 烧结玻璃釉(500℃、10min,总时间30min);
(10) 形成焊盘(键合区)导体图形;
(11) 采用不锈钢片或铍镆合金片,利用光刻的方法进行键合区机械掩膜的制备;
(12) 在高真空磁控溅射台中利用机械掩模进行镍-铬-铝复合薄膜的制备,Ni-Cr:0.6μm、Al:3.0μm;
(13) 划片分离;
(14) 将厚膜基片组装到底座上;
(15) 组装半导体芯片和其他分立元器件;
(16) 用硅-铝丝键合以完成半导体芯片的电路连接、用金丝完成基片与镀金管脚的电路连接;
(17) 封帽;
(18) 性能测试;
(19) 老化筛选测试、密封性检查;
(20) 产品编号打印、包装入库。
结果如图2所示,虽然解决了铝-铝、金-金的同质键合问题,但键合系统的质量一致性较差,产品合格率低,存在可靠性不良的隐患。
实施例2
本发明的工艺流程如图9所示,图中虚线框内为增添的工艺步骤:
在厚膜导带印刷与厚膜阻带印刷之间,增加厚膜导带烧结、机械整平、清洗烘干等工艺,增加部分的具体工艺如下:
(1) 准备磨粒硬度为25GPa±5GPa、粒子直径50nm±10nm的金抛光液;
(2) 导带烧结(875℃、12min,总时间45 min);
(3) 通过旋转式抛光机对所有金导带、金键合区进行一次性化学机械抛光,表面平整度控制在≤0.1μm;
(4) 去离子水清洗、烘干;
(5) 电阻浆料的印刷和烘干(150℃、10min);
(6) 阻带烧结(850℃、10min,总时间35min);
(7) 调整电阻(激光调阻)。
其余工艺不变, 结果如图7所示,解决了同质键合系统的批量生产性问题。

Claims (3)

1. 一种提高厚膜混合集成电路同质键合系统批量生产性的方法,其特征在于该方法是从一次性提高每个同质键合系统质量一致性的角度出发,采用整体化学机械抛光的方法来实现的,即:选择由有机纤维制成的旋转式抛光垫,贵金属抛光液,通过旋转式抛光机对整个金导带及键合区进行整体抛光,使其表面平整度≤0.1μm;然后进行电阻浆料的印刷、烧结和调阻;接着采用机械掩模的方法,在高真空溅射台或蒸发台中,在已抛光的键合区表面形成一层铝薄膜、镍-铬-铝或铬-铜-铝复合薄膜;最后,按常规混合集成电路集成工艺,将半导体芯片和片式元器件集成在处理后的厚膜基片上,半导体芯片的键合采用硅-铝丝键合,管脚与基片之间采用金丝键合,即实现质量一致性好、可靠性高的金-金、铝-铝同质键合,从而提高厚膜混合集成电路同质键合系统批量生产性。
2.如权利要求1所述的方法,其特征在于所述贵金属抛光液的磨粒硬度在5GPa~50GPa范围内,粒子直径≤100nm。
3. 如权利要求1所述的方法,其特征在于所述铝薄膜、或镍-铬-铝复合薄膜或铬-铜-铝复合薄膜的厚度控制在1~5μm。
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