CN103105712B - Display module and liquid crystal display - Google Patents
Display module and liquid crystal display Download PDFInfo
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- CN103105712B CN103105712B CN201310035282.4A CN201310035282A CN103105712B CN 103105712 B CN103105712 B CN 103105712B CN 201310035282 A CN201310035282 A CN 201310035282A CN 103105712 B CN103105712 B CN 103105712B
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Abstract
The invention provides a display module and a liquid crystal display in order to solve the problems of twinkling caused by charge-discharge of a parasitic capacitor and display quality reduction in the prior art. An enable signal output module, an offset drive circuit and an offset capacitor are further disposed outside the display area of the display module. The enable signal output module is connected with the offset drive circuit and used for outputting an enable signal to the offset drive circuit. The offset drive circuit is connected with a first end of the offset capacitor equivalent to the parasitic capacitor, and a second end of the offset capacitor is connected with a common electrode. The offset drive circuit is used for receiving the enable signal output by the enable signal output module and outputting an offset drive signal to the first end of the offset capacitor. The offset drive signal is in consistency with a grid drive signal output to a grid line.
Description
Technical field
The present invention relates to display field, particularly relate to a kind of display module and liquid crystal display.
Background technology
Along with the development of lcd technology, user also constantly improves for the requirement of liquid crystal display.
In the process once shown, by loading high level to open thin film transistor (TFT) (Thin-Film Transistor, hereinafter referred to as TFT) to grid line, and by data line, deflection voltage is loaded to liquid crystal capacitance and holding capacitor, make liquid crystal deflection, thus show; At the end of this display, grid line is placed in low level, closes TFT, and the liquid crystal capacitance that drain electrode is connected and holding capacitor electric discharge, liquid crystal is recovered.
Between foregoing circuit structure, especially grid line and TFT source electrode, drain electrode between, there is the situation of mutual tolerance, namely there is stray capacitance.In the process of carrying out TFT switch, discharge and recharge can be carried out equally to stray capacitance, thus institute's deflection voltage in liquid crystal capacitance and holding capacitor can be made to produce deviation, and then make display effect occur deviation, and the discharge and recharge of stray capacitance also can affect electricity in liquid crystal capacitance and holding capacitor and discharge and recharge time, thus make liquid crystal display occur the situation of flicker, reduce the display quality of liquid crystal display.
Summary of the invention
Embodiments of the invention provide a kind of display module and liquid crystal display, thus can overcome the problem of the flicker that liquid crystal display causes because of the discharge and recharge of stray capacitance in procedure for displaying, improve the display quality of liquid crystal display.
For achieving the above object, embodiments of the invention adopt following technical scheme:
On the one hand, the invention provides a kind of display module, comprise array base palte, described array base palte comprises viewing area and non-display area, described viewing area is provided with many grid lines and data line, is limited with the pixel cell connecting public pole between described grid line and described data line; Be provided with TFT in described pixel cell, described grid line is connected with the grid of described TFT;
Stray capacitance is formed between the source electrode and drain electrode of described grid line and described TFT; Outside the described viewing area of described display module, be also provided with:
Enable signal output module, counteracting driving circuit and counteracting electric capacity;
Described enable signal output module connects described counteracting driving circuit, gives offset driving circuit for output enable signal;
Described counteracting driving circuit connects the first end of described counteracting electric capacity, and the second end of described counteracting electric capacity connects public pole;
Offset driving circuit, for receiving the enable signal that described enable signal output module exports, to the first end output offset drive singal of described counteracting electric capacity, this counteracting drive singal is consistent with the gate drive signal exported to described grid line.
Preferably, described counteracting capacitor equivalent is in the stray capacitance of all thin film transistor (TFT)s of a described grid line connection.
Preferably, described counteracting driving circuit, comprising:
First level output unit, the output terminal of described first level output unit is connected with the first end of described counteracting electric capacity, and for accepting the enable signal that described enable signal module exports, the described counteracting drive singal making output is the first level;
Second electrical level output unit, the output terminal of described second electrical level output unit is connected with the first end of described counteracting electric capacity, and for accepting the enable signal that described enable signal module exports, the described counteracting drive singal making output is second electrical level.
Preferably, described first level output unit, comprising:
First switching tube, described first switching tube comprises first end, the second end and the 3rd end;
Described first end, as the input end of the first level output unit, receives described counteracting drive singal;
Described second end connects the first end of described counteracting electric capacity;
Described three-terminal link first level provides power supply.
Preferably, described first switching tube is P type metal-oxide-semiconductor;
Wherein, when described enable signal is in low level, drive the conducting of described P type metal-oxide-semiconductor.
Preferably, described second electrical level output unit, comprising:
Second switch pipe, described second switch pipe comprises first end, the second end and the 3rd end;
Described first end, as the input end of second electrical level output unit, receives described counteracting drive singal;
Described second end connects the first end of described counteracting electric capacity;
Described three-terminal link second electrical level provides power supply.
Preferably, described second switch pipe is N-type metal-oxide-semiconductor;
Wherein, when described enable signal is in high level, drive the conducting of described N-type metal-oxide-semiconductor.
Preferably, described display module also comprises:
Printed circuit board (PCB), described enable signal output module, described counteracting driving circuit and described counteracting electric capacity are arranged at described printed circuit board (PCB).
On the other hand, present invention also offers a kind of liquid crystal display, comprise above-mentioned display module.
The display module that the embodiment of the present invention provides and liquid crystal display, in display module, the counteracting electric capacity be connected with public pole is set, and apply to put on signal consistent in stray capacitance with by grid line to the first end of offsetting electric capacity by offsetting driving circuit, thus the impact that the discharge and recharge that stray capacitance is offset in the discharge and recharge of passing through to offset electric capacity brings liquid crystal capacitance and holding capacitor, eliminate the deviation that liquid crystal deflection occurs, improve the display quality of liquid crystal display.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, below the accompanying drawing used required in describing embodiment is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the structural representation of display module of the present invention;
Fig. 2 is the structural representation comprising the display module of offsetting driving circuit and offsetting electric capacity of the present invention;
Fig. 3 is the structural representation of counteracting driving circuit of the present invention;
Fig. 4 is the structural representation of the counteracting driving circuit described in one embodiment of the invention;
Fig. 5 is the structural representation of the counteracting driving circuit described in another embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, embodiment of the present invention display module and liquid crystal display are described in detail.
Should be clear and definite, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
In display module, as shown in Figure 1, printed circuit board (PCB) 1, flexible PCB 2, array base palte 3, liquid crystal layer (not shown) and to box substrate (not shown) is comprised; Wherein, array base palte 3 comprises viewing area and non-display area, printed circuit board (PCB) 1 is connected with array base palte 3 by flexible PCB 2, liquid crystal layer is arranged between box substrate and array base palte 3, and be provided with the peripheral circuit (not shown) controlling display module and carry out showing on the printed circuit board 1, such as, receive the various operational order assigned of user and realize the charge pump etc. that the control chip of function corresponding to this operation and generation put on gate drive signal grid line making TFT turn-on and turn-off.
On array base palte 3, as shown in Figure 2, viewing area is provided with grid line 30 and data line 31, is limited with the pixel cell (not shown) connecting public pole com between grid line 30 and data line 31; Be provided with TFT32 in pixel cell, grid line 30 is connected with the grid G 1 of TFT32, and data line 31 is connected with the source S 1 of TFT32, and the drain D 1 of TFT32 connects the liquid crystal capacitance C in pixel cell respectively
lcone end and holding capacitor C
stone end; This liquid crystal capacitance C
lcthe other end and holding capacitor C
stthe other end be connected to public pole com respectively; For a pixel cell, between the source S 1 and drain D 1 of grid line 30 and TFT32, be formed with stray capacitance C
gsand C
gd, in the embodiment of the present invention, the stray capacitance of a TFT contains C
gsand C
gdtwo electric capacity, stray capacitance C
grefer to the summation of the stray capacitance of all TFT that a grid line connects; Gate driver circuit is connected with grid line 30, exports gate drive signal to grid line 30, this gate drive signal for inputting the grid G 1 of TFT32, with the turn-on and turn-off of control TFT32.
Wherein, in the some pixel cells set by array base palte 3, liquid crystal capacitance C
lcwith holding capacitor C
stall be connected on same public pole com.
In order to solve stray capacitance C
ggive the impact that the display of display module brings, outside the viewing area of display module, also comprise:
Enable signal output module 5, counteracting driving circuit 4 and counteracting electric capacity C
g', this counteracting electric capacity C
g' be equivalent to the stray capacitance of all thin film transistor (TFT)s that a described grid line connects;
Enable signal output module 5 connects offsets driving circuit 4, gives offset driving circuit 4 for output enable signal;
Offset driving circuit 4 to connect and this counteracting electric capacity C
g' first end, offset electric capacity C
g' the second end connect public pole com;
Offset driving circuit 4, for receiving the enable signal that enable signal output module 5 exports, to counteracting electric capacity C
g' first end output offset drive singal, this counteracting drive singal is consistent with the gate drive signal exported to grid line 30.
In fig. 2, there is the one-row pixels unit corresponding with this grid line 30 for grid line 30, in one-row pixels unit, comprise stray capacitance C
g1, C
g2c
gn, n stray capacitance altogether, then can determine to offset electric capacity C
g' equivalence stray capacitance C
gfor stray capacitance C
g1, C
g2c
gnsummation.
General, when showing module work, enable signal output module 5 can be realized by the TCON on printed circuit board (PCB), can think that counteracting driving circuit 4 and gate driver circuit provide enable signal simultaneously, the sequential of grid line 30 is put on by this enable signal control gate drive singal, when enable signal is low level, the gate drive signal then exported to grid line 30 is that high level is to make TFT32 conducting, when enable signal is high level, then the gate drive signal to grid line 30 output low level is to make TFT32 turn off; Herein, this enable signal coordinates with change over clock signal, exports gate drive signal successively to many grid lines 30; For a grid line, only there is the state being once in high level in the single pass cycle, in other times, this grid line is in low level.
Alternatively, in embodiments of the present invention when enable signal is high level, the gate drive signal exported to grid line is that high level or counteracting driving circuit output high level signal are also fine.
So, for a grid line, the low and high level according to gate drive signal switches with turn-on and turn-off TFT32, and on the data line 31 that the source S 1 of TFT32 is connected, data-signal can be loaded on liquid crystal capacitance C
lcwith holding capacitor C
st, thus formation electric field makes liquid crystal deflection to carry out the display of image.
In the process of display module work, because there is stray capacitance C between the source S 1, drain D 1 of grid line 30 and TFT32
g, so when gate drive signal is in high level, simultaneously to stray capacitance C
gcharge; When gate drive signal is in low level, stray capacitance C
gcan discharge in two ends, stray capacitance C
gthe moment of electric discharge can make liquid crystal capacitance C
lcwith holding capacitor C
stthere is change in the magnitude of voltage of the public pole com connected, so, and all liquid crystal capacitance C that can connect this public pole com
lcwith holding capacitor C
stthere is deviation in the voltage of upper applying, so that occurs the problem of flicker.
In order to avoid the appearance of this deviation, in the process of display module work, this counteracting driving circuit 4, obtains the enable signal that enable signal module exports, and puts on counteracting electric capacity C according to the level change switching of this enable signal
g' the level of counteracting drive singal; Wherein, this enable signal can obtain from the peripheral circuit display module, also can arrange for offsetting driving circuit 4 separately, this enable signal comprises two kinds of level, when enable signal is in a level, the counteracting drive singal that counteracting driving circuit 4 is exported is in high level, and this high level is loaded into counteracting electric capacity C
g' on, when enable signal is another kind of level, the counteracting drive singal that counteracting driving circuit 4 is exported is in low level, and this low level is loaded into counteracting electric capacity C
g' on; The high level of this counteracting drive singal is identical with low level with the high level of the gate drive signal put on grid line 30 respectively with the low level offsetting drive singal, and identical with the sequential of gate drive signal in sequential, thus can ensure at gate drive signal stray capacitance C
gwhen carrying out discharge and recharge, offset driving circuit export same magnitude of voltage and time ordered pair offset electric capacity C
g' carry out discharge and recharge.Carrying out stray capacitance C
g, offset electric capacity C
g', liquid crystal capacitance C
lcwith holding capacitor C
stcarry out in the process of discharge and recharge, for the so relatively independent system of one-row pixels unit, can think and meet law of conservation of charge in its system, be namely in the process that low and high level switches at gate drive signal, meet following condition:
Q
1＝C
g(V
dh-V
gh)+C
g’(V
gh-V
com)+(C
lc+C
st)(V
dh-V
com)
Wherein, total charge dosage when Q1 is TFT conducting in all pixel cell systems, V
dhfor the high level voltage of TFT drain D 1, V
ghfor the high level voltage that TFT grid G 1 loads, V
comfor the voltage of public pole com, C
gthe capacitance of all TFT stray capacitances is represented, C in formula
g' capacitance of representative counteracting electric capacity in formula.
Q
2＝C
g(V
dh-ΔV
p-V
gl)+C
g’(V
gl-ΔV
p-V
com)+(C
lc+C
st)(V
dh-ΔV
p-V
com)
Wherein, Q
2for the total charge dosage in pixel cellular system when TFT turns off, V
dhfor the Δ V that TFT drain D 1 exports
pat stray capacitance C
gthe variation of upper generation, V
glfor the low level voltage that TFT grid G 1 loads.
Because pixel cell system is met to the principle of charge conservation, so Q
1=Q
2, and can C be determined when counteracting electric capacity is the equivalent capacity of stray capacitance
g=C
g', so, just Δ V can be determined
p=0, namely in pixel cell system by stray capacitance C
gand bring liquid crystal deflection is occurred the offset voltage of deviation is cancelled.
For the charge and discharge process in pixel cell system, understandable, by arranging and stray capacitance C
gthe counteracting electric capacity C of equivalence
g', and at counteracting electric capacity C
g' one end load with put on stray capacitance C
gon the identical magnitude of voltage of voltage, to guarantee load on public pole com and eliminate the identical quantity of electric charge simultaneously, thus avoid in the process of TFT turn-on and turn-off, because stray capacitance C
gdischarge and recharge and cause liquid crystal capacitance C
lcwith holding capacitor C
ston the deviation of voltage that loads, thus avoid the appearance of the problems such as flicker, improve the display quality of liquid crystal display.
Because be applied with the gate drive signal of drive TFT 32 turn-on and turn-off on grid line 30, what this gate drive signal was same puts on stray capacitance C
gon, thus create the deviation voltage Δ V making liquid crystal deflection occur deviation
p.Passing through to offset electric capacity C
g' to stray capacitance C
gthe deviation voltage Δ V produced
pcarry out in the process offset, need to keep to counteracting electric capacity C
g' first end load offset drive singal sequential with load on stray capacitance C
gthe sequential of the gate drive signal of one end is consistent.Further, directly can export the enable signal of gate drive signal as driving the enable signal of offsetting driving circuit 4 output offset drive singal using with driving grid driving circuit, so, just can complete being loaded into stray capacitance C based on same signal
gwith counteracting electric capacity C
g' on gate drive signal and offset the control of drive singal, and then also ensure that the accuracy in sequential more accurately, but the enable signal identical with gate drive signal needs to arrange independent enable signal output module.
In above-mentioned display module, concrete, this counteracting driving circuit 4, as shown in Figure 3, comprising:
First level output unit 40, output terminal and the counteracting electric capacity C of this first level output unit 40
g' first end connect, for accept enable signal module 5 export enable signal, make the counteracting drive singal of output be the first level;
Second electrical level output unit 41, output terminal and the counteracting electric capacity C of this low level output unit 41
g' first end connect, for accept enable signal module 5 export enable signal, make the counteracting drive singal of output be second electrical level;
First level of this counteracting drive singal is identical with the magnitude of voltage of the low and high level of gate drive signal with second electrical level.
Wherein, the high level of this counteracting drive singal and low level can respectively from producing gate drive signal low and high level and being positioned at the charge pump (not shown) acquisition printed circuit board 1, also can offset the power supply that generation first level and second electrical level are set in driving circuit 4 respectively, and carry out the output of the first level and second electrical level according to the control of enable signal.
Concrete, this first level output unit 40, as shown in Figure 4, comprising:
First switching tube 400, this first switching tube 400 comprises first end G2, the second end S2 and the 3rd end D2;
First end G2, as the input end of the first level output unit 40, for receiving enable signal, makes the counteracting drive singal of output be the first level;
Second end S2 connects counteracting electric capacity C
g' first end;
3rd end D2 connects the first level provides power supply.
In addition, second electrical level output unit 41, comprising:
Second switch pipe 410, second switch pipe 410 comprises first end G3, the second end S3 and the 3rd end D3;
First end is the input end of second electrical level output unit 41 as G3, for receiving enable signal, makes the counteracting drive singal of output be second electrical level;
Second end S3 connects counteracting electric capacity C
g' first end;
3rd end D3 connects second electrical level provides power supply.
Wherein, as shown in Figure 5, this first level provides power supply 401 to be arranged at and offsets in driving circuit 4 and be connected with the first level output unit 40, this second electrical level provides power supply 411 to be arranged at and offsets in driving circuit 4 and be connected with second electrical level output unit 41, certainly, this first level provides power supply and second electrical level to provide power supply also can be exported by same supply unit simultaneously, but this supply unit needs can export two different voltages, to meet the needs of turn-on and turn-off TFT simultaneously.In addition, according to actual conditions, this first level provides power supply and second electrical level to provide power supply also can obtain from the peripheral circuit be positioned at printed circuit board 1 respectively, and this is not restricted.
As preferred scheme, this first level provides power supply and second electrical level to provide power supply to provide by showing the charge pump (not shown) that the printed circuit board (PCB) 1 of module has been arranged simultaneously, and this charge pump exports the first level and the second electrical level of turn-on and turn-off TFT respectively.
In counteracting driving circuit 4 as shown in Figure 4, enable signal input offset driving circuit 4, now, is loaded with the first level in the drain D 2 of the first switching tube 400, is loaded with second electrical level in the drain D 3 of second switch pipe 410.
When enable signal is in a kind of level and puts on the grid G 2 of the grid G 1 of the first switching tube 400 and second switch pipe 410, conducting between the drain D 2 of the first switching tube 400 and source S 2, second switch pipe 410 is in off state, thus high level is put on counteracting electric capacity C
g', offset electric capacity C
g' charge, now, on array base palte 3, gate drive signal is also in high level, to stray capacitance C
gcharge, namely at counteracting electric capacity C
g' and stray capacitance C
gabove to charge simultaneously, the electronics of identical charges amount can be loaded with from public pole com, to keep liquid crystal capacitance C
lcwith holding capacitor C
stthere is not change in the voltage of both sides, avoids the deflection of liquid crystal to occur deviation.
When enable signal is in another kind of level and puts on the grid G 2 of the grid G 1 of the first switching tube 400 and second switch pipe 410, first switching tube 400 is in off state, conducting between the drain D 2 of second switch pipe 410 and source S 2, thus make low level put on counteracting electric capacity C
g', now, on array base palte 3, gate drive signal is also in low level, offsets electric capacity C
g' and stray capacitance C
gdischarge simultaneously, the electronics of identical charges amount can be discharged to public pole com, thus keep liquid crystal capacitance C
lcwith holding capacitor C
stthere is not change in the voltage of both sides, avoids the deflection of liquid crystal to occur deviation.
Further, this first switching tube 400 is P type metal-oxide-semiconductor, corresponding, when enable signal is in low level, drives the conducting of P type metal-oxide-semiconductor.
Second switch pipe 410 is N-type metal-oxide-semiconductor, corresponding, when described enable signal is in high level, and the conducting of driving N type metal-oxide-semiconductor.
Can be passed through the characteristic of high level conducting by low level conducting and N-type metal-oxide-semiconductor according to P type metal-oxide-semiconductor, by the switching of the low and high level of this enable signal, just can be implemented in the high level of output offset drive singal when enable signal is in low level, the low level of output offset drive singal when enable signal is in high level, as long as enable signal can make metal-oxide-semiconductor turn-on and turn-off.Corresponding, in display module, on grid 30, the voltage making TFT conducting is loaded when enable signal is in low level, and on grid 30, the voltage that TFT is turned off is loaded when enable signal is in high level, thus by as the enable signal of offsetting drive singal, drive counteracting driving circuit 4 to realize offsetting stray capacitance C
gthe deviation brought of the deflection of discharge and recharge to liquid crystal, avoid the appearance of the problems such as flicker, improve the display quality of liquid crystal display.
Optionally, as shown in Figure 1, this enable signal output module 5, counteracting driving circuit 4 and this counteracting electric capacity C
g' can be formed on printed circuit board (PCB) 1, thus make counteracting driving circuit 4 and offset electric capacity C
g' can be formed in existing structure, be easy to realize, certain described enable signal output module 5, counteracting driving circuit 4 and counteracting electric capacity C
g' also can be formed or other do not affect other region of display at the non-display area of array base palte.
To show module corresponding with above-mentioned one, present invention also offers a kind of liquid crystal display, comprise above-mentioned display module;
This display module is consistent with above-mentioned structure, does not repeat them here.
The display module that the embodiment of the present invention provides and liquid crystal display, in display module, the counteracting electric capacity be connected with public pole is set, and apply to put on voltage consistent in stray capacitance with by grid line to the first end of offsetting electric capacity by offsetting driving circuit, thus the impact that the discharge and recharge that stray capacitance is offset in the discharge and recharge of passing through to offset electric capacity brings liquid crystal capacitance and holding capacitor, eliminate the deviation that liquid crystal deflection occurs, improve the display quality of liquid crystal display.
The above; be only the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, is anyly familiar with those skilled in the art in the technical scope that the present invention discloses; change can be expected easily or replace, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should described be as the criterion with the protection domain of claim.
Claims (8)
1. show a module, comprise array base palte, described array base palte comprises viewing area and non-display area, and described viewing area is provided with many grid lines and data line, is limited with the pixel cell connecting public pole between described grid line and described data line; Be provided with thin film transistor (TFT) in described pixel cell, described grid line is connected with the grid of described thin film transistor (TFT);
Between the source electrode and drain electrode of described grid line and described thin film transistor (TFT), be formed with stray capacitance, it is characterized in that, outside the described viewing area of described display module, be also provided with:
Enable signal output module, counteracting driving circuit and counteracting electric capacity;
Described enable signal output module connects offsets driving circuit, gives offset driving circuit for output enable signal;
Described counteracting driving circuit connects the first end with described counteracting electric capacity, and the second end of described counteracting electric capacity connects public pole;
Offset driving circuit, for receiving the enable signal that described enable signal output module exports, to the first end output offset drive singal of described counteracting electric capacity, this counteracting drive singal is consistent with the gate drive signal exported to described grid line;
Described counteracting capacitor equivalent is in the stray capacitance of all thin film transistor (TFT)s of a described grid line connection.
2. display module according to claim 1, is characterized in that, described counteracting driving circuit, comprising:
First level output unit, the output terminal of described first level output unit is connected with the first end of described counteracting electric capacity, and for accepting the enable signal that described enable signal module exports, the described counteracting drive singal making output is the first level;
Second electrical level output unit, the output terminal of described second electrical level output unit is connected with the first end of described counteracting electric capacity, and for accepting the enable signal that described enable signal module exports, the described counteracting drive singal making output is second electrical level.
3. display module according to claim 2, is characterized in that, described first level output unit, comprising:
First switching tube, described first switching tube comprises first end, the second end and the 3rd end;
Described first end, as the input end of the first level output unit, receives described counteracting drive singal;
Described second end connects the first end of described counteracting electric capacity;
Described three-terminal link first level provides power supply.
4. display module according to claim 3, is characterized in that, described first switching tube is P type metal-oxide-semiconductor;
Wherein, when described enable signal is in low level, drive the conducting of described P type metal-oxide-semiconductor.
5. display module according to claim 2, is characterized in that, described second electrical level output unit, comprising:
Second switch pipe, described second switch pipe comprises first end, the second end and the 3rd end;
Described first end, as the input end of second electrical level output unit, receives described counteracting drive singal;
Described second end connects the first end of described counteracting electric capacity;
Described three-terminal link second electrical level provides power supply.
6. display module according to claim 5, is characterized in that, described second switch pipe is N-type metal-oxide-semiconductor;
Wherein, when described enable signal is in high level, drive the conducting of described N-type metal-oxide-semiconductor.
7. the display module according to any one of claim 1 to 6, is characterized in that, described display module also comprises:
Printed circuit board (PCB), described enable signal output module, described counteracting driving circuit and described counteracting electric capacity are arranged at described printed circuit board (PCB).
8. a liquid crystal display, is characterized in that, comprises the display module as described in any one of claim 1-7.
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| CN103336397B (en) * | 2013-07-01 | 2015-09-09 | 京东方科技集团股份有限公司 | A kind of array base palte, display panel and display device |
| CN103929864B (en) * | 2014-05-06 | 2015-11-25 | 深圳市绿源半导体技术有限公司 | For Charge controlled method and device, the LED drive circuit of LED drive circuit |
| CN113611256B (en) * | 2021-08-12 | 2023-02-17 | 合肥鑫晟光电科技有限公司 | Selection module and data output method thereof, chip, selector and display device |
| CN117558251B (en) * | 2023-12-26 | 2024-07-19 | 深圳创维显示技术有限公司 | Driving circuit and control method of display panel, array substrate and display panel |
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| CN1959508A (en) * | 2006-11-10 | 2007-05-09 | 京东方科技集团股份有限公司 | Baseplate structure of TFT LCD array, and preparation method |
| CN102053433A (en) * | 2009-10-28 | 2011-05-11 | 无锡夏普电子元器件有限公司 | Liquid crystal display screen and driving method thereof |
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