CN103105712A - Display module and liquid crystal display - Google Patents
Display module and liquid crystal display Download PDFInfo
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- CN103105712A CN103105712A CN2013100352824A CN201310035282A CN103105712A CN 103105712 A CN103105712 A CN 103105712A CN 2013100352824 A CN2013100352824 A CN 2013100352824A CN 201310035282 A CN201310035282 A CN 201310035282A CN 103105712 A CN103105712 A CN 103105712A
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Abstract
The invention provides a display module and a liquid crystal display in order to solve the problems of twinkling caused by charge-discharge of a parasitic capacitor and display quality reduction in the prior art. An enable signal output module, an offset drive circuit and an offset capacitor are further disposed outside the display area of the display module. The enable signal output module is connected with the offset drive circuit and used for outputting an enable signal to the offset drive circuit. The offset drive circuit is connected with a first end of the offset capacitor equivalent to the parasitic capacitor, and a second end of the offset capacitor is connected with a common electrode. The offset drive circuit is used for receiving the enable signal output by the enable signal output module and outputting an offset drive signal to the first end of the offset capacitor. The offset drive signal is in consistency with a grid drive signal output to a grid line.
Description
Technical field
The present invention relates to the demonstration field, relate in particular to a kind of demonstration module and liquid crystal display.
Background technology
Along with the development of lcd technology, the user also constantly improves for the requirement of liquid crystal display.
In the process that once shows, by loading high level to grid line opening thin film transistor (TFT) (Thin-Film Transistor is hereinafter to be referred as TFT), and by data line to liquid crystal capacitance with keep the capacitive load deflection voltage, make liquid crystal deflection, thereby show; When this showed end, grid line was placed in low level, closes TFT, and liquid crystal capacitance and maintenance capacitor discharge that drain electrode is connected, and liquid crystal is recovered.
Between the foregoing circuit structure, especially between the source electrode of grid line and TFT, drain electrode, there is situation about holding mutually, namely there is stray capacitance.In the process of carrying out the TFT switch, can discharge and recharge stray capacitance equally, thereby can make liquid crystal capacitance and keep institute's deflection voltage generation deviation on electric capacity, and then make display effect deviation occur, and discharging and recharging of stray capacitance also can affect liquid crystal capacitance and keep the electric weight on electric capacity and discharge and recharge the time, thereby make liquid crystal display the situation of glimmering occur, reduced the display quality of liquid crystal display.
Summary of the invention
Embodiments of the invention provide a kind of demonstration module and liquid crystal display, thereby can overcome the problem of the flicker that liquid crystal display causes because of discharging and recharging of stray capacitance in procedure for displaying, have improved the display quality of liquid crystal display.
For achieving the above object, embodiments of the invention adopt following technical scheme:
On the one hand, the invention provides a kind of demonstration module, comprise array base palte, described array base palte comprises viewing area and non-display area, described viewing area is provided with many grid lines and data line, is limited with the pixel cell that connects public pole between described grid line and described data line; Be provided with TFT in described pixel cell, described grid line is connected with the grid of described TFT;
Be formed with stray capacitance between the source electrode of described grid line and described TFT and drain electrode; Outside the described viewing area of described demonstration module, also be provided with:
Enable signal output module, counteracting driving circuit and counteracting electric capacity;
Described enable signal output module connects described counteracting driving circuit, is used for the output enable signal to offsetting driving circuit;
Described counteracting driving circuit connects the first end of described counteracting electric capacity, and the second end of described counteracting electric capacity connects public pole;
Offset driving circuit, for the enable signal that receives described enable signal output module output, to the first end output offset driving signal of described counteracting electric capacity, this counteracting drives signal and is consistent with the gate drive signal of exporting to described grid line.
Preferably, described counteracting capacitor equivalent is in the stray capacitance of all thin film transistor (TFT)s of a described grid line connection.
Preferably, described counteracting driving circuit comprises:
The first level output unit, the output terminal of described the first level output unit is connected with the first end of described counteracting electric capacity, is used for accepting the enable signal of described enable signal module output, and making the described counteracting driving signal of output is the first level;
The second electrical level output unit, the output terminal of described second electrical level output unit is connected with the first end of described counteracting electric capacity, is used for accepting the enable signal of described enable signal module output, and making the described counteracting driving signal of output is second electrical level.
Preferably, described the first level output unit comprises:
The first switching tube, described the first switching tube comprises first end, the second end and the 3rd end;
Described first end receives described counteracting and drives signal as the input end of the first level output unit;
Described the second end connects the first end of described counteracting electric capacity;
Described the 3rd end connects the first level provides power supply.
Preferably, described the first switching tube is P type metal-oxide-semiconductor;
Wherein, when described enable signal is in low level, drive the conducting of described P type metal-oxide-semiconductor.
Preferably, described second electrical level output unit comprises:
The second switch pipe, described second switch pipe comprises first end, the second end and the 3rd end;
Described first end receives described counteracting and drives signal as the input end of second electrical level output unit;
Described the second end connects the first end of described counteracting electric capacity;
Described the 3rd end connects second electrical level provides power supply.
Preferably, described second switch pipe is the N-type metal-oxide-semiconductor;
Wherein, when described enable signal is in high level, drive the conducting of described N-type metal-oxide-semiconductor.
Preferably, described demonstration module also comprises:
Printed circuit board (PCB), described enable signal output module, described counteracting driving circuit and described counteracting electric capacity are arranged at described printed circuit board (PCB).
On the other hand, the present invention also provides a kind of liquid crystal display, comprises above-mentioned demonstration module.
Demonstration module and liquid crystal display that the embodiment of the present invention provides, the counteracting electric capacity that is connected with public pole is set in showing module, and apply and put on signal consistent on stray capacitance by grid line to the first end of offsetting electric capacity by offsetting driving circuit, thereby offset discharging and recharging liquid crystal capacitance and the impact that keeps electric capacity to bring of stray capacitance by offsetting discharging and recharging of electric capacity, eliminate the deviation that liquid crystal deflection occurs, improved the display quality of liquid crystal display.
Description of drawings
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, during the below will describe embodiment, the accompanying drawing of required use is done to introduce simply, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the structural representation of demonstration module of the present invention;
Fig. 2 is the structural representation of offsetting driving circuit and offsetting the demonstration module of electric capacity that comprises of the present invention;
Fig. 3 is the structural representation of counteracting driving circuit of the present invention;
Fig. 4 is the structural representation of the described counteracting driving circuit of one embodiment of the invention;
Fig. 5 is the structural representation of the described counteracting driving circuit of another embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the embodiment of the present invention is shown that module and liquid crystal display are described in detail.
Should be clear and definite, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Based on the embodiment in the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that obtains under the creative work prerequisite.
In showing module, as shown in Figure 1, comprise printed circuit board (PCB) 1, flexible PCB 2, array base palte 3, liquid crystal layer (not shown) and to the box substrate (not shown); Wherein, array base palte 3 comprises viewing area and non-display area, printed circuit board (PCB) 1 is connected with array base palte 3 by flexible PCB 2, liquid crystal layer is arranged between box substrate and array base palte 3, and be provided with the peripheral circuit (not shown) that the control display module shows on printed circuit board (PCB) 1, for example, receive various operational orders that the user assigns and realize the control chip of this operation institute corresponding function and charge pump that generation puts on the gate drive signal that makes the TFT turn-on and turn-off on grid line etc.
On array base palte 3, as shown in Figure 2, the viewing area is provided with grid line 30 and data line 31, is limited with the pixel cell (not shown) that connects public pole com between grid line 30 and data line 31; Be provided with TFT32 in pixel cell, grid line 30 is connected with the grid G 1 of TFT32, and data line 31 is connected with the source S 1 of TFT32, and the drain D 1 of TFT32 connects respectively the liquid crystal capacitance C in pixel cell
lcAn end and keep capacitor C
stAn end; This liquid crystal capacitance C
lcThe other end and keep capacitor C
stThe other end be connected to respectively public pole com; For a pixel cell, be formed with stray capacitance C between the source S 1 of grid line 30 and TFT32 and drain D 1
gsAnd C
gd, in the embodiment of the present invention, the stray capacitance of a TFT has comprised C
gsAnd C
gdTwo electric capacity, stray capacitance C
gThe summation that refers to the stray capacitance of all TFT that a grid line connects; Gate driver circuit is connected with grid line 30, and to grid line 30 output gate drive signals, this gate drive signal is used for the grid G 1 of input TFT32, to control the turn-on and turn-off of TFT32.
Wherein, in the set some pixel cells of array base palte 3, liquid crystal capacitance C
lcWith the maintenance capacitor C
stAll be connected on same public pole com.
In order to solve stray capacitance C
gImpact to the demonstration that shows module brings outside the viewing area that shows module, also comprises:
Enable signal output module 5, counteracting driving circuit 4 and counteracting capacitor C
g', this offsets capacitor C
g' be equivalent to the stray capacitance of all thin film transistor (TFT)s that a described grid line connects;
Enable signal output module 5 connects offsets driving circuit 4, is used for the output enable signal to offsetting driving circuit 4;
Offsetting driving circuit 4 connects and this counteracting capacitor C
g' first end, offset capacitor C
g' the second end connect public pole com;
Offset driving circuit 4, be used for receiving the enable signal of enable signal output module 5 outputs, to offsetting capacitor C
g' the first end output offset drive signal, this counteractings drives signal and is consistent with the gate drive signal of exporting to grid line 30.
In Fig. 2, there be the one-row pixels unit corresponding with this grid line 30 for grid line 30, comprise stray capacitance C in the one-row pixels unit
g1, C
g2C
gn, n stray capacitance, can determine to offset capacitor C altogether
g' equivalent stray capacitance C
gBe stray capacitance C
g1, C
g2C
gnSummation.
General, when showing module work, enable signal output module 5 can be realized by the TCON on printed circuit board (PCB), can think that counteracting driving circuit 4 and gate driver circuit provide enable signal simultaneously, control by this enable signal the sequential that gate drive signal puts on grid line 30, when enable signal is low level, the gate drive signal to grid line 30 outputs is that high level is so that the TFT32 conducting, when enable signal was high level, the gate drive signal to grid line 30 output low levels was so that TFT32 turn-offs; Herein, this enable signal and change over clock Signal cooperation are exported gate drive signal successively to many grid lines 30; For a grid line, only there is the state that once is in high level in the single pass cycle, in other times, this grid line is in low level.
Alternatively, when enable signal was high level, the gate drive signal of exporting to grid line was that high level or counteracting driving circuit output high level signal also are fine in embodiments of the present invention.
So, for a grid line, switch with turn-on and turn-off TFT32 according to the high-low level of gate drive signal, make that on the data line 31 that the source S 1 of TFT32 connects, data-signal can be loaded on liquid crystal capacitance C
lcWith the maintenance capacitor C
stThereby, form electric field and make liquid crystal deflection to carry out the demonstration of image.
In the process that shows module work, because have stray capacitance C between the source S 1 of grid line 30 and TFT32, drain D 1
gSo, when gate drive signal is in high level, simultaneously to stray capacitance C
gCharge; When gate drive signal is in low level, stray capacitance C
gCan discharge in two ends, stray capacitance C
gThe moment of discharge can make liquid crystal capacitance C
lcWith the maintenance capacitor C
stChanging appears in the magnitude of voltage of the public pole com that connects, so, and can be to all liquid crystal capacitance C of this public pole com connection
lcWith the maintenance capacitor C
stOn the voltage that applies deviation appears so that the problem of flicker appears.
For fear of the appearance of this deviation, in the process that shows module work, this offsets driving circuit 4, obtains the enable signal of enable signal module output, and puts on the counteracting capacitor C according to the level variation switching of this enable signal
g' counteracting drive the level of signal; Wherein, this enable signal can obtain by the peripheral circuit from show module, also can arrange for offsetting driving circuit 4 separately, this enable signal comprises two kinds of level, when enable signal is in a level, make the counteracting of offsetting driving circuit 4 outputs drive signal and be in high level, and this high level is loaded into the counteracting capacitor C
g' on, when enable signal is another kind of level, makes the counteracting of offsetting driving circuit 4 outputs drive signal and be in low level, and this low level is loaded into the counteracting capacitor C
g' on; The low level that this counteracting drives the high level of signal and offsets the driving signal respectively with put on grid line 30 on high level and the low level of gate drive signal identical, and the sequential with gate drive signal on sequential is identical, thereby can guarantee at gate drive signal stray capacitance C
gWhen discharging and recharging, offset the same magnitude of voltage of driving circuit output and the time ordered pair offset capacitor C
g' discharge and recharge.Carrying out stray capacitance C
g, offset capacitor C
g', liquid crystal capacitance C
lcWith the maintenance capacitor C
stIn the process that discharges and recharges, for the so relatively independent system in one-row pixels unit, can think and satisfy law of conservation of charge in its system, namely be in the process that high-low level switches at gate drive signal, satisfy following condition:
Q
1＝C
g(V
dh-V
gh)+C
g’(V
gh-V
com)+(C
lc+C
st)(V
dh-V
com)
Wherein, the total charge dosage when Q1 is the TFT conducting in all pixel cells systems, V
dhBe the high level voltage of TFT drain D 1, V
ghBe the high level voltage that loads on TFT grid G 1, V
comBe the voltage of public pole com, C
gRepresent the capacitance of all TFT stray capacitances in formula, C
g' capacitance of representative counteracting electric capacity in formula.
Q
2＝C
g(V
dh-ΔV
p-V
gl)+C
g’(V
gl-ΔV
p-V
com)+(C
lc+C
st)(V
dh-ΔV
p-V
com)
Wherein, Q
2Total charge dosage when turn-offing for TFT in the pixel cellular system, V
dhThe Δ V that exports for TFT drain D 1
pAt stray capacitance C
gThe variation of upper generation, V
glBe the low level voltage that loads on TFT grid G 1.
Because satisfy the principle of charge conservation for the pixel cell system, so Q
1=Q
2, and can determine C when counteracting electric capacity is the equivalent capacity of stray capacitance
g=C
g', so, just can determine Δ V
p=0, namely in the pixel cell system by stray capacitance C
gAnd the offset voltage that makes liquid crystal deflection deviation occur that brings is cancelled.
For the charge and discharge process in the pixel cell system, understandable, by arranging and stray capacitance C
gThe counteracting capacitor C of equivalence
g', and offsetting capacitor C
g' an end load and put on stray capacitance C
gOn the identical magnitude of voltage of voltage, load simultaneously on public pole com and eliminate the identical quantity of electric charge guaranteeing, thereby avoiding in the process of TFT turn-on and turn-off, because stray capacitance C
gDischarge and recharge and cause liquid crystal capacitance C
lcWith the maintenance capacitor C
stOn the deviation of the voltage that loads, thereby avoided the appearance of the problems such as flicker, improved the display quality of liquid crystal display.
Because, being applied with the gate drive signal of drive TFT 32 turn-on and turn-off on grid line 30, this gate drive signal is same puts on stray capacitance C
gOn, thereby produced the deviation voltage Δ V that makes liquid crystal deflection deviation occur
pPassing through to offset capacitor C
g' to stray capacitance C
gThe deviation voltage Δ V that produces
pIn the process of offsetting, need to keep to offsetting capacitor C
g' first end load the sequential that offset to drive signal and load on stray capacitance C
gThe sequential of the gate drive signal of one end is consistent.Further, can directly will offset as driving the enable signal that driving circuit 4 output offsets drive signal with the enable signal of driving grid driving circuit output gate drive signal, so, just can complete being loaded into stray capacitance C based on same signal
gWith the counteracting capacitor C
g' on gate drive signal and offset to drive the control of signal, and then also guaranteed more accurately the accuracy on the sequential, but the enable signal identical with gate drive signal need to arrange independent enable signal output module.
In above-mentioned demonstration module, concrete, this offsets driving circuit 4, as shown in Figure 3, comprising:
The first level output unit 40, the output terminal of this first level output unit 40 and counteracting capacitor C
g' first end connect, be used for accepting the enable signal of enable signal module 5 outputs, making the counteracting of output drive signal is the first level;
Second electrical level output unit 41, the output terminal of this low level output unit 41 with offset capacitor C
g' first end connect, be used for accepting the enable signal of enable signal module 5 outputs, making the counteracting of output drive signal is second electrical level;
This first level of offsetting the driving signal is identical with the magnitude of voltage of the high-low level of gate drive signal with second electrical level.
Wherein, this counteracting drives high level and the low level of signal and can obtain from the charge pump (not shown) that produces the gate drive signal high-low level and be positioned on printed circuit board 1 respectively, also the power supply that produces the first level and second electrical level can be set respectively in offsetting driving circuit 4, and carry out the output of the first level and second electrical level according to the control of enable signal.
Concrete, this first level output unit 40 as shown in Figure 4, comprising:
The first switching tube 400, this first switching tube 400 comprise first end G2, the second end S2 and the 3rd end D2;
First end G2 is used for receiving enable signal as the input end of the first level output unit 40, and making the counteracting driving signal of output is the first level;
The second end S2 connects the counteracting capacitor C
g' first end;
The 3rd end D2 connects the first level provides power supply.
In addition, second electrical level output unit 41 comprises:
First end is the input end of second electrical level output unit 41 as G3, is used for receiving enable signal, and making the counteracting driving signal of output is second electrical level;
The second end S3 connects the counteracting capacitor C
g' first end;
The 3rd end D3 connects second electrical level provides power supply.
Wherein, as shown in Figure 5, this first level provides power supply 401 to be arranged at and offsets in driving circuit 4 and be connected with the first level output unit 40, this second electrical level provides power supply 411 to be arranged at and offsets in driving circuit 4 and be connected with second electrical level output unit 41, certainly, this first level provides power supply and second electrical level to provide power supply also can be exported by same supply unit simultaneously, but this supply unit needs to export simultaneously two different voltages, to satisfy the needs of turn-on and turn-off TFT.In addition, according to actual conditions, this first level provides power supply and second electrical level to provide power supply also can obtain from the peripheral circuit that is positioned on printed circuit board 1 respectively, is not restricted at this.
As preferred scheme, this first level provides power supply and second electrical level to provide power supply to be provided by the charge pump (not shown) that has arranged on the printed circuit board (PCB) 1 that shows module simultaneously, and this charge pump is exported respectively the first level and the second electrical level of turn-on and turn-off TFT.
In counteracting driving circuit 4 as shown in Figure 4, enable signal input offset driving circuit 4 at this moment, is loaded with the first level in the drain D 2 of the first switching tube 400, is loaded with second electrical level in the drain D 3 of second switch pipe 410.
When enable signal is in a kind of level and puts on the grid G 1 of the first switching tube 400 and during the grid G 2 of second switch pipe 410, conducting between the drain D 2 of the first switching tube 400 and source S 2, second switch pipe 410 is in off state, thereby high level is put on the counteracting capacitor C
g', offset capacitor C
g' charge, at this moment, on array base palte 3, gate drive signal also is in high level, to stray capacitance C
gCharge, namely offsetting capacitor C
g' and stray capacitance C
gUpper charging simultaneously can load from public pole com the electronics of identical charges amount, to keep liquid crystal capacitance C
lcWith the maintenance capacitor C
stChanging does not appear in the voltage of both sides, avoids the deflection of liquid crystal deviation to occur.
When enable signal is in another kind of level and puts on the grid G 1 of the first switching tube 400 and during the grid G 2 of second switch pipe 410, the first switching tube 400 is in off state, conducting between the drain D 2 of second switch pipe 410 and source S 2, thus make low level put on the counteracting capacitor C
g', at this moment, on array base palte 3, gate drive signal also is in low level, offsets capacitor C
g' and stray capacitance C
gDischarge simultaneously can discharge to public pole com the electronics of identical charges amount, thereby keep liquid crystal capacitance C
lcWith the maintenance capacitor C
stChanging does not appear in the voltage of both sides, avoids the deflection of liquid crystal deviation to occur.
Further, this first switching tube 400 is P type metal-oxide-semiconductor, and is corresponding, when enable signal is in low level, drives the conducting of P type metal-oxide-semiconductor.
Can pass through the characteristic of high level conducting by low level conducting and N-type metal-oxide-semiconductor according to P type metal-oxide-semiconductor, the switching of the high-low level by this enable signal, just can realize the high level of output offset driving signal when enable signal is in low level, output offset drives the low level of signal when enable signal is in high level, as long as enable signal can make the metal-oxide-semiconductor turn-on and turn-off.Corresponding, in showing module, when being in low level, enable signal loads the voltage that makes the TFT conducting on grid 30, and the voltage that loading is turn-offed TFT on grid 30 when enable signal is in high level, thereby offset the enable signal that drives signal by conduct, drive and offset driving circuit 4 realization counteracting stray capacitance C
gDischarge and recharge the deviation that the deflection to liquid crystal brings, avoided the appearance of the problems such as flicker, improved the display quality of liquid crystal display.
Optionally, as shown in Figure 1, this enable signal output module 5, counteracting driving circuit 4 and this counteracting capacitor C
g' can be formed on printed circuit board (PCB) 1, offset driving circuit 4 and offset capacitor C thereby make
g' can be formed on existing structure, be easy to realize certain described enable signal output module 5, counteracting driving circuit 4 and counteracting capacitor C
g' also can form or other do not affect other zone of demonstration at the non-display area of array base palte.
Corresponding with above-mentioned a kind of demonstration module, the present invention also provides a kind of liquid crystal display, comprises above-mentioned demonstration module;
This shows that module is consistent with above-mentioned structure, does not repeat them here.
Demonstration module and liquid crystal display that the embodiment of the present invention provides, the counteracting electric capacity that is connected with public pole is set in showing module, and apply and put on voltage consistent on stray capacitance by grid line to the first end of offsetting electric capacity by offsetting driving circuit, thereby offset discharging and recharging liquid crystal capacitance and the impact that keeps electric capacity to bring of stray capacitance by offsetting discharging and recharging of electric capacity, eliminate the deviation that liquid crystal deflection occurs, improved the display quality of liquid crystal display.
The above; be only the specific embodiment of the present invention, but protection scope of the present invention is not limited to this, anyly is familiar with those skilled in the art in the technical scope that the present invention discloses; can expect easily changing or replacing, within all should being encompassed in protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion by described protection domain with claim.
Claims (9)
1. one kind shows module, comprises array base palte, and described array base palte comprises viewing area and non-display area, and described viewing area is provided with many grid lines and data line, is limited with the pixel cell that connects public pole between described grid line and described data line; Be provided with thin film transistor (TFT) in described pixel cell, described grid line is connected with the grid of described thin film transistor (TFT);
Be formed with stray capacitance between the source electrode of described grid line and described thin film transistor (TFT) and drain electrode, it is characterized in that, outside the described viewing area of described demonstration module, also be provided with:
Enable signal output module, counteracting driving circuit and counteracting electric capacity;
Described enable signal output module connects offsets driving circuit, is used for the output enable signal to offsetting driving circuit;
Described counteracting driving circuit connects the first end with described counteracting electric capacity, and the second end of described counteracting electric capacity connects public pole;
Offset driving circuit, for the enable signal that receives described enable signal output module output, to the first end output offset driving signal of described counteracting electric capacity, this counteracting drives signal and is consistent with the gate drive signal of exporting to described grid line.
2. demonstration module according to claim 1, is characterized in that, described counteracting capacitor equivalent is in the stray capacitance of all thin film transistor (TFT)s of a described grid line connection.
3. demonstration module according to claim 2, is characterized in that, described counteracting driving circuit comprises:
The first level output unit, the output terminal of described the first level output unit is connected with the first end of described counteracting electric capacity, is used for accepting the enable signal of described enable signal module output, and making the described counteracting driving signal of output is the first level;
The second electrical level output unit, the output terminal of described second electrical level output unit is connected with the first end of described counteracting electric capacity, is used for accepting the enable signal of described enable signal module output, and making the described counteracting driving signal of output is second electrical level.
4. demonstration module according to claim 3, is characterized in that, described the first level output unit comprises:
The first switching tube, described the first switching tube comprises first end, the second end and the 3rd end;
Described first end receives described counteracting and drives signal as the input end of the first level output unit;
Described the second end connects the first end of described counteracting electric capacity;
Described the 3rd end connects the first level provides power supply.
5. demonstration module according to claim 4, is characterized in that, described the first switching tube is P type metal-oxide-semiconductor;
Wherein, when described enable signal is in low level, drive the conducting of described P type metal-oxide-semiconductor.
6. demonstration module according to claim 3, is characterized in that, described second electrical level output unit comprises:
The second switch pipe, described second switch pipe comprises first end, the second end and the 3rd end;
Described first end receives described counteracting and drives signal as the input end of second electrical level output unit;
Described the second end connects the first end of described counteracting electric capacity;
Described the 3rd end connects second electrical level provides power supply.
7. demonstration module according to claim 6, is characterized in that, described second switch pipe is the N-type metal-oxide-semiconductor;
Wherein, when described enable signal is in high level, drive the conducting of described N-type metal-oxide-semiconductor.
8. the described demonstration module of according to claim 1 to 7 any one, is characterized in that, described demonstration module also comprises:
Printed circuit board (PCB), described enable signal output module, described counteracting driving circuit and described counteracting electric capacity are arranged at described printed circuit board (PCB).
9. a liquid crystal display, is characterized in that, comprises demonstration module as described in claim 1-8 any one.
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| CN103336397A (en) * | 2013-07-01 | 2013-10-02 | 京东方科技集团股份有限公司 | Array substrate, display panel and display device |
| CN103929864A (en) * | 2014-05-06 | 2014-07-16 | 深圳市绿源半导体技术有限公司 | Charge control method and device applied to LED drive circuit and LED drive circuit |
| CN113611256A (en) * | 2021-08-12 | 2021-11-05 | 合肥鑫晟光电科技有限公司 | Selection module and data output method thereof, chip, selector and display device |
| CN117558251A (en) * | 2023-12-26 | 2024-02-13 | 深圳创维显示技术有限公司 | Driving circuit and control method of display panel, array substrate and display panel |
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| US20050285983A1 (en) * | 2004-06-29 | 2005-12-29 | Min-Feng Chiang | Liquid crystal display having compensation capacitor |
| CN1959508A (en) * | 2006-11-10 | 2007-05-09 | 京东方科技集团股份有限公司 | Baseplate structure of TFT LCD array, and preparation method |
| JP2011017816A (en) * | 2009-07-08 | 2011-01-27 | Sharp Corp | Data line driving circuit and display device |
| CN102053433A (en) * | 2009-10-28 | 2011-05-11 | 无锡夏普电子元器件有限公司 | Liquid crystal display screen and driving method thereof |
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| CN103929864B (en) * | 2014-05-06 | 2015-11-25 | 深圳市绿源半导体技术有限公司 | For Charge controlled method and device, the LED drive circuit of LED drive circuit |
| CN113611256A (en) * | 2021-08-12 | 2021-11-05 | 合肥鑫晟光电科技有限公司 | Selection module and data output method thereof, chip, selector and display device |
| CN113611256B (en) * | 2021-08-12 | 2023-02-17 | 合肥鑫晟光电科技有限公司 | Selection module and data output method thereof, chip, selector and display device |
| CN117558251A (en) * | 2023-12-26 | 2024-02-13 | 深圳创维显示技术有限公司 | Driving circuit and control method of display panel, array substrate and display panel |
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