CN103094395A - Method for decreasing series resistors of P type substrate hetero junction with intrinsic thin layer (HIT) solar cell - Google Patents

Method for decreasing series resistors of P type substrate hetero junction with intrinsic thin layer (HIT) solar cell Download PDF

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Publication number
CN103094395A
CN103094395A CN2012102944653A CN201210294465A CN103094395A CN 103094395 A CN103094395 A CN 103094395A CN 2012102944653 A CN2012102944653 A CN 2012102944653A CN 201210294465 A CN201210294465 A CN 201210294465A CN 103094395 A CN103094395 A CN 103094395A
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China
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layer
work function
tco
type
amorphous silicon
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Inventor
崔艳峰
袁声召
石建华
陆中丹
孟凡英
刘正新
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Changzhou Trina Solar Energy Co Ltd
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Changzhou Trina Solar Energy Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention discloses a method for decreasing series resistors of a P type substrate hetero junction with intrinsic thin layer (HIT) solar cell. The P type HIT solar cell comprises a P type crystalline silicon substrate layer, a first intrinsic non-crystalline silicon layer, a second intrinsic non-crystalline silicon layer, a N type non-crystalline silicon layer, a P type non-crystalline silicon layer, a first transparent conductive oxide (TCO ) layer and an electrode, a second TCO layer and an electrode. The first intrinsic non-crystalline layer and the second intrinsic non-crystalline layer are arranged on two sides of the P type crystalline silicon substrate layer, the N type non-crystalline layer is arranged on the outer side of the first intrinsic non-crystalline silicon layer, the P type non-crystalline silicon layer is arranged on the outer side of the second intrinsic non-crystalline silicon layer, the first TCO layer and the electrode are arranged on the outer side of the N type non-crystalline silicon layer, and the second TCO layer and the electrode are arranged on the outer side of the P type non-crystalline silicon layer, wherein the second TCO layer is a lamination layer composed of a high work function TCO layer and a low work function TCO layer, and the high work function TCO layer contacts with the P type non-crystalline silicon layer. At the same time, the invention discloses a corresponding method for formation of the solar cell.

Description

A kind of method that reduces the resistance of P type substrate HIT solar cell string
Technical field
The present invention relates to the thin film solar cell technical field.Especially, the invention discloses a kind of technology of the P of reduction type substrate HIT solar cell string resistance.
Background technology
HIT(Heterojunction with intrinsic Thinlayer) solar cell efficiently, does not need the characteristics such as complicated preparation technology, temperature coefficient are little and more and more causes people's concern with it.Usually the structure of HIT battery is that Ag/TCO/p-a-si:H/i-a-si:H/c-Si (n)/i-a-si:H/n-a-si:H/TCO/Ag(is amorphous silicon film according to this area idiomatic expression mode: a-si, the expression amorphous silicon membrane, c-si is that crystal silicion represents crystal silicon, i represents the intrinsic type, p represents the P type, n represents N-type, and H represents hydrogenation; Further, in above-mentioned HIT battery structure, p-a-si:H represents that P type hydrogenation non crystal silicon film, i-a-si:H represent intrinsic hydrogenation non crystal silicon film, c-Si(n) represent that N-type crystal silicon, n-a-si:H represent the N-type hydrogenation non crystal silicon film).Because the conductivity of amorphous silicon is relatively poor, so in the manufacturing process of HIT, add one deck TCO(transparent conductive oxide between electrode and amorphous silicon layer) film can increase the collection of charge carrier effectively.The TCO film has optical clear and conduction dual-use function, and the collection of efficient carrier is played key effect, can reduce reflection of light, plays good light trapping effect, is good Window layer material.But due to the work function (4.3eV-5.2eV) of TCO less than the work function of a-si (p) (5.4eV left and right, depending on property of thin film), therefore just formed Schottky contacts between TCO/a-si:H (p), thereby Schottky contacts can cause the reduction of internal electric field to cause the reduction of open circuit voltage, and also can cause an additional string resistance when barrier height is larger.In common HIT battery, in order to improve the conductivity of TCO, the TCO film work function that adopts can be too not high, because high work function means that the resistivity of TCO is high, poorly conductive.Therefore the barrier height between TCO/p-a-si:H is higher, probably in the 0.6eV left and right.Higher barrier height has reduced the open circuit voltage of battery, has also increased series resistance simultaneously.
The discussion of relevant this problem, can consult pertinent literature:
Franz-Josef?Haug?et?al.Prog.Photovolt:Res.Appl.(2011)
Above for be N-type substrate HIT battery.For another kind of P type substrate HIT battery, its common structure is Ag/TCO/p-a-si:H/i-a-si:H/c-Si (p)/i-a-si:H/n-a-si:H/TCO/Ag.This type of HIT battery faces the Schottky contacts problem between TCO film and p-a-si:H equally.Different is that in P type substrate HIT battery, Schottky contacts is to have increased the string resistance (in simple terms to the major effect of P type substrate HIT battery, in P type substrat structure, Schottky contacts and PN junction apart from each other, the change of depletion layer does not affect on PN junction, the open-circuit voltage impact is less).
Summary of the invention
The present invention is optimized contacting between TCO and p-a-si:H on the basis of existing P type substrate HIT battery structure, reaches the purpose that reduces the string resistance.
Specifically, the present invention's tco layer that will contact with p-a-si:H is made the lamination that is made of high work function tco layer and low work function tco layer.Compare the general T CO film in conventional P type substrate HIT battery, therefore the work function of high work function tco layer has reduced the barrier height of contact-making surface more near the work function of p-a-si:H, has reduced contact resistance.Simultaneously, by the combination of high work function tco layer and low work function tco layer, the raising of TCO lamination overall resistivity is also not obvious.
According to a kind of P type substrate HIT solar cell of the present invention, comprising: P type crystal silicon substrate layer; The first and second intrinsic hydrogenated amorphous silicon layers of P type crystal silicon substrate layer both sides; N-type hydrogenated amorphous silicon layer outside the first intrinsic hydrogenated amorphous silicon layer; P type hydrogenated amorphous silicon layer outside the second intrinsic hydrogenated amorphous silicon layer; The first tco layer and the electrode in the N-type hydrogenated amorphous silicon layer outside; And the second tco layer and electrode outside P type hydrogenated amorphous silicon layer, wherein, the lamination that described the second tco layer is comprised of high work function tco layer and low work function tco layer, the high work function tco layer contacts with P type hydrogenated amorphous silicon layer.
Preparation method according to a kind of P type substrate HIT solar cell of the present invention comprises: form both sides at P type crystal silicon substrate layer and form the first and second intrinsic hydrogenated amorphous silicon layers; The first intrinsic hydrogenated amorphous silicon layer outside formation N-type hydrogenated amorphous silicon layer; At the second intrinsic hydrogenated amorphous silicon layer outside formation P type hydrogenated amorphous silicon layer; At N-type hydrogenated amorphous silicon layer outside formation the first tco layer; At described P type hydrogenated amorphous silicon layer outside formation the second tco layer; Form respectively electrode on described the first tco layer and the second tco layer, wherein, form described the second tco layer and comprise: at described P type hydrogenated amorphous silicon layer outside formation high work function tco layer, then form the low work function tco layer.
According to an aspect of the present invention, the work function of high work function tco layer is greater than 5eV.
According to an aspect of the present invention, the work function of low work function tco layer is 4.6-4.8eV.
According to an aspect of the present invention, the work function of low work function tco layer and the first tco layer is basic identical.
According to an aspect of the present invention, by controlling the partial pressure of oxygen in the tco layer deposition process, control the work function that obtains.
According to a kind of P type substrate HIT solar cell of the present invention, it is characterized in that, what contact with P type hydrogenated amorphous silicon layer is the TCO lamination, described TCO lamination is made of high work function tco layer and low work function tco layer, wherein said high work function tco layer contacts with P type hydrogenated amorphous silicon layer, the work function of described high work function tco layer than described low work function tco layer more near the work function of described P type hydrogenated amorphous silicon layer.
Operation in the inventive method claim can be carried out according to its described order, also can carry out simultaneously as required, or suitably sequentially carries out with other.Therefore, in claim to a method the appearance of each operation order not the actual operation in the invention process process be construed as limiting.
Description of drawings
Comprise that accompanying drawing is for providing, the present invention further to be understood, they are included and consist of the application's a part, and accompanying drawing shows embodiments of the invention, and play the effect of explaining the principle of the invention together with this specification.In accompanying drawing:
Fig. 1 illustrates a kind of according to P type substrate HIT battery structure of the present invention.
Fig. 2 illustrates the preparation method of structure shown in Figure 1.
Embodiment
P type substrate HIT battery:
As shown in Figure 1, one embodiment of the present of invention adopt P type silicon wafer to manufacture P type substrate HIT battery.Compare with existing P type substrate HIT battery, its main distinction is embodied in: (relative with the P type substrate 101 of centre to a side) is coated with high work function tco layer 102 and low work function tco layer 103 successively in the p-a-si:H layer outside.
The exemplary preparation method of P type substrate HIT battery shown in Figure 1 is described in Fig. 2.At first P type silicon chip is carried out strict cleaning and texturing (201), then the i-a-si:H about front employing PECVD method difference deposition growing 1-10nm and the n-a-si:H(202 and 203 about 1-10nm); The silicon chip (204) that overturns afterwards at the another side of silicon chip, remains and adopts PECVD method deposition growing 1-10nm i-a-si:H and 10-20nm p-a-si:H(205 and 206).Then adopt reaction and plasma deposition (RPD) method at two sides deposition TCO film, the TCO film can be ITO, can be also IWO; During deposition, the work function that can at first deposit the common 80nm thickness of one deck in the front of battery does not need too high common TCO film (207).Silicon chip (208) then overturns, first deposit the thick TCO film (209) with higher work-functions of one deck 10-40nm at the back side of battery, the work function palpus〉5eV, method can be controlled work function by the partial pressure of oxygen of controlling in deposition process, usually partial pressure of oxygen is larger, and work function is also larger.Then deposit the relatively low TCO film (210) of work function of the common 40-70nm thickness of one deck, scope is 4.6-4.8eV again.The last low-temperature pulp silk screen printing Ag grid that adopts on the two sides of battery again.Thereby form a complete battery device (111).
The preparation method embodiment that it will be understood by those skilled in the art that accompanying drawing 2 is only a kind of example of preparation method of the present invention.Scope of the present invention should contain any preparation method who obtains the structure of accompanying drawing 1.For example: can first carry out step 205 and 206, then carry out step 202 and 203; Can first carry out step 209 and 210 with formation high work function TCO film and low work function TCO film, then carry out step 207 formation general T CO film.Similarly, the operation of upset silicon chip can be made according to actual conditions and changed and adjust.
Therefore, foregoing invention should not be limited to embodiment.The protection range of this invention should be as the criterion with the scope that obtains claims that specification fully supports.
Technique effect
The present invention forms the lamination TCO that contacts with the p-a-si:H layer in P type substrate HIT battery, this lamination TCO can optimize the TCO/p-a-si:H interfacial structure, reduces series resistance.

Claims (10)

1. P type substrate HIT solar cell comprises:
P type crystal silicon substrate layer;
The first and second intrinsic hydrogenated amorphous silicon layers of P type crystal silicon substrate layer both sides;
N-type hydrogenated amorphous silicon layer outside the first intrinsic hydrogenated amorphous silicon layer;
P type hydrogenated amorphous silicon layer outside the second intrinsic hydrogenated amorphous silicon layer;
The first tco layer and the electrode in the N-type hydrogenated amorphous silicon layer outside; And
The second tco layer and the electrode in the P type hydrogenated amorphous silicon layer outside,
Wherein, the lamination that described the second tco layer is comprised of high work function tco layer and low work function tco layer, the high work function tco layer contacts with P type hydrogenated amorphous silicon layer.
2. HIT solar cell as claimed in claim 1, is characterized in that, the work function of described high work function tco layer is greater than 5eV.
3. HIT solar cell as claimed in claim 1, is characterized in that, the work function of described low work function tco layer is 4.6-4.8eV.
4. HIT solar cell as claimed in claim 1, is characterized in that, the work function of described low work function tco layer and described the first tco layer is basic identical.
5. the preparation method of a P type substrate HIT solar cell comprises:
Form both sides at P type crystal silicon substrate layer and form the first and second intrinsic hydrogenated amorphous silicon layers;
The first intrinsic hydrogenated amorphous silicon layer outside formation N-type hydrogenated amorphous silicon layer;
At the second intrinsic hydrogenated amorphous silicon layer outside formation P type hydrogenated amorphous silicon layer;
At N-type hydrogenated amorphous silicon layer outside formation the first tco layer;
At described P type hydrogenated amorphous silicon layer outside formation the second tco layer;
Form respectively electrode on described the first tco layer and the second tco layer,
Wherein, form described the second tco layer and comprise: at described P type hydrogenated amorphous silicon layer outside formation high work function tco layer, then form the low work function tco layer.
6. the preparation method of P type substrate HIT solar cell as claimed in claim 5, is characterized in that, the work function of described high work function tco layer is greater than 5eV.
7. the preparation method of P type substrate HIT solar cell as claimed in claim 5, is characterized in that, the work function of described low work function tco layer is 4.6-4.8eV.
8. the preparation method of P type substrate HIT solar cell as claimed in claim 5, is characterized in that, the work function of described low work function tco layer and described the first tco layer is basic identical.
9. as the preparation method of the described P type of any one in claim 5-8 substrate HIT solar cell, it is characterized in that, by controlling the partial pressure of oxygen in the tco layer deposition process, control the work function that obtains.
10. P type substrate HIT solar cell, it is characterized in that, what contact with P type hydrogenated amorphous silicon layer is the TCO lamination, described TCO lamination is made of high work function tco layer and low work function tco layer, wherein said high work function tco layer contacts with P type hydrogenated amorphous silicon layer, the work function of described high work function tco layer than described low work function tco layer more near the work function of described P type hydrogenated amorphous silicon layer.
CN2012102944653A 2012-08-17 2012-08-17 Method for decreasing series resistors of P type substrate hetero junction with intrinsic thin layer (HIT) solar cell Pending CN103094395A (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103296121A (en) * 2013-05-30 2013-09-11 国电光伏有限公司 Hetero-junction solar cell and preparing method thereof
CN106575676A (en) * 2014-07-17 2017-04-19 光城公司 Solar cell with interdigitated back contact
CN107393974A (en) * 2017-07-21 2017-11-24 协鑫集成科技股份有限公司 Combination electrode and preparation method thereof and heterojunction solar battery and preparation method thereof
CN109037383A (en) * 2018-07-24 2018-12-18 君泰创新(北京)科技有限公司 A kind of HJT solar battery and preparation method thereof and photovoltaic module
CN114883442A (en) * 2022-05-12 2022-08-09 东华理工大学 CsPbBr 3 Nuclear radiation detector and manufacturing method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080047602A1 (en) * 2006-08-22 2008-02-28 Guardian Industries Corp. Front contact with high-function TCO for use in photovoltaic device and method of making same
CN100481525C (en) * 2004-09-29 2009-04-22 三洋电机株式会社 Photovoltaic device
CN202076297U (en) * 2011-04-13 2011-12-14 山东力诺太阳能电力股份有限公司 Back contact HIT solar cell structure based on P-type silicon chip

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100481525C (en) * 2004-09-29 2009-04-22 三洋电机株式会社 Photovoltaic device
US20080047602A1 (en) * 2006-08-22 2008-02-28 Guardian Industries Corp. Front contact with high-function TCO for use in photovoltaic device and method of making same
CN202076297U (en) * 2011-04-13 2011-12-14 山东力诺太阳能电力股份有限公司 Back contact HIT solar cell structure based on P-type silicon chip

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103296121A (en) * 2013-05-30 2013-09-11 国电光伏有限公司 Hetero-junction solar cell and preparing method thereof
CN106575676A (en) * 2014-07-17 2017-04-19 光城公司 Solar cell with interdigitated back contact
CN106575676B (en) * 2014-07-17 2019-06-28 光城公司 Solar battery with interdigital back contacts
CN107393974A (en) * 2017-07-21 2017-11-24 协鑫集成科技股份有限公司 Combination electrode and preparation method thereof and heterojunction solar battery and preparation method thereof
CN109037383A (en) * 2018-07-24 2018-12-18 君泰创新(北京)科技有限公司 A kind of HJT solar battery and preparation method thereof and photovoltaic module
CN114883442A (en) * 2022-05-12 2022-08-09 东华理工大学 CsPbBr 3 Nuclear radiation detector and manufacturing method thereof
CN114883442B (en) * 2022-05-12 2023-05-12 东华理工大学 CsPbBr 3 Nuclear radiation detector and preparation method thereof

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Application publication date: 20130508