A kind of electronic equipment with crash reset function
[technical field]
The present invention relates to circuit design field, particularly a kind of electronic equipment with crash reset function.
[background technology]
Various intelligent system of the prior art, such as bluetooth earphone, panel computer, smart mobile phone, intelligent television, PC, notebook computer, individual Medical Devices etc., the processor that adopts controls more.At present, widely used processor has low-power consumption ARM (Advanced RISC Machine, be called for short ARM) core, Intel CPU (Center Processor Unit), AMD CPU or MIPS (Million Instructions Per Second) system etc., such as, ARM-A8.These processors, when some abnormalities, may occur crashing.Such as, when its supply voltage occurs one serious under jump time, or due to when when ambient noise or temperature etc. change there is address error in access memory, or due to fall cause some circuit instantaneous touch bad time, processor all may crash.And after processor deadlock, need to start shooting again could recover by plug battery.And the smart machines such as existing bluetooth earphone, panel computer, because volume is very little, its physical structure is very closely exquisite, the dismounting of inconvenient domestic consumer, and unloading process very easily causes physical unit loss, and therefore, domestic consumer generally cannot dismantle battery.Although the probability occurring to crash is very little, if occurred, consequence is very serious.Because battery is built-in, be inconvenient to dismantle, such system is in deadlock state always, until after the electricity of battery depleted completely, then charges, like this could by the state reset that crashes.Due to current all popular low power dissipation design, battery is given out light voluntarily and is taken for a long time, makes customer experience very bad like this.
Therefore, be necessary to provide a kind of technical scheme of improvement to overcome the problems referred to above.
[summary of the invention]
The object of the present invention is to provide a kind of electronic equipment, it can realize controlling the crash reset of system by Macintosh, not only saves the cost arranging separately crash reset key, and brings better Consumer's Experience to client.
In order to solve the problem, the invention provides a kind of electronic equipment, it comprises reset circuit and processor,
Described processor comprises normal operating conditions and deadlock state; Described reset circuit comprises Keysheet module and reset control module, and described Keysheet module comprises multiple button, and described processor responds each pressing of button and performs predetermined corresponding operating; When the N number of predetermined key in described Keysheet module is concurrently depressed, described reset control module exports crash reset signal to described processor, carries out resetting and recovering normal operating conditions to make described processor, wherein, N be more than or equal to 2 natural number.
Further, described reset control module comprises timing unit, when the N number of predetermined key in described Keysheet module is concurrently depressed, described timing unit starts timing, if timing reaches a time threshold, described reset control module just exports crash reset signal, otherwise then described reset control module exports non-crash reset signal.
Further, each button in the N number of predetermined key in described Keysheet module and a resistant series are between VDD-to-VSS; Described reset control module also comprises arithmetic logic unit and N number of comparing unit, one in N number of predetermined key in the corresponding described Keysheet module of each comparing unit, node voltage between the button of correspondence and the resistance be connected with this button and predetermined voltage threshold compare by each comparing unit, export the first comparison signal when the button of correspondence is not pressed, export the second comparison signal when the button of correspondence is pressed; Described arithmetic logic unit is used for carrying out logical operation to the comparison signal that N number of comparing unit exports, when described N number of comparing unit all exports the second comparison signal, described arithmetic logic unit exports combination button signal, when described arithmetic logic unit exports combination button signal, described timing unit starts timing.
Further, the normal phase input end of each comparing unit is connected with the node between corresponding button and the resistance be connected with this button, and negative-phase input inputs described predetermined voltage threshold.
Further, described electronic equipment also comprises electrify restoration circuit and the first logical operation circuit, and described electrify restoration circuit exports power-on reset signal when system boot, when system boot completes, exports non-power-on reset signal; When described electrify restoration circuit exports power-on reset signal or/and when described reset control module exports crash reset signal, described first logical operation circuit all exports new reset signal to the reset terminal of described processor, to make described processor reset.
Further, the normal phase input end of each comparing unit is connected with the node between corresponding button and the resistance be connected with this button, negative-phase input inputs described predetermined voltage threshold, described arithmetic logic unit is first and door, described first comprises N number of input with door, and wherein each input is connected with the output of a comparing unit; The reset terminal of described timing unit is connected with the output of door with first, its clock end input clock signal, and its output exports crash reset signal; Described first logical operation circuit is second and door, an input of described first logical operation circuit is connected with the reset signal output of described electrify restoration circuit, another input is connected with the crash reset signal output part of described reset control module, and its output is connected with the reset terminal of described processor.
Further, described electronic equipment also comprises the second logical operation circuit and electric power management circuit, described electric power management circuit provides power supply for described processor, when system produces power enable signal or described reset control module exports crash reset signal, described second logical operation circuit exports new power enable signal to described electric power management circuit, to make described electric power management circuit that the power reset of described processor will be supplied to, recover normal operating conditions to make described processor.
Further, the normal phase input end of each comparing unit is connected with the node between corresponding button and the resistance be connected with this button, negative-phase input inputs described predetermined voltage threshold, described arithmetic logic unit is first and door, described first comprises N number of input with door, and wherein each input is connected with the output of a comparing unit; The reset terminal of described timing unit is connected with the output of door with first, its clock end input clock signal, and its output exports crash reset signal; Described second logical operation circuit is the 3rd and door, the power enable signal that an input and the system of described second logical operation circuit produce is connected, another input is connected with the crash reset signal output part of described reset control module, and its output is connected with the Enable Pin of described electric power management circuit.
Further, N equals 2.
Further, described electronic equipment is bluetooth earphone or panel computer.
Compared with prior art, electronic equipment in the present invention comprises reset circuit and processor, when the N number of predetermined key in described reset circuit is concurrently depressed, described reset circuit exports crash reset signal to described processor, carries out resetting and recovering normal operating conditions to make described processor.Like this, not only save the cost that crash reset key is set separately, and bring better Consumer's Experience to client.
[accompanying drawing explanation]
In order to be illustrated more clearly in the technical scheme of the embodiment of the present invention, below the accompanying drawing used required in describing embodiment is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.Wherein:
Fig. 1 is the structural representation of the electronic equipment in first embodiment of the present invention;
Fig. 2 is the structural representation of the electronic equipment in second embodiment of the present invention;
Fig. 3 is the structural representation of the electronic equipment in the 3rd embodiment of the present invention; With
Fig. 4 is the structural representation of the electronic equipment in the 4th embodiment of the present invention.
[embodiment]
For enabling above-mentioned purpose of the present invention, feature and advantage become apparent more, and below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation.
Alleged herein " embodiment " or " embodiment " refers to special characteristic, structure or the characteristic that can be contained at least one implementation of the present invention.Different local in this manual " in one embodiment " occurred not all refers to same embodiment, neither be independent or optionally mutually exclusive with other embodiments embodiment.Unless stated otherwise, connection herein, be connected, word that the expression that connects is electrically connected all represents and is directly or indirectly electrical connected.
Electronic equipment in the present invention comprises reset circuit and processor, when the N number of predetermined key in described reset circuit is concurrently depressed, described reset circuit exports crash reset signal to described processor, carries out resetting and recovering normal operating conditions to make described processor.That is, the present invention realizes controlling the crash reset of system by combination button, like this, not only saves the cost arranging separately crash reset key, and brings better Consumer's Experience to client.
Please refer to shown in Fig. 1, it is the electrical block diagram of the electronic equipment in first embodiment of the present invention.Described electronic equipment comprises reset circuit 110 and processor 120.
Described processor 120 comprises normal operating conditions and deadlock state.Described reset circuit 110 comprises Keysheet module 112 and reset control module 114.Described Keysheet module 112 comprises multiple button, described processor 120 responds each pressing of button and performs predetermined corresponding operating, when the N number of predetermined key in described Keysheet module 112 is concurrently depressed, described reset control module 114 exports crash reset signal DeadRST to described processor 120, to reset to described processor 120 and to recover normal operating conditions, wherein, N be more than or equal to 2 natural number.
It should be noted that multiple buttons that described Keysheet module 112 comprises, the N number of predetermined key being wherein set to be used as reset operation is not that they are all the buttons with normal function in order to carry out crash reset and custom-designed usually.Such as, described Keysheet module 112 comprises ON/OFF switch (being also referred to as power button), volume increases key, volume reduces the conventional button such as key, receiving/hang-up button, wherein, can setting ON/OFF switch and volume, to increase key be predetermined key, or it is predetermined key that setting ON/OFF switch and volume reduce key, also can set ON/OFF switch, volume increases key and receiving/hang-up button is predetermined key, also can set ON/OFF switch, volume increases key, volume reduces key and receiving/hang-up button is predetermined key etc.When processor 120 is in normal operating conditions, described processor 120 each button that can respond in described Keysheet module 112 presses action to perform predetermined function operation, such as, and start, shutdown, volume increase, volume reduction, receiving/hang-up phone etc.Key is increased as predetermined key to set ON/OFF switch and volume, in the use procedure of system adopting described electronic equipment, when if processor 120 is in normal operating conditions, user normally can use each button of Keysheet module 112, such as, regulate volume, receiving/hang-up phone etc., if there is deadlock state in processor 120, user can pass through to press the ON/OFF switch in described Keysheet module 112 and volume increase key, to reset to described processor 120 and to recover normal operating conditions simultaneously.One of object or use that Macintosh in the present invention (i.e. described Keysheet module 112 comprise N number of predetermined key) is arranged are in order to avoid conflicting mutually with the normal function of these buttons.
In a preferred embodiment, reset control module 114 in electronic equipment shown in Fig. 1 comprises timing unit, when the N number of predetermined key in described Keysheet module 112 is concurrently depressed, described timing unit starts timing, if timing reaches a time threshold, described reset control module 114 just exports crash reset signal DeadRST, otherwise then described reset control module 114 exports non-crash reset signal.That is, when the N number of predetermined key in described Keysheet module 112 is concurrently depressed, and after continuing for some time, just described processor 120 is resetted.The object arranging timing unit is the false triggering in order to avoid misoperation causes.The time threshold (namely Macintosh continues key press time) that general described timing unit is arranged is 0.5S-100S, and the time is oversize, not too convenient concerning use user.
Please refer to shown in Fig. 2, it is the electrical block diagram of the electronic equipment in second embodiment of the present invention.Alternatively, it is a particular circuit configurations schematic diagram embodiment illustrated in fig. 1.
In this embodiment, described electronic equipment comprises reset circuit 210 and processor 220, and described reset circuit 210 comprises Keysheet module 212 and reset control module 214.Described Keysheet module 212 comprises two predetermined key (namely supposing N=2 in this example), be respectively the first button Key1, the second button Key2, described first button Key1 and the first resistance Rpl1 is series between power supply VH and ground, described second button Key2 and the second resistance Rpl2 is series between power supply VH and ground, connected node between described first button Key1 and the first resistance Rpl1 is K1, and the connected node between described second button Key2 and the second resistance Rpl2 is K2.Wherein, power supply VH can be cell voltage, or other supply voltage, or voltage higher in charger voltage and cell voltage; Function or the effect of the first resistance Rpl1 and the second resistance Rpl2 are, when the first button Key1 and the second button Key2 is not pressed, the first resistance Rpl1 and the 2nd Rpl2 respectively by the tension discharge of node K1 and K2 to ground.
In the present embodiment, reset control module 214 comprises first and door AND1 (i.e. arithmetic logic unit), timing unit Counter, and the first comparator Com1 and the second comparator Com2 (i.e. two comparing units).Wherein, the corresponding second button Key2 of the corresponding first button Key1 of the first comparator Com1, the second comparator Com2.The normal phase input end of the first comparator Com1 is connected with node K1, negative-phase input input predetermined voltage threshold VT, its voltage for comparison node K1 place and predetermined voltage threshold VT, and exports corresponding comparison signal; The normal phase input end of the second comparator Com2 is connected with node K2, negative-phase input input predetermined voltage threshold VT, its voltage for comparison node K2 place and predetermined voltage threshold VT, and exports corresponding comparison signal.In the present embodiment, the magnitude of voltage that described predetermined voltage threshold VT is less than power supply VH is designed.When the first button Key1 is not pressed, the comparison signal KH1 that the first comparator Com1 exports is low level (i.e. the first comparison signal); When the first button Key1 is pressed, the comparison signal KH1 that the first comparator Com1 exports is high level (i.e. the second comparison signal).In like manner, when the second button Key2 is not pressed, the comparison signal KH2 that the second comparator Com2 exports is low level (i.e. the first comparison signal); When the second button Key2 is pressed, the comparison signal KH2 that the second comparator Com2 exports is high level (i.e. the second comparison signal).
Described first is connected with the output of the first comparator Com1 and the output of the second comparator Com2 respectively with the first input end of door AND1 and the second input, it carries out logical operation for the comparison signal exported the first comparator Com1 and the second comparator Com2, when the comparison signal that two comparators export be all high level (i.e. the second comparison signal), described first and the signal KON that exports of door AND1 be high level (combination button signal); When the comparison signal of output arbitrary in two comparators is low level, the described first signal KON exported with door AND1 is low level (i.e. non-combined push button signalling).
The reset terminal RST of described timing unit Counter is connected with the output of door AND1 with described first, and its clock end CK input clock signal CLK, output Q is connected with processor 120.Below specifically introduce the course of work of described timing unit Counter: when the described first signal KON exported with door AND1 is low level (i.e. non-combined push button signalling), the signal of the output Q output of described timing unit Counter is high level (i.e. non-crash reset signal); When the described first signal KON exported with door AND1 is high level (i.e. combination button signal), described timing unit Counter starts timing, when timing reaches a time threshold, the signal saltus step that its output Q exports is low level (i.e. crash reset signal DeadRST).That is, when described first exports combination button signal (namely the first button Key1 and the second button Key2 is pressed) with door AND1, described timing unit Counter starts timing, if timing reaches a time threshold, described timing unit Counter just exports crash reset signal DeadRST, carry out to make described processor resetting and recovering normal operating conditions, otherwise then described timing unit Counter exports non-crash reset signal.
In another embodiment, described first comparator Com1 and described second comparator Com2 also can be replaced by the Schmidt trigger of built-in reference voltage, as long as the turn threshold voltage of Schmidt trigger is lower than the magnitude of voltage of power supply VH.
Belonging to those of ordinary skill in field it is contemplated that, the connected node of the normal phase input end of described first comparator Com1 and negative-phase input can be exchanged, namely described first comparator Com1 inputs predetermined voltage threshold VT, and its negative-phase input is connected with node K1; In like manner, also described second comparator Com2 can be inputted predetermined voltage threshold VT, its negative-phase input is connected with node K2, now, first also will carry out corresponding replacement to door AND1 and timing unit Counter, to realize when the first button Key1 and the second button Key2 is concurrently depressed, described processor 220 is made to carry out resetting and recovering normal operating conditions; Also the predetermined key in the Keysheet module 212 in the electronic equipment shown in Fig. 2 can be increased to 3,4 or more, as long as this combination button is convenient to user operation.That is, described Keysheet module 212 can comprise N number of predetermined key, and wherein each button and a resistant series are between VDD-to-VSS, described reset control module 214 comprises arithmetic logic unit, timing unit and N number of comparing unit, one in N number of predetermined key in the corresponding described Keysheet module 212 of each comparing unit, node voltage between the button of correspondence and the resistance be connected with this button and predetermined voltage threshold compare by each comparing unit, export the first comparison signal when the button of correspondence is not pressed, export the second comparison signal when the button of correspondence is pressed, described arithmetic logic unit is used for carrying out logical operation to the comparison signal that N number of comparison circuit exports, when described N number of comparison circuit all exports the second comparison signal, described arithmetic logic unit exports combination button signal, when described arithmetic logic unit exports combination button signal, described timing module starts timing, if timing reaches a time threshold, described timing unit just exports crash reset signal DeadRST, carry out resetting and recovering normal operating conditions to make described processor 220, otherwise, then described timing unit Counter exports non-crash reset signal.
Please refer to shown in Fig. 3, it is the electrical block diagram of the electronic equipment in the 3rd embodiment of the present invention.It also has electrification reset function while having combination button reset function.
Electronic equipment in Fig. 3 and the something in common in Fig. 2 are, this electronic equipment all includes Keysheet module 312, reset control module 314, processor 320.Electronic equipment in Fig. 3 and the difference in Fig. 2 are, the former also comprises electrify restoration circuit 330 and second and door AND2 (or being referred to as the first logical operation circuit), described second is connected with the output of described electrify restoration circuit 330 with an input of door AND2, another input is connected with the output of timing unit Counter, and its output is connected with the reset terminal RST of described processor 320.
In prior art, the output of described electrify restoration circuit 330 can directly be connected with the reset terminal RST of described processor 320, when system boot, described electrify restoration circuit 330 exports power-on reset signal POR, to carry out electrification reset to described processor 320, when system boot completes, it exports non-power-on reset signal, and described processor 320 starts normal work.In the present embodiment, an input input starting-up signal PWR of described electrify restoration circuit 330, another input input clock signal CLK, this clock signal clk is used for timing.The start process of system is the process of each road supply voltage from zero start to normal voltage value of system.During start, system produces starting-up signal PWR, make described electrify restoration circuit 130 output low level signal (i.e. power-on reset signal POR), before each road supply voltage does not reach normal output voltage, described electrify restoration circuit 330 output low level signal always, after each road supply voltage reaches normal output voltage, described electrify restoration circuit 330 continues output low level signal a period of time, such as, after 50mS, just become high level signal (i.e. non-power-on reset signal).When described electrify restoration circuit 330 always output low level signal (i.e. power-on reset signal POR) time, described processor 320 (such as, ARM core) can keep being reset state always, until after described electrify restoration circuit 330 exports high level signal, described processor 320 just starts normal work.
Shown in Fig. 3, when described timing unit Counter output low level signal (crash reset signal DeadRST) and/or described electrify restoration circuit 330 output low level signal (power-on reset signal POR), described state second all can output low level signal (new reset signal POR-New) with door AND2, described processor 320 is resetted.That is, described second is with the effect of door AND2, when described electrify restoration circuit 330 exports power-on reset signal POR or/and when described reset control module 314 exports crash reset signal DeadRST, described second all exports new reset signal (POR-New) to the reset terminal RST of described processor 320 with door AND2 (i.e. the first logical operation circuit), resets to make described processor 320.
Similar to Fig. 2, also the predetermined key in the Keysheet module 312 in the electronic equipment shown in Fig. 3 can be increased to 3,4 or more, as long as this combination button is convenient to user operation.
Please refer to shown in Fig. 4, it is the electrical block diagram of the electronic equipment in the 4th embodiment of the present invention.It is while having combination button reset function, also has the function being undertaken resetting by restarting power supply.
The something in common of Fig. 4 and Fig. 2 is, the electronic equipment in Fig. 4 also comprises Keysheet module 412, reset control module 414 and processor 420.The difference of Fig. 4 and Fig. 2 is, the former also comprise electric power management circuit 440 and the 3rd with door AND3 (the second logical operation circuit).Described 3rd with the input input power enable signal PMU_EN of door AND3, another input is connected with the output of described timing unit Counter; The Enable Pin EN of electric power management circuit 440 is connected with the output of door AND3 with the 3rd, and its power end VO is connected with the power end VDD of described processor 420.
In prior art, when described processor 420 is in deadlock state, the power enable signal PMU-EN that system produces directly can be inputted the Enable Pin EN of described electric power management circuit 440, the power supply that described electric power management circuit 440 is supplied to described processor 420 is restarted, recovers normal operating conditions to make described processor 420.The process of wherein restarting the supply voltage VDD of described processor 420 is, described electric power management circuit 440 first closes the supply voltage VDD of described processor 420, then controls the supply voltage VDD of described processor 420 again from zero start to normal voltage value.Such as, when power enable signal PMU_EN signal is low level, makes described electric power management circuit 440 be supplied to each road power-off of described processor 420, make processor 420 be in off-mode; When power enable signal PMU_EN saltus step is high level, makes described electric power management circuit 440 be supplied to described processor 420 each road power initiation and export normal working voltage, make processor 420 enter normal operating conditions.
Shown in Fig. 4, when described timing unit Counter output low level signal (crash reset signal DeadRST) and/or system produce power enable signal PMU_EN (being low level in the present embodiment), described state the 3rd all can output low level signal (new power enable signal PMU-EN-New) with door AND3, the power supply making described electric power management circuit 440 be supplied to described processor 420 restarts.That is, described 3rd is with the effect of door AND3, when system produces power enable signal PMU_EN or/and when described reset control module 414 exports crash reset signal DeadRST, described 3rd all exports new power enable signal (PMU-EN-New) with door AND3 (i.e. the second logical operation circuit), and the power supply making described electric power management circuit 440 be supplied to described processor 420 restarts.
Similar to Fig. 2, also the predetermined key in the Keysheet module 412 in the electronic equipment shown in Fig. 4 can be increased to 3,4 or more, as long as this combination button is convenient to user operation.
The smart machines such as existing bluetooth earphone, panel computer, because volume is very little, its physical structure is very closely exquisite, when there is deadlock state in it, the mode that domestic consumer is inconvenient to pass through to plug battery resets to it, therefore, the electronic equipment in the present invention can be embodied as the smart machine such as bluetooth earphone, panel computer, these smart machines just can realize reset function easily like this, thus bring better Consumer's Experience to client.
In sum, electronic equipment in the present invention comprises reset circuit and processor, when the N number of predetermined key in described reset circuit is concurrently depressed, described reset circuit exports crash reset signal to described processor, carries out resetting and recovering normal operating conditions to make described processor.That is, the present invention realizes controlling the crash reset of system by combination button.In addition, system-halted reset device in the present invention is also supported to pass through system boot, electrification reset is carried out to system, and also supports that the power enable signal produced by system to be reset the power supply of circuit described in restarting, recover normal operating conditions with the circuit that is reset described in making.Like this, not only save the cost that crash reset key is set separately, and bring better Consumer's Experience to client.
In the present invention, " connection ", " being connected ", " company ", " connecing " etc. represent the word be electrically connected, and if no special instructions, then represent direct or indirect electric connection.CLK in accompanying drawing is clock signal, and DATA is data-signal.
It is pointed out that the scope be familiar with person skilled in art and any change that the specific embodiment of the present invention is done all do not departed to claims of the present invention.Correspondingly, the scope of claim of the present invention is also not limited only to previous embodiment.