CN103066953B - Continuous impulse generator - Google Patents
Continuous impulse generator Download PDFInfo
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- CN103066953B CN103066953B CN201210580111.5A CN201210580111A CN103066953B CN 103066953 B CN103066953 B CN 103066953B CN 201210580111 A CN201210580111 A CN 201210580111A CN 103066953 B CN103066953 B CN 103066953B
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Abstract
The present invention relates to technical field of semiconductors there is provided a continuous impulse generator, including：Variable phase inverter and even number of inverters unit is driven to connect the chain of inverters to be formed, the variable phase inverter of driving includes inverter module, PMOS arrays, NMOS arrays.Its upset differentiation level is adjusted by adjusting PMOS arrays with the MOS transistor quantity of inverter module input in the variable phase inverter of NMOS arrays access driving, so as to realize control and adjust the purpose of output pulse signal dutycycle.The continuous impulse generator circuit structure is simple, it is completely compatible with existing cmos semiconductor technique, and can more flexible, more easily adjust the transmission signal bandwidth that pulse width is optimal to facilitate, the pulse train that frequency is controllable and pulsewidth is different is provided, the bandwidth of adjustment transmission signal, obtain high-quality signal so that modulation system is more flexible, be widely used in wireless communication field.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to impulse generator technology.
Background technology
Ultra wide band（Ultra Wideband, UWB）It is one kind short pulse（0.1nm~1.5ns）Be transmitted, bandwidth
Than（The ratio between radio frequency bandwidth and centre frequency）High wireless communication technology, it with traffic rate height, good concealment, be not take up it is new
Frequency spectrum resource three advantages, rise in twentieth century end, and the field such as military, civilian obtain extensive use.With it is traditional
The narrow-band technologies such as bluetooth, WLAN are compared, and UWB technology has transmission rate high（Hundreds of Mbit/s）, strong anti-interference performance, power consumption
The features such as low, security performance is good, is mainly used in the fields such as indoor communications, high-speed wireless LAN, radar.Federal Communications are entrusted
Member's meeting FCC regulations, civilian UWB spectrum scope is 3.1 ~ 10.6GHz, there is both of which：Multiband TD/FDMA and direct frequency band
DS-SS.Producing the mode of UWB local oscillation signals has two kinds：Orthodoxy Frequency Division Multiplex OFDM-UWB and impulse radio IR-UWB.
OFDM-UWB does not allow frequency shift (FS), it is therefore desirable to use the frequency synthesis technique based on phaselocked loop；And IR-UWB permits in theory
Perhaps frequency shift (FS), IEEE 802.15.4a standards use IR-UWB, due to using burst mode transmission pattern, greatly reduce system work(
Consumption, applied to short distance, low power consumption wireless network.
Pulse communication is directly launched and received to IR-UWB technologies, using burst pulse transmission data are obtained nanosecond to picosecond, has
Many advantages, such as having strong transmission rate height, ability of anti-multipath, good security and accurate stationkeeping ability.And in IR-UWB technologies
In, it is necessary to which impulse generator meets the continuous impulse waveforms of circuit operational requirements to produce, thus impulse generator is that its is important
One of part.
In the technical field, weighing three the key technical indexes of UWB impulse generators is：Impulse output amplitude, arteries and veins
Rush repetition rate, impulse waveform.In the prior art, the method for pulse is many needed for producing IR-UWB work, and tradition is based on three
The impulse generator of pole pipe avalanche effect, primary method of concern is turned into the advantage that it is easily achieved.At present by many
The methods such as pipe series, parallel, Marx matrixes obtain certain progress to the continuous Improvement of such conventional pulse generators, main
Technical indicator is wanted to reach：Impulse amplitude is 8.25V, and pulse recurrence frequency 50MHz, impulse waveform are mainly approximate Gaussian
Arteries and veins, but highest pulse recurrence frequency 480MHz and FCC Emission Mask condition are wanted to impulse waveform with UWB technology standard
Ask and also there is larger gap.
And the circuit for being used for producing UWB pulses with the development of semiconductor technology, in currently available technology is mostly complete solid
The high-speed electronic components of state type, such as photoelectric device and high-speed electronic components.What continuous impulse needed for IR-UWB work was produced
Method can substantially be divided into two classes：Photoelectric method and electronic method.Photoelectric method can obtain ps（10-12s）The UWB of level width
Pulse, and uniformity is good, is most to have the class method using future, but still locate conceptual phase at present.Electronic method utilizes half
The benign breakdown characteristics of the reverse snowslide of conductor PN junction and high-speed figure combinational logic circuit produce below 1ns UWB pulses, because of its electricity
Line structure is simple and obtains extensive research and application.
Electronic method of the prior art is main can to divide three kinds again：The first utilizes high-speed cmos logic gates
Warfare produces UWB pulses, and this mode can produce approximate each rank differential Gaussian pulse, but output pulse amplitude is low, generally
For hundreds of mV, circuit static power consumption is larger；Second is that traditional avalanche breakdown conducting control electric capacity based on BJT discharges to be formed
UWB pulses.This kind of impulse generator output pulse amplitude is big, circuit static power consumption is small and be easily controlled close to zero, pulse width,
But approximate Gaussian pulse can only be typically produced, frequency spectrum DC component is big, it is necessary to can just meet FCC spokes by strict Waveform shaping
Penetrate the standard of sheltering；The third is to utilize various high-speed electronic components, such as tunnel diode, step-recovery diode, pulsed discharge
Integrated circuits such as pipe, gallium arsenide FET logic circuit etc..
In addition, competition-risk principle using digital circuit is have also appeared in the prior art produces the extremely narrow arteries and veins of UWB
Punching, the UWB pulse-generator circuits of design are as depicted in figs. 1 and 2.Fig. 1 is to be passed through with clock signal all the way with same clock signal
Cross after delay line and be input to XOR gate progress XOR.According to XOR gate logical relation, the only rising edge in clock signal
During with trailing edge, two incoming levels are just different, now gate circuit output logic high " 1 ", the incoming level phase of other time two
Together, gate circuit output logic low " 0 ".The amount of delay of adjustment delay line can just change the phase difference of two input signals,
Export width and controlled high level pulse by amount of delay.By simply obtaining UWB pulses to the control of delay line amount of delay, then by
The processing of circuit such as shaping pulse, amplification, obtain the satisfactory pulse signal of the indexs such as pulse width, amplitude.
According to gate circuit logic, when two inputs are all logic highs, export high level.As shown in Fig. 2 when
Clock signal is input to phase inverter and an input with door, due to the delay of phase inverter and circuit itself, in clock signal
Rising edge output when, there is the logic high of very short time simultaneously with two inputs of door, i.e., with door one pulse of output,
And remaining time is because it is logic level always to have one with the input of door two, thus is exported all as logic low.Set in circuit
During meter, driving source should select rising time to try one's best short clock signal, it is ensured that between the accurate control of retardation, chip
Resistance matching problem be also required to cause enough attention.It is the realization for being limited in that high speed logic of this method, accurate
The control of phase delay and the control of impulse amplitude and raising, meanwhile, the price of this high-speed chip is reached using extremely level, is gone back
Need some times.
However, it can be seen from foregoing description, the method for the conventional generation IR-UWB pulses used is logical in the prior art
Cross device performance itself, designed according to set communication requirement, pulse width is according to pulse-generator circuit structure determination.
In IR-UWB wireless communication technologys, its signal modulation mode is mainly entered to the position of impulse amplitude and pulse on a timeline
The bandwidth of transmission signal can be changed by going and modulating, and adjust pulse width.In this case, for IR-UWB communication systems
The demand of system, it is desirable to be able to the transmission signal bandwidth that pulse width is optimal to facilitate is adjusted flexibly, in consideration of it, being capable of basis
The continuous impulse generator that bandwidth needed for transmission signal freely adjusts pulse width is particularly important.
The content of the invention
Technology to be solved by this invention is to provide a continuous impulse generator, can according to transmission signal needed for bandwidth
Freely adjust pulse width.
In order to solve the above technical problems, the invention provides a continuous impulse generator, including Oscillator feedback loop, institute
Stating Oscillator feedback loop includes driving variable phase inverter and even number of inverters unit to connect to form chain of inverters；The driving
Variable phase inverter includes：Inverter module；PMOS arrays, are connected to working power and the phase inverter of the variable phase inverter of driving
Between unit output end；NMOS arrays, are connected between the inverter module output end of the variable phase inverter of driving and ground.
As optional technical scheme, the variable phase inverter of driving also includes：First electric current of PMOS transistor formation
Source and the second current source of nmos pass transistor formation；The inverter module is CMOS inverter unit, including the first PMOS brilliant
The source electrode of body pipe and the first nmos pass transistor, first PMOS transistor and the first nmos pass transistor connects the first electric current respectively
Source and the second current source, grid are connected together as the input of the inverter module, and drain electrode is connected together as institute
State the output end of inverter module.
Further, the even number of inverters unit chain of inverters to be formed of connecting includes 2 or 4 inverter modules,
And each inverter module characteristic size is equal with driving force.
Further, the continuous impulse generator also includes frequency control module, and the frequency control module includes two
Output end, connects the first, second current source grid respectively, the frequency for adjusting continuous impulse generator.
As optional technical scheme, the PMOS arrays include n PMOS transistor, wherein n >=1 and n is integer；Institute
The source electrode for stating each PMOS transistor is all connected with working power, and drain electrode is all connected with the variable inverter output of driving, and grid is equal
Connect the input of working power and the variable phase inverter of the driving respectively by two switches.
Further, the channel length of each PMOS transistor and in the variable phase inverter of the driving the in the PMOS arrays
The channel length of one PMOS transistor is equal；PMOS transistor M in the PMOS arrayspiChannel width for it is described driving it is variable
The 2 of first PMOS transistor channel width in phase inverteri-1Times, wherein：1≤i≤n and i are integer.
Further, in the PMOS arrays, with the switch conduction and work electricity for driving variable inverter input to be connected
When switching off of source connection, correspondence PMOS transistor gating；On the contrary then corresponding PMOS transistor is not gated.
As optional technical scheme, the NMOS arrays include m nmos pass transistor, wherein m >=1 and m is integer；Institute
The source grounding of each nmos pass transistor is stated, drain electrode is all connected with the output end of the variable phase inverter of driving, and grid passes through two
Individual switch connects the input and ground of the variable phase inverter of driving respectively.
Further, the channel length of each nmos pass transistor and in the variable phase inverter of the driving the in the NMOS arrays
The channel length of one nmos pass transistor is equal；Nmos pass transistor M in the NMOS arraysnlChannel width for the driving can
Become 2 of the first nmos pass transistor channel width in phase inverterl-1Times, wherein：1≤l≤m and l are integer.
Further, in the NMOS arrays, with driving switch conduction that variable inverter input is connected, being connected to ground
When switching off, correspondence nmos pass transistor gating；On the contrary then corresponding nmos pass transistor is not gated.
As optional technical scheme, it is defeated that each switch in the PMOS arrays and the NMOS arrays is respectively connected with numeral
Enter control signal, the gating shape for controlling each nmos pass transistor in each PMOS transistor and NMOS arrays in the PMOS arrays
State, to adjust the dutycycle of continuous impulse generator.
As optional technical scheme, PMOS transistor quantity n and NMOS in the NMOS arrays in the PMOS arrays
Number of transistors m is equal.
The continuous impulse generator that the present invention is provided, inverter module in the variable phase inverter of access driving is changed by switching
PMOS transistor and nmos pass transistor quantity so that change its upset differentiate level, to realize pulse signals dutycycle
Adjustment.Meanwhile, by frequency control module control electric current source grid end voltage, to adjust inverter module in the variable phase inverter of driving
Charging and discharging capabilities, so as to realize its constant operation and variable frequency work at different frequencies, can produce and be fixed on difference
The continuous impulse of pulse width can be adjusted in frequency and freely, freely adjustable pulse width can also be produced and can be passed through
Frequency conversion adjusts continuous impulse of the pulse in time shaft position.
Compared with prior art, the continuous impulse generator circuit structure that the present invention is provided is simple, is partly led with existing CMOS
Body technology is completely compatible, and can more flexible, the more easily transmission signal bandwidth that is optimal with facilitating of adjustment pulse width,
The pulse train that frequency is controllable and pulsewidth is different is provided, the bandwidth of adjustment transmission signal obtains high-quality signal so that modulation
Mode is more flexible, is widely used in wireless communication field.
Brief description of the drawings
Fig. 1 is in the prior art using XOR gate generation UWB impulse circuits structure and pulse signal schematic diagram；
Fig. 2 produces UWB impulse circuits structure and pulse signal schematic diagram to use in the prior art with door；
The continuous impulse generator architecture block diagram that Fig. 3 provides for the present invention；
The continuous impulse generator circuit structure schematic diagram that Fig. 4 provides for the present invention；
The continuous impulse frequency generator control module electrical block diagram that Fig. 5 provides for the present invention.
Embodiment
To make the object, technical solutions and advantages of the present invention clearer, the implementation below in conjunction with accompanying drawing to the present invention
Mode is described in further detail.Those skilled in the art can understand the present invention easily as the content disclosed by this specification
Other advantages and effect.The present invention can also be embodied or applied by other different embodiments, this explanation
Every details in book can also based on different viewpoints and application, without departing from the spirit of the present invention carry out various modifications or
Change.In addition, unless otherwise specified, " connection " involved by present embodiment refers both to be electrically connected relation.
The continuous impulse generator architecture block diagram that Fig. 3 provides for the present invention.
As shown in figure 3, the continuous impulse generator that present embodiment is provided includes：Oscillator feedback loop 100, institute
Stating Oscillator feedback loop 100 includes driving variable phase inverter 100a and even number of inverters unit to connect to form chain of inverters
100b；Wherein：Variable phase inverter 100a is driven to include：Inverter module 101；PMOS arrays 200, are connected to working power VddWith
Between the output end of inverter module 101 of the variable phase inverter 100a of driving；It is variable that NMOS arrays 200 are connected to the driving
Between phase inverter the 100a output end of inverter module 101 and ground GND.
In the continuous impulse generator that present embodiment is provided, as shown in figure 3, chain of inverters 100b is anti-by even number
Phase device unit connects to be formed, wherein, the characteristic size and driving force of each inverter module are equal.
In present embodiment, chain of inverters 100b input is with driving inverter module in variable phase inverter 100a
101 output end is connected, chain of inverters 100b output end and the input for driving inverter module 101 in variable phase inverter 100a
End is connected, and constitutes an Oscillator feedback loop for possessing odd number of inverter elements, the base of ring oscillator vibration can be achieved
This function.
As most preferred embodiment, chain of inverters 100b includes the inverter module of 2 or 4 head and the tail series connection.
The continuous impulse generator circuit structure schematic diagram that Fig. 4 provides for the present invention.
In the continuous impulse generator that present embodiment is provided, as shown in figure 4, driving variable phase inverter 100a also to wrap
Include：First current source I of PMOS transistor formation1With the second current source I of nmos pass transistor formation2；Inverter module 101 is
CMOS inverter unit, including the first PMOS transistor Mp0With the first nmos pass transistor Mn0, the first PMOS transistor Mp0With
First nmos pass transistor Mn0Source electrode connect the first current source I respectively1With the second current source I2, i.e.,：First PMOS transistor Mp0
Source electrode be connected with a drain electrode as the PMOS transistor of voltage-controlled current source, the first nmos pass transistor Mn0Source electrode and one
Drain electrode as the nmos pass transistor pipe of voltage-controlled current source is connected.The first PMOS transistor Mp0With the first nmos pass transistor
Mn0Grid be connected together as the input of the inverter module 101, drain electrode is connected together as the phase inverter
The output end of unit 101.
As preferred embodiment, as shown in Figure 3, Figure 4, the continuous impulse generator also include frequency control module 400 its
In：The frequency control module 400 includes two output ends, the variable phase inverter 100a of driving is all connected with, for changing driving
The charging and discharging capabilities of inverter module in variable phase inverter 100a, realize the regulation to frequency of oscillation.
Fig. 5 is the electrical block diagram of frequency control module 400 in present embodiment.
In present embodiment, as shown in figure 5, frequency control module 400 includes two-stage current mirroring circuit, wherein, MOS
Transistor M1, M2, M3 grid are connected, and source electrode is all connected with working power Vdd, and MOS transistor M1 grid and drain electrode are connected to one
Rise, form the first current mirroring circuit；And MOS transistor M4, M5 grid are connected, source grounding GND, and drain and connect respectively
MOS transistor M2, M3 drain electrode, and MOS transistor M4 grid and drain electrode link together, and forms the second current mirroring circuit.
The MOS transistor M1 drain electrodes pass through a controllable current source I3It is connected with ground GND, controllable current source I3For MOS transistor M1,
First current mirroring circuit of M2, M3 formation provides reference current, and the output current of MOS transistor M2 drain electrodes is MOS transistor
Second current mirroring circuit of M4, M5 formation provides reference current.
In the embodiment, as shown in Figure 4, Figure 5, MOS transistor M1, M2, M3 grid voltage P-bias conducts
One output end of frequency control module 400, is connected in the variable phase inverter 100a of driving and forms the first voltage-controlled current source I1's
PMOS transistor grid；MOS transistor M4, M5 grid voltage N-bias as frequency control module 400 another output end,
It is connected in the variable phase inverter 100a of driving and forms the second voltage-controlled current source I2Nmos pass transistor grid.It is used as optimal implementation
Example, MOS transistor M1, M2, M3 are PMOS transistor, and MOS transistor M4, M5 are nmos pass transistor.
In present embodiment, frequency control module 400 is according to the output frequency and reality of Oscillator feedback loop 100
Using required frequency of oscillation phase inverter 100a variable to driving first, second current source I1、I2It is adjusted, changes driving
The charging and discharging capabilities of inverter module 101 in variable phase inverter 100a, realize the regulation to frequency of oscillation.
In present embodiment, the first current source I in variable phase inverter 100a is driven1With the second current source I2It is main
Effect is the first PMOS transistor M of controlp0With the first nmos pass transistor Mn0The charging and discharging currents of the inverter module of composition, lead to
Control is crossed as first, second voltage-controlled current source I1、I2PMOS transistor and nmos pass transistor grid voltage, thus it is possible to vary
Voltage-controlled current source I1、I2Size of current, poured into so as to change by the first PMOS transistor Mp0With the first nmos pass transistor Mn0Structure
Into inverter module charging and discharging currents size, so that the frequency of oscillation of whole Oscillator feedback loop 100 is adjusted, to reach
Adjust the purpose of continuous impulse frequency generator.
In the continuous impulse generator that present embodiment is provided, as shown in Figure 3, Figure 4, the variable phase inverter of driving
100a also includes being connected to working power VddBetween the output end of inverter module 101 of the variable phase inverter 100a of driving
PMOS arrays 200.The PMOS arrays 200 include n PMOS transistor, wherein n >=1 and n is integer；PMOS gusts of the formation
Each PMOS transistor M of row 200p1~MpnSource electrode be all connected with working power Vdd, drain and be all connected with the variable phase inverter of driving
100a output ends, grid is respectively by switching Sp1~SpnAnd Sp1’~Spn' connection working power VddIt is variable anti-with the driving
Phase device 100a input.
In present embodiment, in the PMOS arrays 200, when what is be connected with driving variable phase inverter 100a inputs
Switch SpiConducting and working power VddThe switch S of connectionpi' when disconnecting, correspondence PMOS transistor MpiGating；Conversely, working as and drive
The switch S of dynamic variable phase inverter 100a inputs connectionpiDisconnect and working power VddThe switch S of connectionpi' conducting when, correspondence
PMOS transistor MpiIt is not gated.Wherein：1≤i≤n and n are integer.
With PMOS transistor M in PMOS arrays 200p1Gate and PMOS transistor Mp2Exemplified by not gated.When circuit work
Need to select the PMOS transistor M in PMOS arrays 200p1When access drives variable phase inverter 100a, S is switchedp1Closure conducting,
By PMOS transistor Mp1The variable phase inverter 100a of grid end access driving input, and Simultaneous Switching Sp1' disconnect, it is ensured that
PMOS transistor Mp1Normal work；And unchecked PMOS transistor M in PMOS arrays 200p2, then must be by Sp2Disconnect, Sp2’
Closure conducting so that PMOS transistor Mp2With driving variable phase inverter 100a input to disconnect, and by PMOS transistor Mp2's
Grid end meets working power Vdd, so as to turn off PMOS transistor Mp2, it is ensured that circuit stability.
In the continuous impulse generator that present embodiment is provided, as shown in Figure 3, Figure 4, the variable phase inverter of driving
100a also includes the NMOS being connected between the output end of inverter module 101 of the variable phase inverter 100a of driving and ground GND
Array 300.The NMOS arrays 300 include m nmos pass transistor, wherein m >=1 and m is integer；The formation NMOS arrays
300 each nmos pass transistor Mn1~MnmSource grounding GND, drain electrode is all connected with the driving variable phase inverter 100a output
End, grid is respectively by switching Sn1~SnmAnd Sn1’~Snm' the variable phase inverter 100a of the connection driving input and ground
GND。
In present embodiment, in the NMOS arrays 300, when what is be connected with driving variable phase inverter 100a inputs
Switch SnlConducting, the switch S being connected with ground GNDpl' when disconnecting, correspondence nmos pass transistor MnlGating；Conversely, when variable with driving
The switch S of phase inverter 100a inputs connectionnlThe switch S for disconnecting, being connected with ground GNDnl' conducting when, correspondence nmos pass transistor Mnl
It is not gated.Wherein：1≤l≤m and l are integer.
With nmos pass transistor M in NMOS arrays 300n2Gate and nmos pass transistor Mn1Exemplified by not gated.When circuit work
Need to select the nmos pass transistor M in NMOS arrays 300n2When pipe access drives variable phase inverter 100a, S is switchedn2Closure is led
It is logical, by nmos pass transistor Mn2The variable phase inverter 100a of grid end access driving input, and Simultaneous Switching Sn2' disconnect, it is ensured that
Nmos pass transistor Mn2Normal work.Similarly, unchecked NMOS tube M in NMOS arrays 300n1, then S will must be switchedn1Disconnect,
And switch Sn1' closure conducting so that nmos pass transistor Mn1With driving variable phase inverter 100a input to disconnect, and by NMOS
Transistor Mn1Grid end ground connection GND, so as to turn off nmos pass transistor Mn1, it is ensured that circuit stability.
In present embodiment, pass through the switch S in PMOS arrays 200p（Sp1~Spn, Sp1’~Spn’）With NMOS arrays
Switch S in 300n（Sn1~Snm, Sn1’~Snmn’）Closure conducting with disconnecting, change the variable phase inverter 100a's of access driving
The quantity and size of PMOS transistor and nmos pass transistor, drive variable phase inverter 100a upset to differentiate electricity so as to change
It is flat, so as to realize the regulation to continuous impulse generator dutycycle.Wherein, each switch S in PMOS arrays 200p（Sp1~Spn,
Sp1’~Spn’）With each switch S in NMOS arrays 300n（Sn1~Snm, Sn1’~Snmn’）The outside that is connected through of on off state
Digital input signals are controlled.
In present embodiment, PMOS arrays 200 and NMOS arrays 300 are act as：Changed according to system requirements
It is defeated to change to the ability for driving the charge and discharge of the output end parasitic capacitance of inverter module 101 in variable phase inverter 100a
Go out the dutycycle of pulse signal.
It is each in the PMOS arrays 200 as most preferred embodiment in order to realize the programmable of pulse signal duty cycle adjustment
PMOS transistor Mp1~MpnChannel length and the inverter module 101 in the first PMOS transistor Mp0Channel length phase
Deng；PMOS transistor M in the PMOS arrays 200piChannel width be the inverter module 101 in the first PMOS transistor
Mp0The 2 of channel widthi-1Times, wherein：1≤i≤n and i are integer.I.e.：In PMOS arrays 200, PMOS transistor Mp1Raceway groove
Width and the first PMOS transistor Mp0Channel width it is equal；PMOS transistor Mp2Channel width be the first PMOS transistor
Mp02 times of channel width；PMOS transistor Mp3Channel width be the first PMOS transistor Mp0Channel width 4
Times ... by that analogy, PMOS transistor MpnFor channel width be the first PMOS transistor Mp02n-1Times.
Similarly, each nmos pass transistor M in the NMOS arrays 300n1~MnmChannel length and the inverter module 101
In the first nmos pass transistor Mn0Channel length it is equal；Nmos pass transistor M in the NMOS arrays 300niChannel width be institute
State the first nmos pass transistor M in inverter module 101n0The 2 of channel widthl-1Times, wherein：1≤l≤m and l are integer.I.e.：
In NMOS arrays 300, nmos pass transistor Mn1Channel width and the first nmos pass transistor Mn0Channel width it is equal；NMOS is brilliant
Body pipe Mn2Channel width be the first nmos pass transistor Mn02 times of channel width；Nmos pass transistor Mn3Channel width be the
One nmos pass transistor Mn04 times of channel width ... by that analogy, nmos pass transistor MnmFor channel width be the first NMOS
Transistor Mn02m-1Times.
So relative less metal-oxide-semiconductor can be accessed, to realize the duty cycle adjustment of maximum magnitude.
As most preferred embodiment, in the PMOS arrays 200 in PMOS transistor quantity n and the NMOS arrays 300
Nmos pass transistor quantity m is equal, i.e. n=m.Now, the number of gating transistor in PMOS arrays 200 and NMOS arrays 300 is passed through
Amount control, it is possible to achieve the full scale regulation of output pulse signal dutycycle, with maximum regulation dynamic.Wherein, PMOS gusts
All switches carry out controlling switch state by the digital input control signal of outside input in row 200 and NMOS arrays 300, realize
The gating Access Control of MOS transistor, and in PMOS arrays 200 and NMOS arrays 300 transistor particular number, according to system
Required duty cycle adjustment scope and degree of regulation are flexibly determined as design parameter.
The continuous impulse generator that present embodiment is provided, working power V is connected across by regulationddIt is variable with driving
PMOS arrays 200 in phase inverter 100a between inverter module 101 are with being connected across ground GND with driving in variable phase inverter 100a
The PMOS transistor and NMOS crystal of the access input of inverter module 101 of NMOS arrays 300 between inverter module 101
Pipe quantity drives the upset of inverter module 101 in variable phase inverter 100a to differentiate level to adjust, thus realize control and
Adjust the purpose of output pulse signal dutycycle.
Meanwhile, current source grid end voltage in variable phase inverter 100a is driven by the control of frequency control module 400, to adjust
Variable phase inverter 100a charging and discharging capabilities are driven, so that its constant operation and variable frequency work at different frequencies is realized,
It can produce and fix on a different frequency and can freely adjust the continuous impulse of pulse width, can also produce freely adjustable
Pulse width and can by frequency conversion adjust pulse time shaft position continuous impulse.
Compared with prior art, the continuous impulse generator circuit structure that present embodiment is provided is simple, and existing
Cmos semiconductor technique is completely compatible, and being capable of transmission more flexible, that more easily adjustment pulse width is optimal with facilitating
Signal bandwidth obtains high-quality letter there is provided the pulse train that frequency is controllable and pulsewidth is different, the bandwidth of adjustment transmission signal
Number so that modulation system is more flexible, is widely used in wireless communication field.
Although by referring to some of the preferred embodiment of the invention, being shown and described to the present invention,
It will be understood by those skilled in the art that can to it, various changes can be made in the form and details, without departing from this hair
Bright spirit and scope.
Claims (9)
1. a kind of continuous impulse generator, it is characterised in that including Oscillator feedback loop, the Oscillator feedback loop includes
Variable phase inverter and even number of inverters unit is driven to connect the chain of inverters to be formed, the variable phase inverter of driving includes：
Inverter module；
Between PMOS arrays, the inverter module output end for being connected to working power and the variable phase inverter of the driving；
NMOS arrays, are connected between the inverter module output end of the variable phase inverter of driving and ground；Wherein, the driving
Variable phase inverter also includes：First current source of PMOS transistor formation and the second current source of nmos pass transistor formation；It is described
Inverter module is CMOS inverter unit, including the first PMOS transistor and the first nmos pass transistor, the first PMOS are brilliant
The source electrode of body pipe and the first nmos pass transistor connects the first current source and the second current source respectively, and grid is connected together as institute
The input of inverter module is stated, drain electrode is connected together as the output end of the inverter module；
The continuous impulse generator also includes frequency control module, and the frequency control module includes two output ends, connected respectively
The first, second current source grid is connect, the frequency for adjusting continuous impulse generator；
The PMOS arrays include n PMOS transistor, wherein n >=1 and n is integer；The source electrode of each PMOS transistor is equal
Working power is connected, drain electrode is all connected with the variable inverter output of driving, and grid connects work electricity by a switch
Source and the input by another switch connection variable phase inverter of driving.
2. continuous impulse generator according to claim 1, it is characterised in that the even number of inverters unit series connection shape
Into chain of inverters include 2 or 4 inverter modules, and the characteristic size and driving force of each inverter module are homogeneous
Deng.
3. continuous impulse generator according to claim 1, it is characterised in that each PMOS transistor in the PMOS arrays
Channel length it is equal with the channel length of the first PMOS transistor in the variable phase inverter of the driving；In the PMOS arrays
PMOS transistor MpiChannel width be 2 of the first PMOS transistor channel width in the variable phase inverter of the drivingi-1Times, its
In：1≤i≤n and i are integer.
4. continuous impulse generator according to claim 1, it is characterised in that in the PMOS arrays, variable with driving
Inverter input connection switch conduction, be connected with working power when switching off, correspondingly PMOS transistor gate；It is on the contrary
Then correspond to PMOS transistor not gated.
5. continuous impulse generator according to claim 1, it is characterised in that it is brilliant that the NMOS arrays include m NMOS
Body pipe, wherein m >=1 and m are integer；The source grounding of each nmos pass transistor, it is variable anti-that drain electrode is all connected with the driving
The output end of phase device, grid connects the input of the variable phase inverter of driving by a switch and switched by another
Connection ground.
6. continuous impulse generator according to claim 5, it is characterised in that each nmos pass transistor in the NMOS arrays
Channel length it is equal with the channel length of the first nmos pass transistor in the variable phase inverter of the driving；In the NMOS arrays
Nmos pass transistor MnlChannel width be 2 of the first nmos pass transistor channel width in the variable phase inverter of the drivingl-1Times, its
In：1≤l≤m and l are integer.
7. continuous impulse generator according to claim 5, it is characterised in that in the NMOS arrays, variable with driving
Inverter input connection switch conduction, be connected to ground when switching off, correspondence nmos pass transistor gating；It is on the contrary then correspond to
Nmos pass transistor is not gated.
8. the continuous impulse generator according to any one in claim 1~7, it is characterised in that the PMOS arrays
Digital input control signal is respectively connected with each switch in the NMOS arrays, for controlling each PMOS in the PMOS arrays
The strobe state of each nmos pass transistor in transistor and NMOS arrays, to adjust the dutycycle of continuous impulse generator.
9. the continuous impulse generator according to any one in claim 2~7, it is characterised in that the PMOS arrays
Middle PMOS transistor quantity n is equal with nmos pass transistor quantity m in the NMOS arrays.
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| CN104967464B (en) * | 2015-07-03 | 2017-06-20 | 桂林电子科技大学 | The digital BPSK modulation impulse radio ultra-wideband emitters of CMOS |
| CN106373601B (en) * | 2016-10-19 | 2019-02-19 | 成都益睿信科技有限公司 | A kind of impulse generator of self-refresh |
| CN108134602B (en) * | 2017-12-21 | 2021-08-24 | 长鑫存储技术有限公司 | Duty ratio calibration circuit and semiconductor memory |
| CN110221233A (en) * | 2019-05-30 | 2019-09-10 | 北京无线电计量测试研究所 | A kind of the standard harmonic signal output apparatus and device of non-linear S-parameters |
| CN110391802B (en) * | 2019-06-11 | 2020-12-01 | 西安电子科技大学 | Frequency shift Gaussian pulse generating circuit based on digital logic realization |
| CN111030726B (en) * | 2019-12-13 | 2022-02-25 | 展讯通信（上海）有限公司 | Radio frequency front end control circuit and control method thereof, radio frequency front end control chip, system, storage medium and terminal |
| CN112311362A (en) * | 2020-12-07 | 2021-02-02 | 成都锐成芯微科技股份有限公司 | Circuit for adjusting duty ratio of clock signal |
| CN116961585B (en) * | 2023-08-11 | 2024-03-08 | 灿芯半导体(上海)股份有限公司 | Self-biased voltage-controlled oscillator circuit |
| CN117155352A (en) * | 2023-10-18 | 2023-12-01 | 上海合芯数字科技有限公司 | Clock signal bandwidth regulating circuit and clock signal bandwidth regulating method |
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| CN101924574A (en) * | 2010-08-30 | 2010-12-22 | 复旦大学 | Pulse ultra-wideband transmitter with adjustable amplitude and spectrum |
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