CN101669286A - Apparatus and method for generating fine timing from coarse timing source - Google Patents

Abstract

An apparatus for generating a pulse at a particular time dictated by an input. The apparatus may comprise an offset voltage generator for generating an offset voltage that is a function of the input,a current generator for generating a current, a ramp voltage generator for generating a ramp voltage having an initial value as a function of the offset voltage and a slope as a function of the current, and a pulse generator for generating a pulse in response to the ramp voltage reaching a threshold voltage. With this configuration, the time the pulse is generated is controlled by the input. Thismay be used in transceivers to control the time of transmission and the time of reception. Such times may be used to set up communication channels, such as ultra-wide band (UWB) channels, for communicating with other devices.

Description

Be used for producing the apparatus and method of accurate sequential from rough sequential source

Technical field

The application relates generally to the apparatus and method that are used for producing from the rough sequential source such as cycle clock accurate sequential (for example pulse).

Background technology

Communication system is in the past used the low technology of common power efficiency.Do not sending or also needing the transmitter and receiver of power supply continuously during received communication even these systems usually use.It is this that still normally efficient is lower from the viewpoint of power in the system of power consumption when being in idle condition.

In some applications, the communication system that this power efficiency is low can present limitation in its expansion is used.For example, depend on battery powered portable communication device and before its battery need be replaced or charge, have relatively short continued operation useful life usually.In some cases, this can cause disadvantageous result, during the session of for example loss of data, communication delay, reduction and downtime.

On the other hand, at one's leisure between during the fully low communication system of power consumption can in the long time period, operate with limited power supply usually.Therefore, only just the communication system to the transmitter energising usually can be than the transmitter consumption less power of continuous energising in the time will sending signal.Similarly, only just the communication system to the receiver energising usually can be than the receiver consumption less power of continuous energising when wanting received signal.

Summary of the invention

It below is the general introduction of the exemplary arrangement of disclosure file.For convenience, one or more schemes of disclosure file can be called " some schemes " in this article.

Some schemes of disclosure file relate to a kind of device that is used for producing according to input pulse.Described device comprises: first generator is used to produce the bias voltage as the function of described input; Second generator is used to produce electric current; The 3rd generator is used to produce ramp voltage, and described ramp voltage has as the initial value of the function of described bias voltage with as the slope of the function of described electric current; And the 4th generator, be used for reaching threshold voltage and producing pulse in response to described ramp voltage.

If described input has been indicated more near the bias voltage of threshold voltage, ramp voltage just reaches this threshold voltage in relatively short time interval so, causes producing relatively earlier pulse.On the other hand, if the bias voltage further from threshold voltage has been indicated in described input, ramp voltage just reaches this threshold voltage in relatively long time interval so, causes producing pulse relatively laterly.Therefore, the time of generation pulse is subjected to the control of described input.This can be used for enable transmission machine and receiver in the duration of pulse, so that the time of the transmission of control signal and reception.These times can be used to set up communication channel and come to communicate with miscellaneous equipment.

In some versions, the initial value of ramp voltage can be substantially the same with bias voltage or relevant with bias voltage.Bias voltage can be produced by digital to analog converter (DAC).Can use calibration circuit to come bias voltage is calibrated, so that described input is associated with the generation of pulse.More specifically, calibration circuit can be determined digital input word corresponding to the upper limit (for example threshold voltage of pulse generator) of bias voltage for DAC.Can be the digital input word of the lower limit of the pre-defined bias voltage corresponding to DAC of DAC.Can come definite input word by interpolation corresponding to the bias voltage between the upper limit and lower limit for DAC.

In some versions, the slope of electric current and ramp voltage can be positive, negative, linear or nonlinear.Electric current can be produced by current-mode digital to analog converter (DAC).Can use calibration circuit to come electric current is calibrated, so that described input is associated with the generation of pulse.More specifically, bias voltage is being set under the situation of its lower limit, the correcting current circuit is determined an electric current, and this electric current causes ramp voltage to reach threshold voltage at the time upper limit place that pulse produces.Clock source that can periodic is defined in the interval that wherein produces pulse.

In some versions, described device can be configured to or be used for communication equipment, to set up for example one or more ultra broadbands (UWB) channel, so that use arteries and veins to divide multiple access (PDMA) technology and miscellaneous equipment to communicate.The UWB channel can have 20% or the bigger order of magnitude on relative bandwidth, bandwidth on the 500MHz or the bigger order of magnitude or the two.

In some versions, described device can be embodied as or be used for earphone, medical supply, microphone, biometric sensor, heart rate monitor, pedometer, EKG equipment, user I/O equipment, wrist-watch, remote controller, switch, tire pressure monitor, amusement equipment, computer, point of sale (POS) equipment, hearing aids, set-top box, cell phone, the equipment that perhaps has the transmission of wireless signals ability of some form.In some versions, described device can be implemented in the access device (for example WiFi access point) that is used for communication system or comprises this access device.For example, described device can provide connective via another network of wired or wireless communication chain road direction (for example wide area network of the Internet and so on).

When taking in conjunction with the accompanying drawings, according to the following detailed description of disclosure file, other scheme, advantage and the innovative characteristics of disclosure file are conspicuous.

Description of drawings

Figure 1A-B shows each block diagram of exemplary means that is used to produce pulse according to some schemes of disclosure file;

Fig. 1 C shows the flow chart according to the illustrative methods of the generation pulse of some schemes of disclosure file;

Fig. 2 A shows the curve chart by the exemplary signal that exemplary means produced that is used to produce pulse according to some schemes of disclosure file;

Fig. 2 B shows the curve chart by the exemplary signal that exemplary means produced that is used to produce pulse according to some schemes of disclosure file;

Fig. 3 shows the schematic diagram of exemplary means that is used to produce pulse according to some schemes of disclosure file;

Fig. 4 A-B shows the curve chart by the exemplary signal that exemplary means produced that is used to produce pulse according to some schemes of disclosure file;

Fig. 5 A shows some schemes according to disclosure file, to the flow chart of the illustrative methods of being calibrated by the electric current that exemplary means produced that is used to produce pulse;

Fig. 5 B-C show according to some schemes of disclosure file during calibration process by the curve chart of the various signals that exemplary means produced that are used to produce pulse;

Fig. 6 shows some schemes according to disclosure file, to the flow chart of the illustrative methods of being calibrated by the bias voltage that exemplary means produced that is used to produce pulse;

Fig. 7 shows the block diagram according to the exemplary communication devices of some schemes of disclosure file;

Fig. 8 A-C shows the sequential chart that divides multiple access (PDMA) modulation technique according to the various arteries and veins of some schemes of disclosure file; And

Fig. 9 shows the block diagram that passes through the various communication equipments that many channels communicate each other according to some schemes of disclosure file.

Embodiment

Each scheme of disclosure file below is described.Obviously, the technology of this paper can be presented as various forms, and any concrete structure disclosed herein, function or structure and function all only are representational.According to the instruction of this paper, one of ordinary skill in the art would recognize that certain specified scheme disclosed herein can be independent of any other scheme and realize, and can make up two or more in these schemes in every way.For example, the scheme of any amount that can set forth with this paper is come implement device or implementation method.In addition, replenishing of one or more schemes of setting forth as this paper perhaps substitutes one or more schemes that this paper sets forth, and can use other structure, function or structure and function to realize this device or implements this method.

As the example of above notions, in some versions, the device that is used to produce pulse comprises: be used to produce the generator as the bias voltage of the function of input; Be used to produce the generator of electric current; Be used to produce the generator of ramp voltage, described ramp voltage has as the initial value of the function of described bias voltage with as the slope of the function of described electric current; And be used for reaching threshold voltage and producing the generator of pulse in response to described ramp voltage.In other scheme, described device comprises the generator that is used to produce as the ramp voltage of the function of importing; And the generator that is used for when described ramp voltage reaches threshold voltage, producing the sequential incident.

Figure 1A shows the block diagram of exemplary means 100 that is used to produce pulse according to some schemes of disclosure file.Will appreciate that device 100 only is an example of sequential event generator.Device 100 produces pulse at the special time place by pulse position input indication.As discussed in more detail below, device 100 can be used for the enable transmission machine so that transmit and/or enable receiver so that received signal.In this way, can set up one or more communication channel by means of the pulse modulation technique of dividing multiple access (PDMA) such as arteries and veins.

In a word, device 100 produces ramp voltages, and it comprises as the initial bias voltage of the function of input with as the slope of the function of electric current.When ramp voltage reached a threshold voltage, device 100 produced pulse.By the function of bias voltage as described input changed, ramp voltage reaches threshold voltage at different time places.Therefore, can come the time of control impuls generation by described input.

More specifically, device 100 comprises bias voltage generator 102, current generator 104, ramp voltage generator 106 and pulse generator 108.Bias voltage generator 102 receives input, numeric word for example, and produce corresponding bias voltage.Current generator 104 produces electric current, and this electric current can be constant basically, can change linearly in time or can non-linearly change in time.In some versions, electric current can flow to ramp voltage generator 106 from current generator 104.In some versions, electric current can flow to current generator 104 from ramp voltage generator 106.

Ramp voltage generator 106 is according to producing ramp voltage from the bias voltage of bias voltage generator 102 receptions and the electric current that receives from current generator 104.In some versions, ramp voltage generator 106 uses bias voltage to set initial value as ramp voltage.In some versions, ramp voltage generator 106 uses electric current to control the slope of ramp voltage.As example, 106 pairs of electric currents of ramp voltage generator carry out integral operation to produce ramp voltage.

When ramp voltage reached predetermined threshold voltage, pulse generator 108 produced pulse.As described, bias voltage is set in described input, and described bias voltage is the initial value of ramp voltage.Therefore, by changing bias voltage, ramp voltage reaches threshold voltage at the different time place of depending on described input.Therefore, the sequential that produces by described input control impuls.With reference to following example, it is explained better.

Fig. 2 A shows the curve chart according to the exemplary signal that is produced by exemplary means 100 of some schemes of disclosure file.In this example, the electric current that is produced by current generator 104 is constant basically, and flows to ramp voltage generator 106 from current generator 104.The longitudinal axis of this curve chart is represented ramp voltage, the transverse axis express time.Near the top of curve chart, shown threshold voltage.As mentioned above, when ramp voltage reached threshold voltage, pulse generator 108 produced pulse.

Shown in this curve chart, the time that the slope reaches threshold value is depended on bias voltage.For example, if according to described input, bias voltage generator 102 produces the bias voltage of 400 millivolts (mV), and then ramp voltage just reaches threshold value at the time place of 100 nanoseconds (ns).As another example, if according to described input, bias voltage generator 102 produces the bias voltage of 1200mV, and then ramp voltage just reaches threshold value at the time place of 60 nanoseconds (ns).As another example again, if according to described input, bias voltage generator 102 produces the bias voltage of 2000mV, and then ramp voltage just locates to reach threshold value in the time of 20 nanoseconds (ns).Therefore, described input is controlled at the time of the generation pulse in the 100ns interval.

Fig. 2 B shows the curve chart according to the exemplary signal that is produced by exemplary means 100 of some schemes of disclosure file.In this example, the electric current that is produced by current generator 104 is constant basically, and flows to current generator 104 from ramp voltage generator 106.Again, the longitudinal axis of this curve chart is represented ramp voltage, the transverse axis express time.Near the bottom of curve chart, shown threshold voltage.As mentioned above, when ramp voltage reached this threshold value, pulse generator 108 produced pulse.

As shown in the figure, slope time of reaching threshold value is depended on bias voltage.For example, if according to described input, bias voltage generator 102 produces the bias voltage of 2000mV, and then ramp voltage just reaches threshold value at the time place of 100 nanoseconds (ns).As another example, if according to described input, bias voltage generator 102 produces the bias voltage of 1200mV, and then ramp voltage just reaches threshold value at the time place of 60 nanoseconds (ns).As another example again, if according to described input, bias voltage generator 102 produces the bias voltage of 400mV, and then ramp voltage just locates to reach threshold value in the time of 20 nanoseconds (ns).Therefore, described input is controlled at the time of the generation pulse in the 100ns interval.

In the former example, described input is controlled in the time interval when produce pulse.In this example, this time interval is 100ns.Will appreciate that this time interval can have different time spans.In addition, this time interval can repeat continuously in response to the clock source of substantial constant frequency.For example, can use the clock of 10MHz to come this 100ns time interval of repeated priming.For each time interval, new input all makes the special time place in this interval produce pulse.As discussed in more detail below, can use the position of one or more pulses in this time interval to set up one or more parallel communications channel with another communication equipment.

Figure 1B shows the block diagram that is used to produce as the exemplary means 150 of the pulse of the function of input.Device 150 can be embodied as one or more integrated circuits (IC).In this example, IC 152,154,156 and 158 usefulness can be acted on to be similar to the module that aforesaid mode produces bias voltage, electric current, ramp voltage and pulse.

Fig. 1 C shows the flow chart according to the illustrative methods 170 of the generation pulse of some schemes of disclosure file.According to method 170, produce bias voltage, described bias voltage is the function (piece 172) of the input such as the input digit word.In addition, produce electric current (piece 174).In addition, produce ramp voltage, it has as the initial value of the function of bias voltage with as the slope (piece 176) of the function of electric current.Subsequently, when ramp voltage reaches threshold voltage, produce pulse (piece 178).

Fig. 3 shows the schematic diagram of exemplary means 300 that is used to produce pulse according to some schemes of disclosure file.Device 300 is examples of the specific implementation of aforementioned means 100 and 150.In former scheme, device 300 produces pulse at the special time place by the input indication.As described below in conjunction with communication equipment, device 300 can be used to use such as the pulse modulation of the particular type of PDMA sets up one or more parallel communications channel.

Concrete, device 300 comprises bias voltage generator 302, current generator 320, reset circuit 340, ramp voltage generator 360 and pulse generator 380.The bias voltage that bias voltage generator 302 produces as the function of input.Current generator 320 produces the electric current of substantial constant.Ramp voltage generator 360 produces ramp voltages, and it has as the initial value of the function of bias voltage with as the slope of the function of electric current.In these exemplary arrangement, the initial value of ramp voltage is identical with bias voltage basically.In addition, ramp voltage generator 360 produces ramp voltage by means of the electric current that receives from current generator 320 is carried out integral operation in fact.

When ramp voltage reached threshold voltage, pulse generator 380 produced pulse.Reset circuit 340 in response to the forward position of pulse to the integrator discharge of ramp voltage generator 360, so that pulse generator 380 produces the back edge of pulse when integrator voltage is reduced to the threshold value that is lower than pulse generator 380.The back edge that reset circuit 340 can be configured to begin pulse is that the pulse that is produced obtains specific pulse duration.

Bias voltage generator 302 also comprises calibration circuit, in order to the calibration bias voltage, so that described input is associated with the special time that pulse produces.More specifically, the bias voltage calibration circuit is determined an input, and the bias voltage that this input produces is substantially equal to the threshold voltage of pulse generator 380.In addition, current generator 320 comprises calibration circuit, in order to calibration current, so that equally described input is associated with the special time that pulse produces.More specifically, the correcting current circuit produces an electric current, for with a time interval in the earliest the corresponding bias voltage of pulse position, this electric current produces a ramp voltage, this ramp voltage reaches the threshold voltage of pulse generator 380 greatly about the place, end of this time interval.As discussed in more detail below, reset circuit 340 helps the calibration of electric current.

More specifically, bias voltage generator 302 comprises state machine 304, digital to analog converter (DAC) 310, transmission gate 316, delay element 318, differential amplifier 314, threshold dector 312, latch 308 and AND door 306.DAC 310 produces bias voltage in response to described input, and in this example, described input can be the numeric word of 8 bits.Transmission gate 316 transmits bias voltages in response to the delay edge of clock signal C lk to ramp voltage generator 360, wherein the period definition of clock signal C lk one time interval.Other equipment, promptly state machine 304, differential amplifier 314, threshold dector 312, latch 308 and AND door 306 are used to calibrate bias voltage, as discussed in more detail below.

Current generator 320 comprises phase place and frequency detector (PFD) 322, lock detector 324 and current-mode DAC 326.Current-mode DAC 326 produces the electric current of substantial constant, and it is applied to ramp voltage generator 360.PFD 322 and lock detector 324 are used for calibration current, as discussed in more detail below.

Ramp voltage generator 360 comprises capacitive element C and transistor 362.Capacitive element C is used for from the bias voltage generator 302 initial bias voltages that receive, so that the ramp voltage that is produced by ramp voltage generator 360 has the initial value that is substantially equal to bias voltage.Capacitive element C produces ramp voltage also as integrator in fact the electric current that receives from current generator 320 is carried out integral operation.Therefore, ramp voltage has as the initial value of the function of bias voltage with as the slope of the function of electric current.362 pairs in transistor is made response by the reset signals that reset circuit 340 produces, so as in response to pulse begin to come capacitive element C is discharged, as explained in more detail below.

Pulse generator 380 comprises the pair of phase inverters 382 and 384 of coupled in series.The input of first inverter 382 receives ramp voltage from ramp voltage generator 360.The output of second inverter 384 produces pulse.The output of second inverter 384 also is fed replys position circuit 340, produces reset signal for use in reset circuit 340, and described reset signal makes capacitive element C discharge.Therefore, when ramp voltage reached the threshold voltage of inverter 382, the output of inverter 382 became logic low-voltage from logic high voltage, and it makes the output of inverter 384 become logic high voltage from logic low-voltage again.This has produced the forward position of pulse.

The forward position of pulse is fed replys position circuit 340, and it makes reset circuit 340 produce reset signal.Reset signal turn-on transistor 362, it makes the voltage on the capacitor become earth potential.This makes the output of the inverter 382 of winning become logic high voltage from logic low-voltage again, and it makes the transmission of second inverter 384 become logic low-voltage from logic high voltage again.This has produced the back edge of pulse.

Reset circuit 340 comprises AND door 350, latch 348, inverter 342, three input AND door 344 and OR doors 3346.As previously mentioned, reset circuit 340 produces reset signal, to make capacitive element C discharge in response to the forward position of the pulse that is produced by pulse generator 380.Reset circuit 340 also is used to calibrate the electric current that is produced by current generator 320, as discussed in more detail below.In normal running, CAL is set at logic low with calibrating signal.In calibration mode, CAL is set at logic high with calibrating signal.

In normal running, because anti-phase calibrating signal is a logic high, AND door 350 is delivered to feedback signal the clock input of latch 348.Therefore, in response to the forward position (for example rising edge) of pulse generator 380 generation pulses, AND door 350 produces rising edges, and it is applied to clock input of latch 348.This rising edge make be confined to logic high voltage Vdd, the voltage in data (D) input of latch 348 is sent to the Q output of latch 348.OR door 346 will be sent to the grid of the transistor 362 of ramp voltage generator 360 at the logic high voltage of the Q of latch 348 output place again.This conducting transistor 362, thereby make capacitive element C ground connection.Therefore, ramp voltage promptly is reduced to logic low-voltage, makes the inverter 382 of winning be converted to logic high voltage from logic low-voltage, and this makes second inverter 384 be converted to logic low-voltage from logic high voltage again.This has produced the back edge of pulse.

In beginning place of a new time interval, by the rising edge reset latch 348 of clock source Clk.This makes the Q output of latch 348 be transformed into logic low-voltage, sends it to transistor 362 by OR door 346.This makes transistor 362 end, thereby allows capacitive element C to receive new bias voltage and electric current, to produce ramp voltage.

The residue element of reset circuit 340, promptly inverter 3342, three input AND doors 344 are specifically designed to the correcting current process, as discussed in more detail below.Discuss the normal running of device 300 in more detail below with reference to Fig. 4 A-B.

Fig. 4 A-B shows some schemes according to disclosure file, and exemplary ramp voltage that is produced by exemplary pulse position modulation device 300 and pulsion phase are for the curve chart of time.In this example, time zero (0), 100ns, 200ns and 300ns represent the beginning in different time interval.These times are depicted as each vertical dotted line in the drawings except the real vertical curve corresponding to time zero (0).Can use and have the time interval that the clock signal C lk of 10MHz frequency for example defines this 100ns.

Further with reference to figure 3, locate at time zero (0), the output of pulse generator 380 is in logic low-voltage.This be because the voltage at capacitive element C two ends also be in logic low-voltage (for example ,～0V), it makes first inverter 382 of pulse generator 380 produce logic high voltages, it makes second inverter 384 of pulse generator 380 produce logic low-voltages again.

As previously mentioned, the edge of clock signal C lk (for example, rising edge) beginning one time interval.Therefore, locate at time zero (0), the rising edge of clock signal C lk makes the latch 348 of reset circuit 340 reset.In response, latch 348 produces logic low-voltage in its Q output place, sends it to the grid of transistor 362 by OR door 346, thus "off" transistor 362.This allows capacitive element C from bias voltage generator 302 reception bias voltages and from current generator 320 received currents.In addition, locate at time zero (0), the bias voltage that is produced by DAC 310 in response to input is sent to capacitive element C by transmission gate 316 in response to the edge of the delay of clock signal C lk.

As shown in Fig. 4 A, in this example, bias voltage is set at mid point a little more than its scope.Locate at time zero (0), capacitive element C begins the electric current from current generator 320 is carried out integral operation, the ramp voltage that increases progressively with generation.When ramp voltage reached the threshold voltage of first inverter 382 of pulse generator 380, the output of first inverter 382 was converted to logic low-voltage from logic high voltage.This makes the output of second inverter 384 of pulse generator 380 be converted to logic high voltage from logic low-voltage.This has produced the rising edge of pulse near 60ns.

The rising edge of pulse is fed back the input of AND door 350, and it makes the output of AND door 350 be converted to logic high voltage from logic low-voltage.This conversion makes latch 348 will be sent to its Q output at the logic high voltage of its D input.OR door 346 is sent to the logic high voltage of Q output place of latch the grid of transistor 362 again, thus turn-on transistor 362.The conducting of transistor 362 makes capacitive element C ground connection, thereby reduces ramp voltage significantly, shown in Fig. 4 A.This conversion makes the output of the inverter 382 of winning be converted to logic low-voltage from logic high voltage.This conversion makes second inverter 384 be converted to logic low-voltage from logic high voltage again, thereby produces the back edge of pulse, shown in Fig. 4 B.Can be configured between the input of the output of pulse generator 380 and ramp voltage generator 360 via the feedback loop of reset circuit 340, have preset width (for example, pulse lns) with generation.

After the very first time, finished in the interval, clock source Clk was enabled in second time interval of time 100ns place beginning.In second time interval, DAC 310 produces new bias voltage in response to a new input.In this example, the bias voltage that this is new is set at for its scope relatively low.Therefore, shown in Fig. 4 A, because new bias voltage is lower, ramp voltage reaches threshold voltage and has just spent more time.As a result, pulse be created in second time interval later relatively.Shown in Fig. 4 B, produce pulse at the 100 about 190ns places that arrive in the time interval of 200ns.

Similarly, after second time interval was finished, clock source CLk was enabled in the 3rd time interval of time 200ns place beginning.In the 3rd time interval, DAC 310 produces new bias voltage in response to a new input.In this example, be set at for its scope new bias voltage higher relatively.Therefore, shown in Fig. 4 A, because new bias voltage is set at higher relatively, ramp voltage reaches threshold voltage and has just spent the less time.As a result, pulse is created in the 3rd time interval relatively early.Shown in Fig. 4 B, produce pulse at the 200 about 230ns places that arrive in the 300ns time interval.

Similar once more, the low moderate bias voltage that is produced in response to a new input that is used for the 4th time interval by DAC 310 has for example caused in 300 to 400ns time intervals in the generation pulse of 370ns place.

Device 300 can be configured to provide scheduled time resolution for the generation of pulse.For example, the time slot that device modulates device 300 can be configured to select in 100 available time slot in the time interval of 100ns (by the input indication) locates to produce pulse.For example, the scope of input can be from 0001110{ binary system 28} to 1110010{ binary system 228}, and has step-length 10{ binary system 2}, with corresponding to the time slot 1-100ns in this time interval.In addition, as previously mentioned, can dispose output from pulse generator 380 via the feedback loop of reset circuit 340, to produce the pulse duration of one (1) ns to ramp voltage generator 360.Therefore, each pulse can being produced by the indicated unique and time slot place that do not overlap basically of input in this time interval.

Fig. 5 A shows some schemes according to disclosure file, is used for the flow chart to the illustrative methods of being calibrated by the electric current of exemplary means 300 generations.Correcting current method 500 need be set at bias voltage the minimum in its scope, and this minimum should be corresponding to last time slot of time interval; Subsequently, begin between continuous calibration areas, the adjustment electric current strides across threshold voltage up to ramp voltage in last time slot beginning place of time interval at each is interval simultaneously.

With reference to figure 3 and 5A,, calibrating signal Cal is set at high logic level (piece 502) simultaneously according to correcting current method 500.This has forbidden AND door 350, thereby has avoided the transistor 362 of feedback (FB) signal conduction ramp voltage generator 360.It also enables three input AND doors 344, makes capacitive element C discharge to allow beginning place of clock source Clk between calibration areas.In addition, according to correcting current method 500, DAC 310 is configured to produce a bias voltage (piece 504) in response to the minimum in the scope of bias voltage.In this example, minimum bias voltage can be 200mV.Next, according to calibration steps 500, current-mode DAC 326 is set to produce initial current (piece 506).

Subsequently, according to correcting current method 500, between the beginning calibration areas (piece 508).For example, can use the rising edge of clock signal C lk to begin between calibration areas.In this, rising edge makes reset circuit 340 produce the reset signal with relatively low duty cycle pulse, to remove remaining any electric charge on capacitive element C.This is that three inputs by means of AND door 344 are in logic high immediately and finish after clock signal C lk is transformed into logic high.This has produced the forward position of pulse, and it makes transistor 362 conductings so that make the discharge of capacitive element C.When inverter 342 was reversed to logic low with logic high, AND door 344 just produced logic low, thereby produced the back edge of reset pulse.Delay when therefore, the delay of reset pulse is substantially equal to inverter 342 and produces logic low in response to clock signal is converted to logic high.

Rising edge of clock signal also makes transmission gate 316 after the delay that is produced by delay element 318 bias voltage is sent to capacitive element C, and this delay is substantially equal to the delay of inverter 342.Delay element 318 has been avoided when transistor 362 is switched on, and bias voltage is to the gating of capacitive element C.Basically side by side, capacitive element C begins the initial current that is produced by current-mode DAC 326 is carried out integral operation, progressively to form ramp voltage.During between this calibration areas, PFD322 monitoring feedback signal (FB) is to determine whether produced pulse (piece 510) during this interval.In this, if PFD 322 detects the arrival of the rising edge of clock signal C lk in its REF input, and, during between this calibration areas, just do not produce pulse so less than the rising edge that detects pulse in its FB input.On the other hand, if detect the arrival that detects pulse before the rising edge of clock signal C lk in its FB input in its REF input at PFD 322, during between this calibration areas, just produced pulse so.

If PFD 322 determines to have produced pulse (piece 512), PFD is just by producing logic high signal and producing the electric current (piece 514) that logic low signal successively decreases and produced by current-mode DAC 326 in its INC output place in its DEC output place so.This means that initial current is set to the electric current that is higher than calibration.On the other hand, if PFD 322 determines not produce pulse (piece 512), PFD 322 just increases progressively the electric current (piece 516) that is produced by current-mode DAC 326 by producing logic high signal in its INC output place and producing logic low signal in its EDC output place so.

Lock detector 324 determines subsequently whether first three or more electric current change is back and forth repeatedly (toggle) (piece 518).If previous electric current change to be back and forth to be calibrated in the LSB with regard to meaning the electric current that is produced by current-mode DAC 326 repeatedly.Therefore, changed back and forth repeatedly (piece 520) if lock detector 324 is determined previous electric currents, lock detector 324 is just to current-mode DAC 326 transmission signals, so that current-mode DAC 326 is locked in Set For Current place (piece 522).Preferably, lock detector 324 is locked in current-mode DAC 326 the minimum current placement that causes pulse to produce.On the other hand, if lock detector 324 determine that previous electric current changes and be back and forth just to begin between a new calibration areas repeatedly at each piece 508.In case current-mode DAC 326 is calibrated, just calibrating signal CAL is set at logic low (piece 524).

Fig. 5 B-C shows the curve chart according to the various signals that produced by device 300 of some schemes of disclosure file during calibration process.Fig. 5 B discusses the situation that the initial current that is produced by current-mode DAC 326 is lower than calibration current.And Fig. 5 C discusses the situation that the initial current that is produced by current-mode DAC 326 is higher than calibration current.

Shown in Fig. 5 B, between first calibration areas in, before the next rising edge of clock signal C lk, ramp voltage does not reach threshold voltage.As a result, just do not produce pulse between first calibration areas.This means that the initial current that is produced by current-mode DAC 326 is lower than calibration current.As previously mentioned, in response, PFD 322 increases the electric current that is produced by current-mode DAC 326.In between second calibration areas, before the next rising edge of clock signal C lk, ramp voltage does not still reach threshold voltage, but more approaching than the ramp voltage between first calibration areas.As a result, do not produce pulse between second calibration areas.This means that the electric current that is produced by current-mode DAC 326 still is lower than calibration current.Again, in response, PFD 322 increases the electric current that is produced by current-mode DAC 326.

In between the 3rd calibration areas, before the next rising edge of clock signal C lk, ramp voltage reaches threshold voltage.As a result, as directed, produced pulse between the 3rd calibration areas.This means that the electric current that is produced by current-mode DAC 326 may be calibrated or be higher than calibration current.In response, PFD 322 reduces the electric current by current-mode DAC 326 generations.In between the 4th calibration areas, before the next rising edge of clock signal C lk, ramp voltage does not reach threshold voltage.Lock detector 324 detects first three electric current have been changed back and forth repeatedly, therefore current-mode DAC 326 is locked in the minimum current place that produces pulse.

Similarly, shown in Fig. 5 C, between first calibration areas in, before the next rising edge of clock signal C lk, ramp voltage reaches threshold voltage.As a result, produced pulse between first calibration areas.This means that the initial current that is produced by current-mode DAC 326 is higher than calibration current.In response, PFD 322 reduces the electric current by current-mode DAC 326 generations.In between second calibration areas, before the next rising edge of clock signal C lk, ramp voltage still reaches threshold voltage.As a result, produced pulse between second calibration areas.This means that the electric current that is produced by current-mode DAC 326 still is higher than calibration current.Again, in response, PFD 322 reduces the electric current by current-mode DAC 326 generations.

In between the 3rd calibration areas, before the next rising edge of clock signal C lk, ramp voltage does not reach threshold voltage.As a result, do not produce pulse between the 3rd calibration areas.This means that the electric current that is produced by current-mode DAC 326 may be calibrated or a little less than calibration current.In response, PFD 322 increases the electric current that is produced by current-mode DAC 326.In between the 4th calibration areas, before the next rising edge of clock signal C lk, ramp voltage does not reach threshold voltage.Lock detector 324 detects first three have been changed back and forth repeatedly, therefore current-mode DAC 326 is locked in the minimum current place that produces pulse.

Fig. 6 shows some schemes according to disclosure file, is used for the flow chart to the illustrative methods 600 of being calibrated by the bias voltage of device 300 generations.Bias voltage calibration method 600 is for DAC310 determines input word, and the bias voltage that this input word produces is corresponding to the threshold voltage of pulse generator 380.In this example, this is set at medium range at first by the input word with DAC 310 and finishes.Subsequently,, change the input word of DAC 310 continuously, produce bias voltage constantly near threshold voltage, till it reaches threshold voltage with toilet by a process of approaching continuously.

Shown in the legend of Fig. 6, the highest significant position (MSB) of the input word of DAC 310 is expressed as the N-1 position, wherein N is the figure place in the DAC input word.The least significant bit (LSB) of the input word of DAC 310 is expressed as the 0th (0).The k position of the input word of DAC 310 is a position index, and the bias voltage that its value is confirmed as making the final input word of DAC 310 to produce is substantially equal to the threshold value of pulse generator 380.

With reference to figure 3 and 6, when beginning bias calibration method 600, be logic high (piece 602) with the HOLD signal sets simultaneously, this enables AND door 306, and allows feedback (FB) signal triggering latch 308, as discussed in more detail below.State machine 304 is set at position index k the MSB (N-1) (piece 604) of the input word of DAC310 subsequently.This is because the MSB of DAC input word is first that will determine.Between the alignment epoch of bias voltage, forbidden transmission gate 316 (piece 606).This makes ramp voltage generator 360 produce to have the ramp voltage of the initial value that approaches zero (0) between alignment epoch.This has guaranteed that ramp voltage always is lower than DAC voltage at the place that begins of calibration cycle.

Subsequently, state machine 304 starts DAC 310 with input word, and wherein the position index k of this input word equals logic one (1), and the 0th (0) equals logical zero (0) to the k-1 position, if and a position k+1 can use to N-1, then with position k+1 to N-1 according to before definite (piece 608).With 8 DAC words is example, and state machine 304 is set at logic one (1) with the 7th (MSB) at first, is set at logical zero (0) with the the 0th (0) to the 6th.Owing to current position index k is set at MSB, so a position k+1 is disabled to N-1.Therefore, first DAC input word is 1000000, and it is in the centre of the scope of DAC word.

Subsequently, between the beginning calibration areas (piece 610).In this example, the rising edge by clock signal C lk makes the latch 348 of reset circuit 340 reset and makes transistor 362 end, so that the current charges that capacitive element C can be produced by current generator 320, thereby between the beginning calibration areas.

During between calibration areas, differential amplifier 314 and threshold dector 312 produces the expression ramp voltages whether greater than the output of DAC voltage.When ramp voltage reached the threshold voltage of pulse generator 380, feedback (FB) conversion of signals was a logic high.This makes latch 308 export the comparative result (piece 612) of threshold voltages and DAC voltage to state machine 304.State machine 304 determines that subsequently whether threshold voltage is greater than DAC voltage (piece 614).If state machine 304 is determined threshold voltage greater than DAC voltage, state machine 304 just is appointed as position index k logic one (1) (piece 618).Otherwise state machine 304 just is appointed as position index k logical zero (0) (piece 616).

The state machine 304 position index k that successively decreases subsequently is so that be set next bit (piece 620) into input DAC word.In this example, position index k becomes the 6th of input word of DAC 310.State machine 304 determines that subsequently whether position index k is less than zero (0).If not, just repetitive operation 608 to 620 once more is so that be new position index k determined value.If state machine 304 determines that position index k is less than zero (0), just mean all positions of having determined the DAC word, state machine 304 just is stored in the DAC input word (piece 624) in the memory so, and enable transmission gate 316 subsequently, and be logic low with the HOLD signal sets, so that programmable bias voltage generator 302 is configured to operator scheme (piece 626).

After having calibrated electric current and bias voltage, the correlation of cicada between the generation time of input and pulse just.For example, the known DAC word that produces minimum bias voltage, and be associated with the time slot the earliest of pulse.In addition, the also known DAC word that produces the threshold voltage of pulse generator, and be associated with the time slot the latest of pulse.Can be identified at the time slot and the DAC word of the time slot between the time slot the earliest the latest by interpolation.

Fig. 7 shows the block diagram of exemplary communication device 700 that use according to some schemes of disclosure file is used to produce the device of pulse.Communication equipment 700 comprises receiver 702, antenna 704, transducer 706, pulse generating device 708, channel controller 710, Base Band Unit 712 and transmitter 714.Transmitter 714 is configured to the channel of foundation such as ultra broadband (UWB) channel, is used for information is sent to another communication equipment.Receiver 702 is configured to the channel of foundation such as ultra broadband (UWB) channel, is used for receiving information from another communication equipment.Can set up transmitting channel and receive channel simultaneously.Ultra-wideband channel can be defined as have 20% or the bigger order of magnitude on relative bandwidth, have in the bandwidth on the 500MHz or the bigger order of magnitude or have at relative bandwidth on 20% order of magnitude or the bigger order of magnitude and channel with the bandwidth on the 500MHz or the bigger order of magnitude.Relative bandwidth is that the specific bandwidth that is associated with an equipment is divided by its centre frequency.For example, can have the 1.75GHz bandwidth that centre frequency is 8.125GHz according to the equipment of disclosure file, therefore, its relative bandwidth is 1.75/8.125 or 21.5%.

If communication equipment 700 is configured to wireless device, for example with IEEE 802.11 or 802.15 relevant wireless devices, the interface of wireless medium is just served as in communication 704, is used for to send and reception information between wireless mode and other wireless device.Under the control of channel controller 710, when communication equipment 700 sent, transducer 706 was isolated receiver 702 and transmitter 714 basically.Base Band Unit 712 is handled the baseband signal that receives from receiver 702, and handles the baseband signal that is sent by transmitter 714.

The pulse generating device 708 of communication equipment 700 can be aforesaid herein any exemplary arrangement.Under the control of channel controller 710, device 708 is used at different interval enable transmission machine and receiver by the pulse duration definition, so that carry out the transmission and the reception of signal.In this configuration, can divide multiple access (PDMA) modulation scheme to set up communication channel by using multiple arteries and veins.These PDMA modulation schemes are used to the position of the pulse of the time interval that sends and receive and set up channel according to management.The modulation when example of PDMA modulation scheme comprises pulse repetition frequency (PRF) modulation, pulse position or offset modulation and jumping, as explained below.At the time durations that transmitter is not launched and receiver does not receive, these equipment can move so that power saving, for example electric power that is provided by battery with low-power or no power mode.

Fig. 8 A shows the different channels (channel 1 and 2) with the different pulse repetition definition.Concrete, the pulse that is used for channel 1 has corresponding to pulse pulse repetition frequency (PRF) of 802 during the pulse daley.On the contrary, the pulse that is used for channel 2 has corresponding to pulse pulse repetition frequency (PRF) of 804 during the pulse daley.Thereby this technology can be used to define pseudo-orthogonal channel, and it has relatively low collisions of pulses possibility at two interchannels.Concrete, the low possibility of collisions of pulses can obtain by the pulse of using low duty ratio.For example, by suitable strobe pulse repetition rate (PRF), all pulses basically that are used for given channel can send in the time different with the pulse that is used for any other channel.Can configurating channel controller 710 and pulse generating device 708 to set up pulse repetition frequency (PRF) modulation.

The pulse repetition frequency (PRF) that defines for given channel can depend on one or more data rates of being supported by this channel.For example, support the channel of very low data rate (for example, on several kilobits of per second or the Kbps order of magnitude) can use corresponding low pulse repetition frequency (PRF).On the contrary, support the channel of relative higher data rate (for example, on several megabits of per second or the Mbps order of magnitude) can use corresponding higher pulse repetition frequency (PRF).

Fig. 8 B shows the different channels (channel 1 and 2) with different pulse positions or skew definition.According to first pulse skew (for example, with respect to one preset time point, not shown), produce the pulse that is used for channel 1 at time point place by line 806 expressions.On the contrary, according to second pulse skew, produce the pulse that is used for channel 2 at time point place by line 808 expressions.Given pulse offset deviation between these two pulses (as by arrow 810 expressions), this technology can be used to reduce the possibility in the collisions of pulses of these two interchannels.According to any other signal transmission parameters and the time sequence precision between equipment (for example, the relative time clock drift) for these channel definition, the use of different pulse skews can be used to provide quadrature or pseudo-orthogonal channel.Channel controller 710 and pulse generating device 708 can be configured to set up position or offset modulation.

Fig. 8 C shows the different channels (channel 1 and 2) with different time-hopping sequences (timing hopping sequence) definition.For example, can produce the pulse 812 that is used for channel 1 at time place, and produce the pulse 814 that is used for channel 2 at time place according to another time-hopping sequence according to a time-hopping sequence.According to employed concrete sequence and the time sequence precision between equipment, this technology can be used to provide quadrature or pseudo-orthogonal channel.For example, the pulse position during jumping can not be periodic, so that reduce the possibility from the repetition pulse conflict of adjacent channel.Channel controller 710 and pulse generating device 708 can be configured to modulate when foundation is jumped.

It will be appreciated that other technology also can be used for defining channel according to the PDMA scheme.For example, can define channel according to different expansion pseudo-random number sequence or some other parameters that is fit to.In addition, can define channel according to the combination of two or more parameters.

Fig. 9 shows the block diagram according to various ultra broadbands (UWB) communication equipment that communicates each other via many channels of some schemes of disclosure file.For example, UWB equipment 1 902 communicates via two parallel UWB channels 1 and 2 with UWB equipment 2 904.UWB equipment 902 communicates via single channel 3 and UWB equipment 3 906.And UWB equipment 3 906 communicates via single channel 4 and UWB equipment 4 908 again.Other configuration also is feasible.

These devices arbitrarily described herein can be taked different forms.For example, in some versions, can realize in following equipment that these devices or these devices can comprise following equipment: phone (for example, cell phone), personal digital assistant (" PDA "), earphone (for example, headphone, PlayGear Stealth etc.), microphone, medical supply, biometric sensor, heart rate monitor, pedometer, EKG equipment, user I/O equipment, wrist-watch, remote controller, switch, light switch, keyboard, mouse, the tire pressure monitor, amusement equipment, computer, point of sale device, hearing aids, set-top box, the equipment that perhaps has the transmission of wireless signals ability of some form.In addition, these devices can have different power and data demand.In some versions, any device described herein can be suitable for (for example using in low power applications, by using side signal transmission case and low duty ratio pattern) based on pulse, and can support various data rates, comprise relative higher data speed (for example, by using the high bandwidth pulse).In some versions, any device described herein can be implemented in such as in the access point of WiFi node or comprise access point.For example, this device can provide the connectedness via wired or wireless communication link and another network (for example, the wide area network such as the Internet).

Any device in these devices can comprise a plurality of assemblies, and it carries out function according to the signal that sends or receive via wireless communication link.For example, earphone can comprise transducer, and it is suitable for providing the output that can hear according to the signal that receives via wireless communication link, and described wireless communication link is to be set up by the receiver of any pulse generating device as herein described being made response.This earphone can also comprise the transmitter of any pulse generating device as herein described being made response, is used to send the wireless signal that comprises the audio frequency output that is produced by transducer.Wrist-watch can comprise display, and it is suitable for according to providing visual output by the receiver in response to any pulse generating device as herein described via the signal that wireless communication link receives.Medical supply can comprise transducer, and it is suitable for producing the sensing signal that will be sent via wireless communication link by the transmitter in response to any pulse generating device as herein described.

Various illustrative logical blocks, module and the circuit of describing in conjunction with each scheme disclosed herein can integrated circuit (" IC "), access terminal or access point in realization, perhaps can carry out by them.IC can comprise general processor, digital signal processor (DSP), application-specific integrated circuit (ASIC) (ASIC), field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor-transistor logic circuit, discrete hardware components, electronic building brick, optical module, mechanical component or be designed to carry out their any combination of function described herein, and can carry out and be positioned at outer or the two code or the instruction of IC, IC.General processor can be a microcontroller, but replacedly, this processor can be any conventional processors, controller, microcontroller or state machine.Processor can also be embodied as the combination of calculating device, and for example, the combination of DSP and microprocessor, a plurality of microprocessor, one or more microprocessor be in conjunction with the DSP kernel, perhaps any other this structure.

The various schemes of disclosure file have below been described.Obviously, the instruction of this paper can be presented as various forms, and any concrete structure disclosed herein, function or the two all only are representational.According to the instruction of this paper, one of ordinary skill in the art would recognize that a scheme disclosed herein can be independent of any other scheme and realize, and can make up in these schemes two or more in every way.For example, can come implement device or implementation method with any amount of scheme that this paper sets forth.In addition, replenishing of one or more schemes of setting forth as this paper perhaps substitutes one or more schemes that this paper sets forth, and can use other structure, function or structure and function to realize this device or implements this method.As the example of above notions, in some versions, can set up parallel channel according to pulse repetition frequency.In some versions, can set up parallel channel according to pulse position or skew.In some versions, can set up parallel channel according to time-hopping sequence.In some versions, can set up parallel channel according to pulse repetition frequency, pulse position or skew and time-hopping sequence.

Skilled person in the art will appreciate that and to represent information and signal with in multiple different process and the technology any one.For example, data, instruction, order, information, signal, bit, symbol and the chip mentioned in the whole text in more than describing can be by voltage, electric current, electromagnetic wave, magnetic field or magnetic particle, light field or optical particles, and perhaps its combination in any is represented.

One skilled in the art will further recognize that, various illustrative logical blocks, module, processor, device, circuit and the algorithm steps described in conjunction with each scheme disclosed herein (for example can be implemented as electronic hardware, Digital Implementation mode, simulation implementation or the combination of the two, it can use other technology of source code or some to design), comprise the various programs of instruction or design code (for convenience, can be referred to as " software " or " software module " herein), or the combination of the two.For this interchangeability of hardware and software is shown clearly, more than various example components, piece, module, circuit and step normally be described according to their function.This function is embodied as hardware or is embodied as software and depends on concrete application and be applied to design constraint on the overall system.The technical staff can realize described function at each concrete mode of using to change, but this realization decision-making should not be construed as and causes deviating from scope of the present invention.

Will appreciate that any concrete order of the step in any disclosed processing or level all are the examples of exemplary arrangement.According to design preference, will appreciate that concrete order or the level that in the scope of disclosure file, to rearrange the step in processing.Appended claim to a method has presented the key element of each step with exemplary series, is not intended to be limited to the concrete order or the level that are presented.

In the software module that the method for describing in conjunction with each scheme disclosed herein and the step of algorithm can directly be included in the hardware, carried out by processor, perhaps in the combination of the two.Software module (for example, comprise executable instruction and related data) and other data can be arranged in data storage, for example RAM memory, flash memories, ROM memory, eprom memory, eeprom memory, register, hard disk, removable dish, CD-ROM are perhaps in the computer-readable recording medium of any other form known in the art.A kind of exemplary storage medium can be coupled to machine, for example computer/processor (for convenience, can be referred to as " processor " herein) makes that processor can be from read information (for example, code), and to this storage medium writing information.Exemplary storage medium can be integrated in the processor.Processor and storage medium can be arranged in ASIC.ASIC can be arranged in user's set.Interchangeable, processor and storage medium can be used as discrete assembly and are arranged in user's set.In addition, in some versions, any suitable computer program can comprise computer-readable medium, and it comprises the code relevant with the scheme of one or more disclosure files.In some versions, computer program can comprise encapsulating material.

Although described the present invention, will appreciate that these schemes can further be revised in conjunction with various schemes.The application is intended to comprise any variation, use or the modification of the various schemes of disclosure file, its generally according to the principle of disclosure file and be included under the disclosure file in the technical field in the known practices with the departing from of disclosure file.

Claims (46)

1, a kind of device that is used for producing according to input at least one pulse comprises:

First generator is used to produce the bias voltage as the function of described input;

Second generator is used to produce electric current;

The 3rd generator is used to produce ramp voltage, and described ramp voltage has as the initial value of the function of described bias voltage with as the slope of the function of described electric current; And

The 4th generator is used for reaching threshold voltage basically and producing described at least one pulse in response to described ramp voltage.

2, device as claimed in claim 1, wherein, the slope of described ramp voltage is positive, negative, linear or nonlinear.

3, device as claimed in claim 1, wherein, described first generator comprises digital to analog converter (DAC), and further, wherein, described input comprises numeric word.

4, device as claimed in claim 1 also comprises: calibration circuit is used for described bias voltage is calibrated, so that described input is associated with the generation of described at least one pulse.

5, device as claimed in claim 1, wherein, described second generator comprises current-mode digital to analog converter (DAC).

6, device as claimed in claim 1 also comprises: calibration circuit is used for described electric current is calibrated, so that described input is associated with the generation of described at least one pulse.

7, device as claimed in claim 1, wherein, described the 3rd generator comprises: integral equipment is used for described electric current is carried out integral operation, to produce described ramp voltage.

8, device as claimed in claim 7, wherein, described integral equipment comprises capacitive element.

9, device as claimed in claim 1, wherein, described the 4th generator comprises a plurality of inverters of coupled in series.

10, device as claimed in claim 1 also comprises: reset circuit, be used to produce reset signal, and described reset signal begins the generation on the back edge of described at least one pulse.

11, device as claimed in claim 1 also comprises: the clock source, be used for the definition time interval, and in described time interval, produce described at least one pulse.

12, device as claimed in claim 11, wherein, described clock source is used to begin the generation of described at least one pulse.

13, device as claimed in claim 1 also comprises: transceiver, wherein, in response to described at least one pulse that is produced by described the 4th generator, described transceiver is used to use arteries and veins to divide multiple access and another device to set up at least one ultra-wideband communications channel.

14, device as claimed in claim 13, wherein, each bar ultra-wideband channel all have 20% or the bigger order of magnitude on relative bandwidth, have the bandwidth on the 500MHz or the bigger order of magnitude or have 20% or the bigger order of magnitude on relative bandwidth and have bandwidth on the 500MHz or the bigger order of magnitude.

15, a kind of method that is used for producing according to input at least one pulse may further comprise the steps:

Generation is as the bias voltage of the function of described input;

Produce electric current;

Produce ramp voltage, described ramp voltage has as the initial value of the function of described bias voltage with as the slope of the function of described electric current; And

Basically reach threshold voltage and produce described at least one pulse in response to described ramp voltage.

16, method as claimed in claim 15, wherein, the slope of described ramp voltage is positive, negative, linear or nonlinear.

17, method as claimed in claim 15, wherein, the described initial value of described ramp voltage is substantially equal to described bias voltage.

18, method as claimed in claim 15, wherein, the step that produces bias voltage comprises numeric word is converted to described bias voltage, and further, wherein, described numeric word is the function of described input or identical with described input.

19, method as claimed in claim 15 also comprises: described bias voltage is calibrated, so that described input is associated with the generation of described at least one pulse.

20, method as claimed in claim 15, wherein, the step that produces electric current comprises digital information is converted to described electric current.

21, method as claimed in claim 15 also comprises: described electric current is calibrated, so that described input is associated with the generation of described at least one pulse.

22, method as claimed in claim 15, wherein, the step that produces ramp voltage comprises carries out integral operation to described electric current.

23, method as claimed in claim 22, wherein, the step of described electric current being carried out integral operation comprises that the use capacitive element comes described electric current is carried out integration.

24, method as claimed in claim 15, wherein, the step that produces described at least one pulse comprises that at least one pair of inverter that uses coupled in series produces described at least one pulse.

25, method as claimed in claim 15 also comprises: produce clock, described clock definition time interval produces described at least one pulse in described time interval.

26, method as claimed in claim 15 also comprises: produce clock to begin the generation of described at least one pulse.

27, method as claimed in claim 15 also comprises: with described at least one pulse control transceiver, so that use arteries and veins to divide multiple access to set up at least one ultra-wideband communications channel.

28, method as claimed in claim 27, wherein, each bar ultra-wideband channel all have 20% or the bigger order of magnitude on relative bandwidth, have the bandwidth on the 500MHz or the bigger order of magnitude or have 20% or the bigger order of magnitude on relative bandwidth and have bandwidth on the 500MHz or the bigger order of magnitude.

29, a kind of device that is used for producing according to input at least one pulse comprises:

Be used to produce module as the bias voltage of the function of described input;

Be used to produce the module of electric current;

Be used to produce the module of ramp voltage, described ramp voltage has as the initial value of the function of described bias voltage with as the slope of the function of described electric current; And

Be used for reaching threshold voltage basically and producing the module of described at least one pulse in response to described ramp voltage.

30, device as claimed in claim 29, wherein, the slope of described ramp voltage is positive, negative, linear or nonlinear.

31, device as claimed in claim 29, wherein, the described module that is used to produce bias voltage comprises digital to analog converter, and further, wherein, described input comprises numeric word.

32, device as claimed in claim 29 also comprises being used for described bias voltage is calibrated, so that make the generation associated modules of described input and described at least one pulse.

33, device as claimed in claim 32 wherein, is used for the described module that described bias voltage is calibrated is comprised:

Comparator is used to produce and is illustrated in described bias voltage when producing described at least one pulse whether greater than the output of described ramp voltage; And

Be used for output according to described comparator and determine the equipment of new bias voltage, wherein, described new bias voltage when described at least one pulse of generation than the more approaching described ramp voltage of current bias voltage.

34, device as claimed in claim 29, wherein, the described module that is used to produce electric current comprises current-mode digital to analog converter (DAC).

35, device as claimed in claim 29 also comprises being used for described electric current is calibrated, so that make the generation associated modules of described input and described at least one pulse.

36, device as claimed in claim 35 wherein, is used for the described module that described electric current is calibrated is comprised phase place and frequency detector.

37, device as claimed in claim 29, wherein, the described module that is used to produce ramp voltage comprises capacitive element.

38, device as claimed in claim 29, wherein, the described module that is used to produce described at least one pulse comprises a plurality of inverters of coupled in series.

39, device as claimed in claim 29 also comprises the module that is used to produce clock, and described clock is used for the definition time interval, produces described at least one pulse in described time interval.

40, device as claimed in claim 29 also comprises being used to produce the module of clock with the generation that begins described at least one pulse.

41, device as claimed in claim 29 also comprises being used to use described at least one pulse to set up the module of at least one ultra-wideband communications channel.

42, device as claimed in claim 41, wherein, each bar ultra-wideband channel all have 20% or the bigger order of magnitude on relative bandwidth, have the bandwidth on the 500MHz or the bigger order of magnitude or have 20% or the bigger order of magnitude on relative bandwidth and have bandwidth on the 500MHz or the bigger order of magnitude.

43, a kind of computer program is used for producing at least one pulse according to input, comprising:

Computer-readable medium, it comprises code, described code can by at least one computer carry out so that:

Generation is as the bias voltage of the function of described input;

Produce electric current;

Produce ramp voltage, described ramp voltage has as the initial value of the function of described bias voltage with as the slope of the function of described electric current; And

Basically reach threshold voltage and produce described at least one pulse in response to described ramp voltage.

44, a kind of earphone that is used for radio communication comprises:

First generator is used to produce the bias voltage as the function of input;

Second generator is used to produce electric current;

The 3rd generator is used to produce ramp voltage, and described ramp voltage has as the initial value of the function of described bias voltage with as the slope of the function of described electric current;

The 4th generator is used for reaching threshold voltage basically and producing at least one pulse in response to described ramp voltage;

Transducer is used to produce sensed data; And

Transmitter is used for sending described sensed data in response to described at least one pulse that is produced by described the 4th generator.

45, a kind of wrist-watch that is used for radio communication comprises:

First generator is used to produce the bias voltage as the function of input;

Second generator is used to produce electric current;

The 3rd generator is used to produce ramp voltage, and described ramp voltage has as the initial value of the function of described bias voltage with as the slope of the function of described electric current;

The 4th generator is used for reaching threshold voltage basically and producing at least one pulse in response to described ramp voltage;

Receiver is used for coming received signal in response to described at least one pulse that is produced by described the 4th generator; And

Display is used for providing visual output according to described signal.

46, a kind of medical supply that is used for radio communication comprises:

First generator is used to produce the bias voltage as the function of input;

Second generator is used to produce electric current;

The 3rd generator is used to produce ramp voltage, and described ramp voltage has as the initial value of the function of described bias voltage with as the slope of the function of described electric current; And

The 4th generator is used for reaching threshold voltage basically and producing at least one pulse in response to described ramp voltage;

Transducer is used to produce sensed data; And

Transmitter is used for sending described sensed data in response to described at least one pulse by described the 4th generator generation.

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