CN103050548B - Schottky diode and manufacture method thereof - Google Patents
Schottky diode and manufacture method thereof Download PDFInfo
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- CN103050548B CN103050548B CN201210581204.XA CN201210581204A CN103050548B CN 103050548 B CN103050548 B CN 103050548B CN 201210581204 A CN201210581204 A CN 201210581204A CN 103050548 B CN103050548 B CN 103050548B
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Abstract
The present invention relates to a kind of Schottky diode and manufacture method thereof.This Schottky diode, including cathode metal layer, the N-type silicon on cathode metal layer, this N-type silicon has the insulating barrier of opening, is arranged in the anode metal layer on described opening and described insulating barrier.This Schottky diode farther includes to be positioned in this N-type silicon the metal silicide layer below described anode metal layer, and is positioned at the high concentration P type doping internal ring around described metal silicide layer in this N-type silicon and is positioned at the high concentration P type doping outer shroud outside described high concentration P type internal ring；Described anode metal layer is made up of titanium-aluminium alloy genus.The Schottky diode made according to the present invention and obtain, not only its performance parameter is improved, and the yield rate that it is manufactured when not increasing processing step obtains and significantly improves.
Description
Technical field
The present invention relates to schottky device.More particularly it relates to an Schottky diode and manufacture method thereof.
Background technology
In current Schottky diode chip production process, it is common to adopt titanium nickeline three-layer metal to form schottkybarrier structure with N-epitaxial layer.This structure presently, there are two drawbacks, one, requires very high to the craft precision of titanium nickeline wet etching, and the stability of this critical process often governs the quality of the characteristic parameter of Schottky diode.Wet corrosion technique is careless slightly, very easily causes breakdown reverse voltage and big leakage current that Schottky diode is low, thus have impact on the performance of Schottky diode and the yield rate of chip.Secondly, with the chip of titanium nickeline explained hereafter, it is subject to the impact of ambient humidity and surface oxidation.In the postorder course of processing of chip, for instance the pressure welding operation in chip package, owing to the silver of chip surface is oxidized, cause pressure welding silk not weld or not prison welding and produce waste product, this has been increased by production cost undoubtedly.
Accordingly, it would be desirable to a kind of Schottky diode and manufacture method thereof being readily able to manufacture and have high yield rate.
Summary of the invention
It is an object of the invention to, it is provided that a kind of Schottky diode is to solve above-mentioned technical problem.
A kind of Schottky diode is provided according to an aspect of the present invention, this Schottky diode includes cathode metal layer, N-type silicon on cathode metal layer, this N-type silicon has the insulating barrier of opening, it is arranged in the anode metal layer on described opening and described insulating barrier, and this Schottky diode farther includes
This N-type silicon is positioned at the metal silicide layer below described anode metal layer, and
This N-type silicon is positioned at the doping internal ring of the high concentration P type around described metal silicide layer and is positioned at the high concentration P type doping outer shroud outside described high concentration P type internal ring.
Preferably, the concentration of described high concentration P type doping internal ring and high concentration P type doping outer shroud is equal or different.
Preferably, described high concentration P type doping outer shroud is formed in this Schottky diode edge.
Preferably, described metal silicide layer is nickel silicide layer.
Preferably, described anode metal layer includes the first metal layer and the second metal level.
Preferably, described the first metal layer is titanium coating, and described second metal level is aluminum metal layer.
Preferably, described N-type silicon farther includes high concentration N-type silicon substrate and low concentration N-type epitaxy layer thereon.
According to a further aspect in the invention, it is provided that a kind of method manufacturing Schottky diode, the method comprises the following steps:
N-type silicon is formed insulating barrier；
Described insulating barrier is carried out the first etching, to form internal ring opening and the outer ring opening for forming P type doped region in described insulating barrier；
With described insulating barrier for mask, in described N-type silicon, form high concentration P type doping internal ring by ion implanting and diffusion technique and be positioned at the high concentration P type doping outer shroud outside described high concentration P type internal ring；And
Described insulating barrier is carried out the second etching, to form the anode openings for forming anode electrode in described insulating barrier；
Described in N-type silicon, the position of anode openings forms metal silicide layer；
Described anode openings and described insulating barrier are formed anode metal layer；And
The opposite side of described N-type silicon is formed cathode metal layer.
Preferably, the described step forming metal silicide layer in the position of N-type silicon Anodic opening farther includes:
Described anode openings and described insulating barrier deposit nickel；
The nickel of sputtering is diffused；
Remove unnecessary nickel to expose described anode openings.
Preferably, the step forming insulating barrier on this N-type silicon includes on described N-type silicon by the step of thermal oxide growth silicon dioxide insulating layer.
Preferably, the step forming anode metal layer in described anode openings and described insulating barrier includes the step of deposit titanium coating and aluminum metal layer successively.
Preferably, described N-type silicon farther includes high concentration N-type silicon substrate and low concentration N-type epitaxy layer thereon.
Schottky diode and manufacture method thereof according to the present invention have the following advantages.
One, in structural design, the Schottky diode according to the present invention, low concentration N-type (N-) doped epitaxial layer defines the loop design structure of two high concentration P type (P+) rings.
The internal ring of two P+ rings can be referred to as potential dividing ring, it is possible to be called protection ring, and outer shroud is referred to alternatively as end ring, and wherein the subregion of potential dividing ring contacts with metal silicide layer and anode metal layer.Arrange the purpose of double; two P+ ring be schottky metal layer behind contact P+ ring region territory when the additional reversed bias voltage of device, the depletion region of Schottky barrier first passes through the depletion layer one extension of internal ring P+ potential dividing ring and further expands extension then through the depletion layer of outer shroud P+ end ring, Schottky diode breakdown reverse voltage can be improved, utilize the pinch off effect that the P+ end ring depletion layer of outer shroud extends can suppress reverse leakage current further simultaneously.
By end ring being arranged on the outside of this diode; it is arranged in diode chip for backlight unit scribe region by this end ring; when not increasing chip area; further expand the protective effect of P+ internal ring; effectively reduce the ion being likely in device fabrication introduce and stain the impact on diode parameters, be effectively improved yield rate.
Its two, according to the present invention, the processing step that two the P+ rings being arranged in N-epitaxial layer can be identical is formed.Compared with the Schottky diode forming monocycle P+ ring, when not increasing processing step, the Schottky diode with two P+ ring structures significantly improves the yield rate of product, reduces the cost of device.
Its three, in manufacturing process, the present invention adopts nickel metal and N-epitaxial layer to form Schottky barrier, and titanium-aluminium alloy belongs to the anode formed.
NiTi aluminum metal is common materials in semiconductor chip fabrication process, and its characteristic compares with titanium nickeline, relatively stable, cost is low.In the course of processing of later process, adaptability is more extensive.And this new technology is in implementation process, no matter the deposit of NiTi aluminum or caustic solution, be all easier to practical operation, and reproducible.
Accompanying drawing explanation
Fig. 1 is the generalized section of the Schottky diode according to the present invention；
Fig. 2 is the horizontal section schematic diagram along the line of Schottky diode L shown in Fig. 1；
Fig. 3 A-3K schematically shows the making step of the Schottky diode according to the present invention.
Detailed description of the invention
Describe the present invention below with reference to accompanying drawings and in conjunction with specific embodiments.In each figure, identical accompanying drawing labelling represents same or analogous part.It will be appreciated by those skilled in the art that for purposes of illustration only, the size not drawn on scale in each region.
Fig. 1 and Fig. 2 schematically shows the structural representation of the Schottky diode 100 according to the present invention.
Schottky diode 100 according to the present invention includes the cathode end formed by metal level 1.Preferably, this cathode metal layer can by titanium bazar metal, for instance the titanium layer, nickel dam and the silver layer that deposit successively are formed, or are made up of gold.Being positioned on cathode metal layer 1 is N-type silicon.This N-type silicon includes high concentration n-type doping (N+) silicon substrate 2 and low concentration n-type doping thereon (N-) epitaxial layer 3.Preferably, this N+ silicon substrate can be monocrystalline substrate, and being positioned on this N+ silicon substrate 2 is the n-type doping silicon layer relatively low by epitaxially grown one layer of concentration, i.e. N-epitaxial layer 3.Those skilled in the art can design resistivity and the thickness of this N-epitaxial layer according to the parameter request of schottky device.The top of this N-epitaxial layer 3 is formed with schottky device barrier district and potential barrier extended area, and this is also the formation district of parameter of device.This barrier region and potential barrier expansion area include nickel silicide region, surround high concentration P type doping (P+) internal ring 7 of nickel silicide region and are positioned at the P+ outer shroud 5 outside P+ internal ring.This P+ outer shroud 5 is the end ring in P+ dicyclo, it is preferable that is positioned at outside chip, is in the scribe region of chip.Preferably, this P+ outer shroud 5 is formed with identical processing step with P+ internal ring 7, and has identical doping content.
In N-epitaxial layer, P+ endocyclic area is the potential dividing ring in dicyclo.Fig. 1 is shown as symmetrical two U-shape structure 7, in fig. 2 as shown in internal ring 7.The effect in P+ potential dividing ring region is the breakdown reverse voltage improving device.P+ outer shroud 5 is shown as symmetrical two half U type structures in FIG, in fig. 2 as shown in outer shroud 5.When schottky device is when adding backward voltage, P+ outer shroud 5 extends internal ring P+ barrier region further, improves breakdown reverse voltage, inhibits device from cathode system to the reverse leakage current of anode simultaneously.On the other hand, P+ outer shroud 5 has further expanded the protective effect of P+ internal ring, effectively reduces the ion being likely in device fabrication introduce and stains the impact on diode parameters, is effectively improved yield rate.
Schottky diode 100 farther includes to form the silicon oxide layer 6 on N-epitaxial layer.This silicon oxide layer has the anode openings for forming anode metal layer, exposes to this opening portion the region in the part of above-mentioned P+ internal ring barrier region and P+ internal ring barrier region.N-epitaxial layer below this anode openings is formed silicide such as nickel silicide layer.On the opening being arranged on N-epitaxial layer and partial insulative layer, it is preferable that include anode buffer district 8 and anode exit 9 successively as anode metal layer.Such as relief area 8 is formed stability and the reliability for improving schottky device parameter by Titanium, and anode exit 9 is made up of metallic aluminium.Anode metal layer border on the insulating layer is between P+ inner and outer ring.
The manufacture method of the Schottky diode according to the present invention is described below with reference to Fig. 3 A-3K.
Grow certain thickness N-epitaxial layer 3 at N+ silicon substrate 2, see Fig. 3 A.By 0.5 μm～1 μm silicon dioxide of thermal oxide growth on N-epitaxial layer 3, see Fig. 3 B.Utilize the first etching technics, including photo etched mask and etching process, the silicon dioxide insulating layer that thermal oxide obtains etches the internal ring opening for forming P+ ring and outer ring opening, sees Fig. 3 C.Internal ring and outer shroud are preferably arranged concentrically.With described insulating barrier for mask, by ion implantation technology, chip carried out boron ion (B11+) doping injection, implantation dosage is such as 1 × 1014Ions/cm2～1 × 1015Ions/cm2, see Fig. 3 D.Chip is annealed processing at temperature 1000～1150 DEG C subsequently, makes boron ion (B11 on chip+) spreading the degree of depth of 2 microns, this annealing forms thermal oxide silicon dioxide insulating layer 6 further simultaneously on chip, sees Fig. 3 E.This ion implanting position corresponding with described internal ring opening and outer ring opening in N-epitaxial layer with annealing steps forms P+ internal ring 7 respectively and is positioned at the P+ outer shroud 5 outside P+ internal ring.P+ internal ring 7 and P+ outer shroud 5 can have identical or different doping content, it is preferable that the two has identical doping content..
Utilize the second etching technics including photo etched mask and corrosion, insulating barrier 6 etches the doped region for forming schottky device barrier and anode electrode opening, expose a part for P+ internal ring and interior N-epitaxial layer region thereof, see the region 10 in Fig. 3 F.
Splash-proofing sputtering metal nickel on whole chip, thickness is such as 0.04 μm～0.1 μm, sees Fig. 3 G.
It is annealed the chip being formed with metal nickel dam processing.Preferably, annealing temperature is 380～600 DEG C, and the time is 0.5-2 hour, forms nickel silicide layer as metal barrier in the region in the middle of chip surface P+ internal ring 7.Subsequently, utilize etching technics to remove the metallic nickel on chip and insulating barrier 6 surface, expose the chip surface in opening portion, see Fig. 3 H.
The said chip structure obtained sputters Titanium Ti that thickness is 0.20 μm～0.50 μm successively and thickness is more than 2 μm metallic aluminium Al, see Fig. 3 I.
Utilize the 3rd photo etched mask, etching process, the titanium aluminium lamination beyond etching anode region, namely form the anode metal layer of schottky device.Preferably, Fig. 3 J, between P+ internal ring and P+ outer shroud, is seen in the border of this anode metal layer.
Finally, the silicon substrate back side is processed, form cathode metal layer 1.First by silicon substrate thinning back side, it is preferable that be thinned to 150 μm～300 μm.After cleaning, by evaporated gold Au or sputtered titanium nickeline three-layer metal TiNiAg, form cathode metal layer at the silicon substrate back side, namely form chip lead negative electrode, see Fig. 3 K.
Thus can obtain the Schottky diode as shown in Figure 1 according to the present invention.
Example
Adopt method fabricated as described above, make the Schottky diode that a kind of breakdown reverse voltage is 30V.In this Schottky diode, P+ inner ring width d1 is about 18 μm, and P+ outer ring width d2 is about 40 μm.Boron ion implantation dosage is about 1 × 1014Centimetre-2, the degree of depth of P+ internal ring and outer shroud respectively may be about 2 μm, and its design object parameter is, breakdown reverse voltage VR>=30V, VRI during=20VR≤45μA。
The Schottky diode obtained is carried out parameter testing, and test result is, VRAbout=42V, VRI during=20VR≤3μA。
Can be seen that from this chip parameter test result, with be provided without twin nuclei Schottky diode breakdown reverse voltage less than compared with 35V, Schottky diode breakdown reverse voltage according to present configuration is increased to greater than the high-breakdown-voltage of 42V, leakage current is reduced to microampere order from original milliampere level, and the concordance of parameter obtains good control.Additionally, chip yield and output capacity bring up to more than 98% from be provided without twin nuclei about 90%.
As can be seen here, adopt its manufacture method of Schottky diode having according to present configuration, not only improve the parameter of device, prior it is a simplified two key manufacturing technologies, namely the anode of device evaporates and etching process, improves the stability of etching process, has saved production cost.
The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for a person skilled in the art, the present invention can have various modifications and variations.All within the spirit and principles in the present invention, any amendment of making, equivalent replacement, improvement etc., should be included within protection scope of the present invention.
Claims (11)
1. a Schottky diode, including
Cathode metal layer；
N-type silicon on cathode metal layer；
This N-type silicon has the insulating barrier of opening；
It is arranged in the anode metal layer on described opening and described insulating barrier；
It is characterized in that, this Schottky diode farther includes,
This N-type silicon is positioned at the metal silicide layer below described anode metal layer, and
Being positioned at the doping internal ring of the high concentration P type around described metal silicide layer in this N-type silicon and be positioned at the high concentration P type doping outer shroud outside described high concentration P type internal ring, ground, described opening portion exposes a part for described P type doping internal ring and interior metal silicide layer thereof.
2. Schottky diode according to claim 1, it is characterised in that the doping content of described high concentration P type doping internal ring and high concentration P type doping outer shroud is equal or different.
3. Schottky diode according to claim 1, it is characterised in that described high concentration P type doping outer shroud is formed in this Schottky diode edge.
4. Schottky diode according to claim 1, it is characterised in that described metal silicide layer is nickel silicide layer.
5. Schottky diode according to claim 1, it is characterised in that described anode metal layer includes the first metal layer and the second metal level.
6. Schottky diode according to claim 5, it is characterised in that described the first metal layer is titanium coating, described second metal level is aluminum metal layer.
7. Schottky diode according to claim 1, it is characterised in that described N-type silicon farther includes high concentration N-type silicon substrate and low concentration N-type epitaxy layer thereon.
8. the method manufacturing Schottky diode, it is characterised in that the method comprises the following steps:
N-type silicon is formed insulating barrier；
Described insulating barrier is carried out the first etching, to form internal ring opening and the outer ring opening for forming P type doped region in described insulating barrier；
With described insulating barrier for mask, by ion implanting and be diffused in described N-type silicon formed high concentration P type doping internal ring and be positioned at outside described high concentration P type internal ring high concentration P type doping outer shroud；And
Described insulating barrier is carried out the second etching, to be formed for forming the anode openings of anode electrode in described insulating barrier, a part for the partially exposed described P type doping internal ring of this anode openings and interior metal silicide layer thereof；
With described insulating barrier for mask, described in N-type silicon, the position of anode openings forms metal silicide layer；
Described anode openings and described insulating barrier are formed anode metal layer；And
The opposite side of described N-type silicon is formed cathode metal layer.
9. the method making Schottky diode as claimed in claim 8, it is characterised in that the described step forming metal silicide layer in the position of N-type silicon Anodic opening farther includes:
Described anode openings and described insulating barrier sputter nickel；
The nickel of sputtering is diffused；
Remove unnecessary nickel to expose described anode openings.
10. the method making Schottky diode as claimed in claim 8, it is characterised in that the step forming insulating barrier on this N-type silicon includes on described N-type silicon by the step of thermal oxide growth silicon dioxide insulating layer.
11. the method making Schottky diode as claimed in claim 8, it is characterised in that the step forming anode metal layer in described anode openings and described insulating barrier includes the step of deposit titanium coating and aluminum metal layer successively.
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| CN103383917B (en) * | 2013-06-26 | 2017-04-05 | 北京燕东微电子有限公司 | A kind of low-voltage diode and its manufacture method |
| CN113299631B (en) * | 2021-05-21 | 2022-07-08 | 深圳市联冀电子有限公司 | SBD diode with high ESD and preparation method thereof |
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| CN201126822Y (en) * | 2007-10-24 | 2008-10-01 | 天津市立正科技发展有限公司 | Schottky diode |
| CN101621080A (en) * | 2008-10-14 | 2010-01-06 | 常州星海电子有限公司 | High anti-static Schottky diode |
| CN201741701U (en) * | 2010-05-11 | 2011-02-09 | 扬州扬杰电子科技有限公司 | Chip type Schottky diode |
| CN202996845U (en) * | 2012-12-27 | 2013-06-12 | 北京燕东微电子有限公司 | Schottky diode |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP3287269B2 (en) * | 1997-06-02 | 2002-06-04 | 富士電機株式会社 | Diode and manufacturing method thereof |
| US6825073B1 (en) * | 2003-09-17 | 2004-11-30 | Chip Integration Tech Co., Ltd. | Schottky diode with high field breakdown and low reverse leakage current |
| JP4356767B2 (en) * | 2007-05-10 | 2009-11-04 | 株式会社デンソー | Silicon carbide semiconductor device having junction barrier Schottky diode |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201126822Y (en) * | 2007-10-24 | 2008-10-01 | 天津市立正科技发展有限公司 | Schottky diode |
| CN101621080A (en) * | 2008-10-14 | 2010-01-06 | 常州星海电子有限公司 | High anti-static Schottky diode |
| CN201741701U (en) * | 2010-05-11 | 2011-02-09 | 扬州扬杰电子科技有限公司 | Chip type Schottky diode |
| CN202996845U (en) * | 2012-12-27 | 2013-06-12 | 北京燕东微电子有限公司 | Schottky diode |
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