CN103050531A - RF LDMOS (ratio frequency laterally diffused metal oxide semiconductor) device and manufacture method of RF LDMOS device - Google Patents
RF LDMOS (ratio frequency laterally diffused metal oxide semiconductor) device and manufacture method of RF LDMOS device Download PDFInfo
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Abstract
The invention discloses an RF LDMOS (ratio frequency laterally diffused metal oxide semiconductor) device, which is structurally characterized in that a Faraday shield is a single-layer metal layer, the single-layer metal layer comprises a polycrystalline silicon part, a drifting part and a vertical part, the vertical part is arranged at the right side of a polycrystalline silicon grid, the upper end of the vertical part is communicated with the right end of the polycrystalline silicon part, the lower end of the vertical part is communicated with the left end of the drifting part, the left end of the polycrystalline silicon part is positioned above the polycrystalline silicon grid, the drifting part is positioned above an N type drain end light doping drifting region, a medium layer positioned right under the polycrystalline silicon part is silicon oxide, a medium layer positioned right under the drifting part comprises silicon oxide and silicon nitride, the width of the silicon nitride region is smaller than the width of the drifting part, the upper part of the silicon nitride region is connected with the drifting part of the single-layer metal layer, and silicon oxide is arranged at the lower part and the two sides. The invention also discloses a manufacture method of the RF LDMOS device. The RF LDMOS device has higher breakdown voltage, and in addition, the manufacture process is simple.
Description
Technical field
The present invention relates to semiconductor technology, particularly a kind of RF LDMOS device and manufacture method thereof.
Background technology
RF LDMOS(radio frequency Laterally Diffused Metal Oxide Semiconductor) device is the solid microwave power semiconductor product of the New Generation of Integrated that forms of semiconductor integrated circuit technology and microwave electron technological incorporation, it is good to have the linearity, gain is high, withstand voltage height, power output is large, Heat stability is good, efficient is high, the Broadband Matching performance is good, be easy to and the advantage such as MOS technique is integrated, and its price is far below GaAs device, it is a kind of very competitive power device, be widely used in GSM, PCS, the power amplifier of W-CDMA base station, and the aspects such as radio broadcasting and nulcear magnetic resonance (NMR).
In the design process of RF LDMOS, require little conducting resistance and large puncture voltage, simultaneously because its gate leakage capacitance has determined the size of cut-off frequency, thereby gate leakage capacitance also should be the smaller the better.Higher puncture voltage helps to guarantee the stability of device when real work, be the RF LDMOS device of 50V such as operating voltage, its puncture voltage need to reach more than the 110V, and conducting resistance Rdson then can directly have influence on the characteristics such as the power output of device and gain.
The structure of common RF LDMOS device as shown in Figure 1.Be formed with P extension 10 at P substrate 1, be formed with a P trap 11 at the left part of P extension 10, right part is formed with a N-type drain terminal light dope drift region 12, and described P trap 11 does not contact with described N-type drain terminal light dope drift region 12;
Described P trap 11 tops are formed with a N-type source heavily doped region 24;
Described N-type drain terminal light dope drift region 12 right-hand members are formed with a N-type drain terminal heavily doped region 21;
The N-type impurity concentration of N-type source heavily doped region 24, N-type drain terminal heavily doped region 21 is higher than the N-type impurity concentration of N-type drain terminal light dope drift region 12;
Described P trap 11 left sides connect a P type polysilicon or metal connecting strikes the post 13;
Described contact stud 13 is communicated to P substrate 1;
Described grid oxygen 14 tops are formed with polysilicon gate 15;
Described polysilicon gate 15 tops, and described N-type drain terminal light dope drift region 12 left parts top are formed with silica 16;
Described silica 16 right parts top is formed with faraday's shield (Faraday shield) 17.
The structure of common RF LDMOS device, it has light dope drift region (LDD) 12 at drain terminal, thereby make it have larger puncture voltage (BV), because its drain terminal light dope drift region 12 doping contents are lighter, make it have larger conducting resistance (Rdson) simultaneously.The effect of faraday's shield 17 is the gate leakage capacitances (Cgd) that reduce feedback, simultaneously because it is in zero potential in application, can play the effect of field plate, by changing its length or its below silicon oxide thickness, to a certain extent can RESURF, thereby increase the puncture voltage of device, and can play the effect that hot carrier is injected that suppresses.
As shown in Figure 1, a kind of common faraday's shield 17 is the single-layer metal layer, and this single-layer metal layer is
Shape, comprise polysilicon section 171, drift section 172, vertical portion 173, vertical portion 173 is communicated with polysilicon section 171 and drift section 172, it is upper left that polysilicon section 171 is positioned at vertical portion 173, drift section 172 is positioned at 173 bottom rights, vertical portion, vertical portion 173 is on polysilicon gate 15 right sides, the left part of polysilicon section 171 is above polysilicon gate 15, drift section 172 is above drain terminal light dope drift region 12, this single-layer metal layer is with being silica 16 between polysilicon gate 15, the drain terminal light dope drift region 12, and drift section 172 is tabular.This kind faraday shield is that the RF LDMOS puncture voltage of single-layer metal layer 17 is difficult to reach very large puncture voltage.
RF LDMOS is (operating voltage is 50V) in high voltage applications, in order to make it have larger safety operation area, industry adopts the structure of the faraday's shield with two-layer or multiple layer metal layer usually at present, such as Fig. 2, shown in Figure 3, the first layer metal layer is identical with single-layer metal layer shown in Figure 1, other each metal levels sequentially are positioned at the upper right side of first layer metal layer, and silica 16 isolation are arranged between each layer metal level.Faraday's shield 17 is two-layer or the multiple layer metal layer, and it is more even to be conducive to Electric Field Distribution, so have the RF LDMOS of this faraday's shield structure, has large puncture voltage, is generally about 120V.But faraday's shield be two-layer or the RF LDMOS of multiple layer metal layer in the manufacture craft process, need to carry out the making of two-layer (or multilayer) metal level, need at least twice metal level deposit and etching process, manufacturing process is complicated.
Summary of the invention
The technical problem to be solved in the present invention is to make RF LDMOS device have high breakdown voltage, and manufacturing process is simple.
For solving the problems of the technologies described above, the invention provides a kind of RF LDMOS device, its structure is, right part in the P extension is formed with a N-type drain terminal light dope drift region, P extension in left side, N-type drain terminal light dope drift region is formed with grid oxygen, described grid oxygen top is formed with polysilicon gate, described polysilicon gate top, side and described N-type drain terminal light dope drift region left part top are formed with dielectric layer, described dielectric layer right part top is formed with faraday's shield, described faraday's shield is the single-layer metal layer, and this single-layer metal layer comprises polysilicon section, drift section, the vertical portion, the vertical portion is on the polysilicon gate right side, the upper end, vertical portion is communicated with polysilicon section right-hand member, the lower end, vertical portion is communicated with drift section left end, and the left end of polysilicon section is above polysilicon gate, and drift section is above N-type drain terminal light dope drift region, it is characterized in that
Dielectric layer under the polysilicon section of this single-layer metal layer is silica, dielectric layer under the drift section of this single-layer metal layer comprises silica, silicon nitride, the width of silicon nitride region is less than the width of described drift section, the top of silicon nitride region meets the drift section of this single-layer metal layer, and bottom and both sides are silica.
For solving the problems of the technologies described above, the present invention also provides a kind of manufacture method of RF LDMOS device, and it may further comprise the steps:
One. form grid oxygen, polysilicon gate, N-type drain terminal light dope drift region, N-type drain terminal light dope drift region is formed on the right part of P extension, and grid oxygen is formed on the P extension in left side, N-type drain terminal light dope drift region, and polysilicon gate is formed on the described grid oxygen;
Two. whole deposit one deck silica on silicon chip;
Three. by chemical wet etching, form a groove in the silica above the left part of N-type drain terminal light dope drift region, the degree of depth of described groove is less than the thickness of this layer silica;
Four. whole deposit one deck silicon nitride on silicon chip, the thickness of this layer silicon nitride equals the degree of depth of described groove;
Five. the silicon nitride etch of described groove with exterior domain fallen;
Six. deposit layer of metal layer and carry out corresponding etching on silicon chip forms faraday's shield;
The metal level that consists of described faraday's shield comprises polysilicon section, drift section, vertical portion, the vertical portion is on the polysilicon gate right side, the upper end, vertical portion is communicated with polysilicon section right-hand member, the lower end, vertical portion is communicated with drift section left end, the left end of polysilicon section is above polysilicon gate, drift section be positioned at described groove directly over, and the width of drift section is greater than the width of described groove;
Seven. carry out subsequent technique, form RF LDMOS device.
RF LDMOS device of the present invention, its faraday's shield is single-layer metal layer structure, the single-layer metal floor is the composite dielectric district that is comprised of silica and silicon nitride with the dielectric layer between the N-type drain terminal light dope drift region, silicon nitride is near metal level, silica is near N-type drain terminal light dope drift region, the single-layer metal layer is simple silica with the dielectric layer between the polysilicon gate, because the relative dielectric constant of silicon nitride is about the twice of silicon dioxide, like this so that the electric field of faraday's shield below distribute more equably, thereby improved the puncture voltage BV of device.
RF LDMOS device of the present invention, because its faraday's shield is single-layer metal layer structure, by the dielectric layer in zone under the single-layer metal layer is regulated, can realize the high-breakdown-voltage identical with the two metal layers structure devices, and having reduced metal deposit, the etching process in the device manufacturing processes, device fabrication is simple.
Description of drawings
In order to be illustrated more clearly in technical scheme of the present invention, the below does simple the introduction to the accompanying drawing that will use required for the present invention, apparently, accompanying drawing in the following describes only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the structural representation of a kind of faraday's shield RF LDMOS device that is common single-layer metal layer;
Fig. 2 is the structural representation of a kind of faraday's shield RF LDMOS device that is two metal layers;
Fig. 3 is the structural representation of a kind of faraday's shield RF LDMOS device that is the three-layer metal layer;
Fig. 4 is the structure one embodiment schematic diagram of RF LDMOS device of the present invention;
Fig. 5 is the manufacture method one embodiment step 1 schematic diagram of RF LDMOS device of the present invention;
Fig. 6 is the manufacture method one embodiment step 2 schematic diagram of RF LDMOS device of the present invention;
Fig. 7 is the manufacture method one embodiment step 3 schematic diagram of RF LDMOS device of the present invention;
Fig. 8 is the manufacture method one embodiment step 4 schematic diagram of RF LDMOS device of the present invention;
Fig. 9 is the manufacture method one embodiment step 5 schematic diagram of RF LDMOS device of the present invention;
Figure 10 is the manufacture method one embodiment step 6 schematic diagram of RF LDMOS device of the present invention;
Figure 11 is that RF LDMOS device of the present invention and faraday's shield are the distribution of N-type drain terminal light dope drift region transverse electric field intensity distance of the RF LDMOS device of two metal layers.
Embodiment
Below in conjunction with accompanying drawing, the technical scheme among the present invention is carried out clear, complete description, obviously, described embodiment is a part of embodiment of the present invention, rather than whole embodiment.Based on the embodiment among the present invention, all other embodiment that those of ordinary skills obtain under the prerequisite of not making creative work belong to the scope of protection of the invention.
Embodiment one
The structure of RF LDMOS device as shown in Figure 4.Right part in P extension 10 is formed with a N-type drain terminal light dope drift region 12, P extension 10 in 12 left sides, N-type drain terminal light dope drift region is formed with grid oxygen 14, described grid oxygen 14 tops are formed with polysilicon gate 15, described polysilicon gate 15 tops, side and described N-type drain terminal light dope drift region 12 left parts top are formed with dielectric layer 16, described dielectric layer 16 right parts top is formed with faraday's shield (Faraday shield) 17, described faraday's shield 17 is the single-layer metal layer, this single-layer metal layer comprises polysilicon section 171, drift section 172, vertical portion 173, vertical portion 173 is on polysilicon gate 15 right sides, 173 upper ends, vertical portion are communicated with polysilicon section 171 right-hand members, 173 lower ends, vertical portion are communicated with drift section 172 left ends, the left end of polysilicon section 171 is above polysilicon gate 15, drift section 172 is above N-type drain terminal light dope drift region 12, dielectric layer 16 under the polysilicon section 171 of this single-layer metal layer is silica, dielectric layer 16 under the drift section 172 of this single-layer metal layer comprises silica, silicon nitride, the width of silicon nitride region 19 is less than the width of drift section 172, the top of silicon nitride region 19 meets the drift section 172 of this single-layer metal layer, and bottom and both sides are silica.
Better, the thickness of described silicon nitride region 19 is 1000～3000 dusts;
Better, the width of described silicon nitride region 19 is 0～1.3um.
Embodiment two
Based on embodiment one, the structure of RF LDMOS device as shown in Figure 4.Left part in P extension 10 is formed with a P trap 11, is formed with a N-type drain terminal light dope drift region 12 at the right part of P extension 10, and described P trap 11 does not contact with described N-type drain terminal light dope drift region 12;
The top of described P trap 11 is formed with a N-type source heavily doped region 24;
The right part of described N-type drain terminal light dope drift region 12 is formed with a N-type drain terminal heavily doped region 21;
The N-type impurity concentration of described N-type source heavily doped region 24, N-type drain terminal heavily doped region 21 is greater than the N-type impurity concentration of N-type drain terminal light dope drift region 12;
Embodiment three
The manufacture method of embodiment one described RF LDMOS device may further comprise the steps:
One. form grid oxygen 14, polysilicon gate 15, N-type drain terminal light dope drift region 12, N-type drain terminal light dope drift region 12 is formed on the right part of P extension 10, grid oxygen 14 is formed on the P extension 10 in 12 left sides, N-type drain terminal light dope drift region, and polysilicon gate 15 is formed on the described grid oxygen 14, as shown in Figure 5;
Two. whole deposit one deck silica 16 on silicon chip, as shown in Figure 6; Better, the thickness of this layer silica is 1000～4000 dusts;
Three. by chemical wet etching, form a groove in the silica above the left part of N-type drain terminal light dope drift region, the degree of depth of this groove is less than the thickness of this layer silica 16, as shown in Figure 7; Better, the width of this groove is less than or equal to 1.3um, and the degree of depth is 1000～3000 dusts;
Four. whole deposit one deck silicon nitride 19 on silicon chip, the thickness of this layer silicon nitride 19 equals the degree of depth of described groove, as shown in Figure 8; Better, the thickness of this layer silicon nitride 19 is 1000～3000 dusts;
Five. the silicon nitride 19 of described groove with exterior domain etched away, as shown in Figure 9;
Six. deposit layer of metal layer and carry out corresponding etching on silicon chip forms faraday's shield 17, as shown in figure 10;
The metal level that consists of described faraday's shield 17 comprises polysilicon section 171, drift section 172, vertical portion 173, vertical portion 173 is on polysilicon gate 15 right sides, 173 upper ends, vertical portion are communicated with polysilicon section 171 right-hand members, 173 lower ends, vertical portion are communicated with drift section 172 left ends, the left end of polysilicon section 171 is above polysilicon gate 15, drift section 172 be positioned at described groove directly over, and the width of drift section 172 is greater than the width of described groove;
Seven. carry out subsequent technique, form RF LDMOS device, as shown in Figure 4.
Embodiment four
Based on the manufacture method of the RF LDMOS device of embodiment three, step 1 may further comprise the steps:
(1) in P Grown P extension 10;
(2) in P extension 10, push away trap (ion activation) by P Implantation and high temperature and form P trap 11;
(3) at P extension 10 gate oxide of growing;
(4) depositing polysilicon on gate oxide;
(5) by position and the area of photoresist definition polysilicon gate 15, the left end of polysilicon gate 15 is removed the gate oxide outside polysilicon gate 15 zones and etching polysilicon above the right part of described P trap 11, forms grid oxygen 14 and polysilicon gate 15;
(6) photoresist at reservation polysilicon gate 15 tops carries out N-type light dope Implantation, forms a N-type drain terminal light dope drift region 12 in the P extension 10 on polysilicon gate 15 right sides, forms N-type source light doping section in the P trap 11 in polysilicon gate 15 left sides; Better, the N-type impurity of N-type light dope Implantation is phosphorus or arsenic, and the Implantation Energy scope is 50keV～300keV, and the implantation dosage scope is 5E
11～4E
12Individual atom per square centimeter;
(7) go out position and the area of the position of a N-type source heavily doped region 24 and area, a N-type drain terminal heavily doped region 21 by lithographic definition, carry out the N Implantation, form this N-type source heavily doped region 24 and this N-type drain terminal heavily doped region 21; This N-type source heavily doped region 24 is positioned at the right part of described N-type source light doping section, and this N-type drain terminal heavily doped region 21 is positioned at the right part of this N-type drain terminal light doping section 12.
RF LDMOS device of the present invention, its faraday's shield is single-layer metal layer structure, the single-layer metal floor is the composite dielectric district that is comprised of silica and silicon nitride with the dielectric layer between the N-type drain terminal light dope drift region, silicon nitride is near metal level, silica is near N-type drain terminal light dope drift region, the single-layer metal layer is simple silica with the dielectric layer between the polysilicon gate, because the relative dielectric constant of silicon nitride is about the twice of silicon dioxide, like this so that the electric field of faraday's shield below distribute more equably, thereby improved the puncture voltage BV of device.
RF LDMOS device of the present invention, because its faraday's shield is single-layer metal layer structure, by the dielectric layer in zone under the single-layer metal layer is regulated, can realize the high-breakdown-voltage identical with the two metal layers structure devices, and having reduced metal deposit, the etching process in the device manufacturing processes, device fabrication is simple.
Figure 11 is that RF LDMOS device of the present invention and faraday's shield are the distribution of N-type drain terminal light dope drift region transverse electric field intensity distance of the RF LDMOS device of two metal layers.Wherein, solid line represents the RF LDMOS device that double-deck faraday's shield is two metal layers, and dotted line represents RF LDMOS device of the present invention, and the corresponding area of curve is puncture voltage BV.Peak electric field 30 is formed by the composite dielectric district under the single-layer metal floor of RF LDMOS device of the present invention.This is because silicon nitride has higher relative dielectric constant than silicon dioxide, be about its 2 times, thereby the electric field of filling silicon nitride region below can form a peak value, and the peak electric field that obtains with the first layer metal layer of double-deck faraday's shield RF LDMOS device that is two metal layers is similar.The existence of this peak value can make the distribution of electric field more even, helps to improve puncture voltage BV.
The above only is preferred embodiment of the present invention, and is in order to limit the present invention, within the spirit and principles in the present invention not all, any modification of making, is equal to replacement, improvement etc., all should be included within the scope of protection of the invention.
Claims (7)
1. RF LDMOS device, right part in the P extension is formed with a N-type drain terminal light dope drift region, P extension in left side, N-type drain terminal light dope drift region is formed with grid oxygen, described grid oxygen top is formed with polysilicon gate, described polysilicon gate top, side and described N-type drain terminal light dope drift region left part top are formed with dielectric layer, described dielectric layer right part top is formed with faraday's shield, described faraday's shield is the single-layer metal layer, this single-layer metal layer comprises polysilicon section, drift section, the vertical portion, the vertical portion is on the polysilicon gate right side, the upper end, vertical portion is communicated with polysilicon section right-hand member, the lower end, vertical portion is communicated with drift section left end, and the left end of polysilicon section is above polysilicon gate, and drift section is above N-type drain terminal light dope drift region, it is characterized in that
Dielectric layer under the polysilicon section of this single-layer metal layer is silica, dielectric layer under the drift section of this single-layer metal layer comprises silica, silicon nitride, the width of silicon nitride region is less than the width of described drift section, the top of silicon nitride region meets the drift section of this single-layer metal layer, and bottom and both sides are silica.
2. RF LDMOS device according to claim 1 is characterized in that,
The thickness of silicon nitride region is 1000～3000 dusts.
3. RF LDMOS device according to claim 1 is characterized in that,
The width of silicon nitride region is 0～1.3um.
4. RF LDMOS device according to claim 1 is characterized in that,
Left part in the P extension is formed with a P trap, and described P trap does not contact with described N-type drain terminal light dope drift region;
The top of described P trap is formed with a N-type source heavily doped region;
The right part of described N-type drain terminal light dope drift region is formed with a N-type drain terminal heavily doped region;
The N-type impurity concentration of described N-type drain terminal heavily doped region, N-type source heavily doped region is greater than the N-type impurity concentration of N-type drain terminal light dope drift region;
The P trap top on described N-type source heavily doped region right side, and the top of the P extension between described P trap and the described N-type drain terminal light dope drift region are formed with described grid oxygen.
5. the manufacture method of a RF LDMOS device claimed in claim 1 is characterized in that, may further comprise the steps:
One. form grid oxygen, polysilicon gate, N-type drain terminal light dope drift region, N-type drain terminal light dope drift region is formed on the right part of P extension, and grid oxygen is formed on the P extension in left side, N-type drain terminal light dope drift region, and polysilicon gate is formed on the described grid oxygen;
Two. whole deposit one deck silica on silicon chip;
Three. by chemical wet etching, form a groove in the silica above the left part of N-type drain terminal light dope drift region, the degree of depth of described groove is less than the thickness of this layer silica;
Four. whole deposit one deck silicon nitride on silicon chip, the thickness of this layer silicon nitride equals the degree of depth of described groove;
Five. the silicon nitride etch of described groove with exterior domain fallen;
Six. deposit layer of metal layer and carry out corresponding etching on silicon chip forms faraday's shield;
The metal level that consists of described faraday's shield comprises polysilicon section, drift section, vertical portion, the vertical portion is on the polysilicon gate right side, the upper end, vertical portion is communicated with polysilicon section right-hand member, the lower end, vertical portion is communicated with drift section left end, the left end of polysilicon section is above polysilicon gate, drift section be positioned at described groove directly over, and the width of drift section is greater than the width of described groove;
Seven. carry out subsequent technique, form RF LDMOS device.
6. the manufacture method of RF LDMOS device according to claim 5 is characterized in that,
The width of described groove is less than or equal to 1.3um, and the degree of depth is 1000～3000 dusts;
The thickness of this layer silicon nitride is 1000～3000 dusts.
7. the manufacture method of RF LDMOS device according to claim 5 is characterized in that,
Step 1 may further comprise the steps:
(1) in P Grown P extension;
(2) Yanzhong pushes away trap by P Implantation and high temperature and forms the P trap outside P;
(3) at the P extension gate oxide of growing;
(4) depositing polysilicon on gate oxide;
(5) by position and the area of photoresist definition polysilicon gate, the left end of polysilicon gate is removed the gate oxide outside the polysilicon gate zone and etching polysilicon above the right part of described P trap, forms grid oxygen and polysilicon gate;
(6) photoresist at reservation polysilicon gate top carries out N-type light dope Implantation, and the Yanzhong forms a N-type drain terminal light dope drift region outside the P on polysilicon gate right side.
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| CN104966736A (en) * | 2015-06-01 | 2015-10-07 | 电子科技大学 | Radio frequency LDMOS device and manufacturing method thereof |
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