CN103035634A - Super junction device structure capable of improving snow slide tolerance ability - Google Patents
Super junction device structure capable of improving snow slide tolerance ability Download PDFInfo
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- CN103035634A CN103035634A CN2011103014642A CN201110301464A CN103035634A CN 103035634 A CN103035634 A CN 103035634A CN 2011103014642 A CN2011103014642 A CN 2011103014642A CN 201110301464 A CN201110301464 A CN 201110301464A CN 103035634 A CN103035634 A CN 103035634A
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Abstract
The invention discloses a super junction device structure capable of improving snow slide tolerance ability. The structure comprises a cellular area and a terminal of a super junction device, wherein the terminal is arranged on the periphery of the cellular area. A cellular body injection region is covered on the top layer of a cellular groove in the cellular area of the super junction device. A plurality of cellular N-type ion-implanted regions are covered on a part of the area in the cellular body injection region. Top layers of the cellular N-type ion-implanted regions are covered with cellular source region contact holes which are bar-shaped and extend along the length direction of the cellular N-type ion-implanted regions. The cellular source region contact holes fully cover the cellular N-type ion-implanted regions and only cover a part of the cellular body injection region along the length direction of the cellular source region contact holes. The super junction device structure can greatly increase the area of the holes and the cellular body injection region. Therefore, zero potential of the cellular body injection region is stably controlled, base resistance of a parasitic transistor is lowered, triggering and starting conditions of the parasitic transistor are improved, and the parasitic transistor is effectively prevented from being triggered and started.
Description
Technical field
The present invention relates to a kind of semiconductor device structure, be specifically related to a kind of super junction device structure that can improve the avalanche capability ability.
Background technology
Power semiconductor is the inherent actuating force of the power-electronic system of development, especially at aspects such as energy savings, dynamically control, noise minimizings.Power semiconductor is mainly used in to be controlled the energy between the energy and the load, and should have precision height, speed characteristics fast and low in energy consumption.The early 1990s later 1980s, " silicon limit " broken in a kind of proposition of new ideas, it can obtain low on-state power consumption and high switching speed simultaneously, and this concept has obtained " super knot theoretical (Super junction Theory) " through after evolution and improving.Use the COOLMOSTM device that the theoretical typical products of super knot is company of Infineon (Infineon) release of Siemens in 1998.The revolutionary character of the COOLMOSTM product of releasing at that time breaks through and is: in its working range (withstand voltage 600～800V), with respect to conventional art, on identical chip area, its conducting resistance (mainly being drift layer resistance) has reduced by 80～90%, break the silicon limit, and had high switching speed.
Be illustrated in figure 1 as super-junction structure and be applied to the vertical power MOS (Metal Oxide Semiconductor) device of N-type, i.e. N-type COOLMOSTM structure.Only have majority carrier in this structure turn on process---electronics, and do not have the participation of minority carrier, therefore, its switching loss is identical with traditional power MOSFET, and the impurity doping content of its voltage support layer can improve order of magnitude nearly.In addition, owing to insert p type island region on the vertical direction, can compensate excessive current lead-through electric charge.Add reverse bias voltage at drift layer, will produce a transverse electric field, the pn knot is exhausted.When voltage reached certain value, drift layer exhausted fully, will play the effect of voltage support layer.Because the significantly raising of doping content, under identical puncture voltage, conducting resistance RON can reduce greatly, even breaks through the silicon limit.Equally, can under identical puncture voltage, identical conducting resistance RON, use less die area, thereby reduce the grid electric charge, improve switching frequency.Because super junction device is how sub-device, therefore, this device does not have the current tail phenomenon of bipolar transistor, so super junction device can obtain low on-state power consumption and high switching speed simultaneously.
But the application of super junction device is subject to its avalanche capability.
Summary of the invention
Technical problem to be solved by this invention provides a kind of super junction device structure that can improve the avalanche capability ability, and it can significantly and effectively improve the avalanche capability of super junction device.
For solving the problems of the technologies described above, the technical solution that the present invention can improve the super junction device structure of avalanche capability ability is:
Comprise cellular zone, the terminal of super junction device, terminal is arranged at the periphery in cellular zone; In the cellular zone of super junction device, the top layer of cellular groove is coated with first cell space injection region, and polylith cellular N-type ion implanted region is covered in the subregion in first cell space injection region; The top layer of cellular N-type ion implanted region is coated with cellular source region contact hole, and cellular source region contact hole is strip, and cellular source region contact hole extends along the length direction of cellular N-type ion implanted region.
At the length direction of described cellular source region contact hole, cellular source region contact hole all covers cellular N-type ion implanted region, and covers the subregion of first cell space injection region.
At the Width of described cellular source region contact hole, cellular source region contact hole covers the first cell space injection region between two cellular N-type ion implanted regions, and the fringe region of two cellular N-type ion implanted regions.
The guard ring of described terminal comprises many strip P type grooves, and groove becomes circular shape in four corners, and the width of each root P type groove equals the width of the P type cellular groove in the cellular zone.
Carry out the heavy doping of P type by described cellular source region contact hole and inject, form ohmic contact on the surface that cellular source region contact hole contacts with first cell space injection region; The concentration that described P type heavy doping is injected is lower than the implantation concentration of cellular N-type ion implanted region.Described P type heavy doping is injected and is realized by repeatedly injecting, and makes the surface concentration of ohmic contact less than bottom concentration.
The technique effect that the present invention can reach is:
The present invention can increase the area of Kong Yuyuan cell space injection region greatly, thereby more stably controls the zero potential of first cell space injection region, reduces the base resistance of parasitic transistor, improves parasitic transistor and triggers the condition of opening.
The present invention can increase the source region contact hole for the control of bulk potential, reduces contact resistance, thereby effectively improves the avalanche capability EAS (energy avalanche switching) of super junction device when turn-offing.
Description of drawings
The present invention is further detailed explanation below in conjunction with the drawings and specific embodiments:
Fig. 1 is the schematic diagram that the prior art super-junction structure is applied to the vertical power MOS (Metal Oxide Semiconductor) device of N-type;
Fig. 2 is the schematic diagram that the present invention can improve the super junction device structure of avalanche capability ability;
Fig. 3 is the partial enlarged drawing of C among Fig. 2;
Fig. 4 is the profile of AA ' among Fig. 3;
Fig. 5 is the profile of BB ' among Fig. 3.
Description of reference numerals among the figure:
101 is the cellular zone, and 102 is terminal,
30 is first cell space injection region, and 41 is the cellular groove,
50 is cellular N-type ion implanted region, and 61 is cellular source region contact hole,
40 is groove, and 60 is the terminal contact hole,
10 is substrate, and 20 is the epitaxial region.
Embodiment
As shown in Figure 2, the present invention can improve the super junction device structure of avalanche capability ability, comprises cellular zone 101, the terminal 102 of super junction device, and terminal 102 is arranged at the periphery in cellular zone 101;
The guard ring of terminal 102 comprises many strip P type grooves 40, and groove 40 becomes circular shape in four corners, and the width of each root P type groove 40 equates, and equals the width of the P type cellular groove 41 in the cellular zone 101 (being the device current flow region);
Such as Fig. 3 to the domain structure that Figure 5 shows that super junction device cellular and terminal junction, in the cellular zone 101 of super junction device, the top layer of cellular groove 41 is coated with first cell space injection region 30, and polylith cellular N-type ion implanted region 50 is covered in the subregion in first cell space injection region 30;
The top layer of cellular N-type ion implanted region 50 is coated with cellular source region contact hole 61, and cellular source region contact hole 61 is strip, and cellular source region contact hole 61 extends along the length direction of cellular N-type ion implanted region 50;
As shown in Figure 4, at the length direction of cellular source region contact hole 61, cellular source region contact hole 61 all covers cellular N-type ion implanted region 50, only covers the subregion of first cell space injection region 30 simultaneously;
As shown in Figure 5, Width at cellular source region contact hole 61, first cell space injection region 30 that cellular source region contact hole 61 covers between two cellular N-type ion implanted regions 50, and the fringe region of two cellular N-type ion implanted regions 50, guarantee that cellular N-type ion implanted region 50 contacts simultaneously with first cell space injection region 30.
Carry out the heavy doping of P type by cellular source region contact hole 61 and inject, form ohmic contact on the surface that cellular source region contact hole 61 contacts with first cell space injection region 30; The concentration that the heavy doping of P type is injected is lower than the concentration of cellular N-type ion implanted region 50, is not neutralized to guarantee that cellular source region contact hole 61 mixes with the N-type of N-type contact portion;
The heavy doping of P type is injected and can be injected several times, and it is light to form the surface, the distribution that the bottom is dense.
It is overlapping that cellular of the present invention source region contact hole 61 and cellular N-type ion implanted region 50 and first cell space injection region 30 all have, can assurance and the good contact in source region and tagma.
The current potential of first cell space injection region 30 in super junction device cellular and the terminal transition region has more effectively been controlled in the design that cellular of the present invention source region contact hole 61 grows cellular N-type ion implanted region 50, reduced the cellular volume resistance of introducing owing to the control current potential, thereby the triggering that effectively prevents parasitic transistor is opened.
Claims (7)
1. super junction device structure that can improve the avalanche capability ability is characterized in that: comprise cellular zone, the terminal of super junction device, terminal is arranged at the periphery in cellular zone; In the cellular zone of super junction device, the top layer of cellular groove is coated with first cell space injection region, and polylith cellular N-type ion implanted region is covered in the subregion in first cell space injection region; The top layer of cellular N-type ion implanted region is coated with cellular source region contact hole, and cellular source region contact hole is strip, and cellular source region contact hole extends along the length direction of cellular N-type ion implanted region.
2. the super junction device structure that can improve the avalanche capability ability according to claim 1, it is characterized in that: at the length direction of described cellular source region contact hole, cellular source region contact hole all covers cellular N-type ion implanted region, and covers the subregion of first cell space injection region.
3. the super junction device structure that can improve the avalanche capability ability according to claim 1 and 2, it is characterized in that: at the Width of described cellular source region contact hole, cellular source region contact hole covers the first cell space injection region between two cellular N-type ion implanted regions, and the fringe region of two cellular N-type ion implanted regions.
4. the super junction device structure that can improve the avalanche capability ability according to claim 1; it is characterized in that: the guard ring of described terminal comprises many strip P type grooves; groove becomes circular shape in four corners, and the width of each root P type groove equals the width of the P type cellular groove in the cellular zone.
5. the super junction device structure that can improve the avalanche capability ability according to claim 3, it is characterized in that: carry out the heavy doping of P type by described cellular source region contact hole and inject, form ohmic contact on the surface that cellular source region contact hole contacts with first cell space injection region.
6. the super junction device structure that can improve the avalanche capability ability according to claim 5 is characterized in that: the concentration that described P type heavy doping is injected is lower than the implantation concentration of cellular N-type ion implanted region.
7. the super junction device structure that can improve the avalanche capability ability according to claim 6 is characterized in that: described P type heavy doping is injected and is realized by repeatedly injecting, and makes the surface concentration of ohmic contact less than bottom concentration.
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| CN201110301464.2A CN103035634B (en) | 2011-10-09 | 2011-10-09 | Super junction device structure capable of improving snow slide tolerance ability |
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Citations (6)
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|---|---|---|---|---|
| US4969024A (en) * | 1988-08-19 | 1990-11-06 | Fuji Electric Co., Ltd. | Metal-oxide-semiconductor device |
| US20060208334A1 (en) * | 2005-03-15 | 2006-09-21 | Denso Corporation | Semiconductor device having super junction structure and method for manufacturing the same |
| CN101840933A (en) * | 2010-04-13 | 2010-09-22 | 苏州博创集成电路设计有限公司 | Super-junction metal oxide field effect transistor with surface buffering ring terminal structure |
| CN101969073A (en) * | 2010-08-27 | 2011-02-09 | 东南大学 | Rapid superjunction longitudinal double-diffusion metal oxide semiconductor transistor |
| CN102163621A (en) * | 2010-02-19 | 2011-08-24 | 富士电机系统株式会社 | Semiconductor device and a method of manufacturing the same |
| CN102412260A (en) * | 2010-09-25 | 2012-04-11 | 上海华虹Nec电子有限公司 | Terminal protection structure of super-junction semiconductor device and fabrication method thereof |
-
2011
- 2011-10-09 CN CN201110301464.2A patent/CN103035634B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4969024A (en) * | 1988-08-19 | 1990-11-06 | Fuji Electric Co., Ltd. | Metal-oxide-semiconductor device |
| US20060208334A1 (en) * | 2005-03-15 | 2006-09-21 | Denso Corporation | Semiconductor device having super junction structure and method for manufacturing the same |
| CN102163621A (en) * | 2010-02-19 | 2011-08-24 | 富士电机系统株式会社 | Semiconductor device and a method of manufacturing the same |
| CN101840933A (en) * | 2010-04-13 | 2010-09-22 | 苏州博创集成电路设计有限公司 | Super-junction metal oxide field effect transistor with surface buffering ring terminal structure |
| CN101969073A (en) * | 2010-08-27 | 2011-02-09 | 东南大学 | Rapid superjunction longitudinal double-diffusion metal oxide semiconductor transistor |
| CN102412260A (en) * | 2010-09-25 | 2012-04-11 | 上海华虹Nec电子有限公司 | Terminal protection structure of super-junction semiconductor device and fabrication method thereof |
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