CN103022134A - Silicon on insulator (SOI) transverse high voltage power device with ultralow specific on resistance - Google Patents
Silicon on insulator (SOI) transverse high voltage power device with ultralow specific on resistance Download PDFInfo
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Abstract
A silicon on insulator (SOI) transverse high voltage power device with ultralow specific on resistance belongs to the technical field of power semiconductor devices and comprises a vertical super junction cellular structure and a terminal structure. The terminal structure is located on the outside or the periphery of an integral cellular structure. The device is manufactured on an SOI layer of an SOI material. The vertical super junction cellular structure improves breakdown voltage, reduces specific on resistance simultaneously and reduces domain area. The device is integrated by a single cellular or a plurality of cellulars, the plurality of cellulars connected in parallel can share one terminal, and a drain leading out structure is utilized to lead out a drain transversely to enable the drain, a grid and a source to be located on the surface. The device can be easily integrated with a common circuit, greatly reduces domain area and further reduces process cost. In addition, the device is capable of increasing a device vertical electric field by adopting a thin oxygen burying layer and simultaneously can effectively relieve self-heating effect.
Description
Technical field
The invention belongs to the semiconductor power device technology field, relate to a kind of horizontal high voltage power device of SOI of Ultra-low Specific conducting resistance.
Background technology
Silicon SOI on the insulating barrier (Silicon On Insulator) is a kind of new material for the integrated circuit manufacturing, can replace the body silicon of widely applying at present.Laterally high voltage power device LDMOS (Lateral Double-diffused Metal OxideSemiconductor) has extremely important purposes in power integrated circuit and intelligent power circuit, the drain electrode of this class device, source electrode and grid are all at chip surface, be easy to connect with the low-voltage signal circuit by inside integrated, simplify the drive circuit of power device.Have good isolation performance, less parasitic capacitance and leakage current with the LDMOS of SOI material manufacturing, and technique and CMOS (Complementary Metal Oxide Semiconductor) process compatible, bulk-silicon LDMOS technique is simpler relatively, can be widely used in high frequency, the high power fields such as communication, power power-supply, motor driving and automotive electronics.Traditional SOILDMOS is in order to realize that high puncture voltage requires it to be used to bear withstand voltage drift region and has lower doping content and higher thickness, but in order to reduce the conduction resistance of device, require again to have high doping content as the drift region of current channel.Use and grow the puncture voltage that lightly doped drift region and thick oxygen buried layer can improve device, but this will increase the conducting area of device, and cause the conduction resistance increase of device and produce serious self-heating effect.MOS (the Metal Oxide Semiconductor) conduction resistance of class device and the contradictory relation of device withstand voltage have limited the application of such device in the high-voltage great-current field.In order to shorten the drift region length of device, people propose the structure of grooved drift region, such as Fig. 1.By the groove oxide layer 24 withstand voltage length that shorten the drift region, and then the conduction resistance of reduction device.But because the quoting of groove, although the drift region contraction in length, the path of carrier flow bends, though lower drift region concentration so that the conduction resistance of device be improved, but still larger.
Summary of the invention
The technical problem to be solved in the present invention is, for the horizontal high voltage power device of traditional SOI for obtaining high withstand voltage drift region of adopting than low doping concentration, cause the device conduction resistance to increase, and adopt thick oxygen buried layer to bring the problems such as remarkable self-heating effect, strengthen the theory of ENBULF (Enhanced Bulk Field) based on bulk electric field, propose a kind of horizontal high voltage power device of SOI of low Ultra-low Specific conducting resistance.This device on the one hand in drift region introducing longitudinal P bar and N bar reduce chip area, alleviated device conduction resistance and withstand voltage contradictory relation; Adopt on the other hand thin oxygen buried layer thickness can increase the device longitudinal electric field, can effectively slow down the device self-heating effect simultaneously; Again on the one hand, P type doping bar assisted depletion, thus the drift region concentration that increases device reduces the device conduction resistance.In addition, the present invention can adopt single or multiple cellulars integrated, a plurality of cellulars in parallel can share same terminal, and by drain metal drain electrode is laterally drawn, make drain electrode, grid and source electrode all on the surface, not only be easy to custom circuit integratedly, and greatly reduce chip area, further reduce process costs.
Technical solution of the present invention is:
The horizontal high voltage power device of a kind of SOI of Ultra-low Specific conducting resistance as shown in Figure 2, comprises and at least one or more than one vertically surpassing ties structure cell 11 and terminal structure 12; A plurality of vertically super knot structure cells 11 are horizontal or Width is together tightly packed along device, form whole vertically super knot structure cell; Described terminal structure 12 is positioned at the outside or the periphery of whole structure cell.Described vertically super knot structure cell 11 and terminal structure 12 are made on the soi layer 26 of SOI material, and described SOI material comprises substrate layer 34, oxygen buried layer 25 and soi layer 26, and wherein oxygen buried layer 25 is positioned in the middle of substrate layer 34 and the soi layer 26.
Described vertically super knot structure cell 11 comprises N-type drift region 43, is positioned at the P type well region 31 of N-type drift region 43 top outer, be arranged in P type well region 31 and with source metal 51 contacted P
+ Source contact area 33 and N
+ Source contact area 41, has P type doping bar 32 in the N-type drift region 43 of P type well region 31 belows, P type doping bar 32 forms super-junction structure with the N-type drift region 43 on next door, and the N-type drift region 43 of super-junction structure and super-junction structure below consists of the drift region with part super-junction structure; Grid structure is made of gate oxide 21 and polygate electrodes 52, and wherein gate oxide 21 contacts with N-type drift region 43 and P type well region 31, mutually isolates by dielectric layer 23 between polygate electrodes 52 and the source metal 51.
Described terminal structure 12 comprises N-type drift region 43, N-type doping bar 42, N-type heavy doping drain contact region 44 and media slot 24; Top one side of N-type drift region 43 is the N-type heavy doping drain contact region 44 that link to each other with drain metal 53 in the terminal structure 12, N-type doping bar 42 is arranged in the N-type drift region 43 of N-type heavy doping drain contact region 44 belows, and contacts with N-type heavy doping drain contact region 44; Media slot 24 is between the P type doping bar 32 of N-type doping bar 42 and described vertically super knot structure cell 11, media slot 24 and reserve part N-type drift region 43, N-type doping bar 42 below isolate by dielectric layer 23 between drain metal 53 and the source metal 51 mutually as current channel.
The horizontal high voltage power device of the SOI of Ultra-low Specific conducting resistance provided by the invention comprises structure cell 11, terminal structure 12; P type doping bar 32 and N-type type drift region 43 consist of vertical super-junction structure in the primitive cell structure 11, alleviate the contradictory relation between device electric breakdown strength and the conduction resistance; Shown in Fig. 2 (b), device can integrated one or more cellulars, the cellular of a plurality of parallel connections can share a terminal structure 12, and draw by drain metal 53, the drain electrode of device is laterally drawn, not only greatly reduce domain, reduce process costs, and can be integrated with custom circuit, applying flexible; The horizontal high voltage power device of SOI provided by the invention can adopt the structures such as planar gate, groove grid or V-type grid.
The horizontal high voltage power device of the SOI of Ultra-low Specific conducting resistance provided by the invention, wherein oxygen buried layer 25 electromotive forces are by the vertical super-junction structure clamper in source electrode below, cause oxygen buried layer 25 upper and lower surfaces to accumulate respectively a large amount of holes and electronics, the direction of an electric field that these electron hole pairs produce is identical with the direction of an electric field of N-type drift region 43 and substrate 34, so that the comparable common SOI lateral high-voltage device of the thickness of oxygen buried layer 25 is thinner, slow down the self-heating effect of device.Two inversion charges that accumulation is arranged at the interface of oxygen buried layer 25 are so that oxygen buried layer 25 electric fields increase.
Operation principle of the present invention can be described below:
The horizontal high voltage power device of the SOI of described Ultra-low Specific conducting resistance can adopt the structures such as planar gate, groove grid or V-type grid, and the operation principle of these structures all is similar.
Shown in Fig. 2 (a), the horizontal high voltage power device of the SOI of Ultra-low Specific conducting resistance comprises P type well region 31, P
+ Source contact area 33, N
+ Source contact area 41, N
+Drain contact region 44, P type doping bar 32, N-type doping bar 42, N-type drift region 43; Wherein P type doping bar 32 and N-type drift region 43 have consisted of vertical super-junction structure.The horizontal high voltage power device of the SOI of described Ultra-low Specific conducting resistance can integrated single or multiple cellulars, and a plurality of cellulars can share same terminal, and laterally draw by draining.
The horizontal high voltage power device of SOI of Ultra-low Specific conducting resistance provided by the invention withstand voltage comprises laterally withstand voltage and vertically withstand voltage, wherein laterally withstand voltage then by 12 decisions of device lateral terminal structure, vertically withstand voltage vertical super-junction structure and oxygen buried layer 25 thickness by cellular determine.When device drain applies high voltage, P type well region 31 begins to exhaust with the PN junction metallurgical junction face that N-type drift region 43 consists of, along with drain voltage increases depletion region 43 expansions to the N-type drift region, peak electric field appears in the PN junction metallurgical junction face that P type well region 31 and N-type drift region 43 are consisted of.Simultaneously, remaining ionization acceptor electric charge in the P type doping bar 32 that exhausts, Electric Field Distribution in the modulation device body, avoid electric field line in the source concentrations, and introduce at the interface new peak electric field in P type doping bar 32 and media slot 24, amplified medium groove 24 body internal electric fields further improve device laterally withstand voltage.When the device forward is withstand voltage, because the concentration of N-type doping bar 42 is higher, can provide low impedance path, reduce the conduction resistance of device; Reverse when withstand voltage when device, N-type doping bar 42 provides a large amount of positive charges, and the electric field line distribution of modulated media groove 24 reduces peak electric field, improves device withstand voltage.The present invention is 43 interior introducing media slot 24 in the N-type drift region, can strengthen electric field strength, and media slot 24 forms folding drift region simultaneously, can dwindle active region area, can significantly reduce conduction resistance.
The common SOI high voltage power device of oxygen buried layer 25 Thickness Ratios of the horizontal high voltage power device of SOI of Ultra-low Specific conducting resistance provided by the invention is thin, can slow down the self-heating effect of device.This is to connect high potential because work as the device drain terminal, when source and substrate connecting to neutral current potential, the electromotive force of oxygen buried layer 25 is by the vertical super-junction structure clamper in source electrode below, cause oxygen buried layer 25 upper surfaces to accumulate a large amount of holes, and lower surface accumulates a large amount of electronics, the direction of an electric field that these electron hole pairs produce is identical with the direction of an electric field of N-type drift region 43 and substrate 34, thereby so that the thickness of oxygen buried layer 25 can be thinner than common SOI lateral high-voltage device, thereby slow down the self-heating effect of device.Along with the thickness of oxygen buried layer 25 changes, oxygen buried layer 25 amplified medium field effects occur, and two of oxygen buried layer 25 there is the inversion charge accumulation at the interface, so that oxygen buried layer 25 electric fields increase.And the horizontal high voltage power device of traditional SOI adopts thicker oxygen buried layer 25, the heat that active area produces can't import matrix, cause device temperature to raise, carrier mobility reduces, the self-heating effects such as negative conductance appear, hinder further developing and using of SOI technology, particularly in the high temperature and high pressure field.In addition, the P type doping bar 32 that the present invention introduces and N-type drift region 43 form vertical super-junction structure, P type doping bar 32 assisted depletion N-type drift regions 43, and the optimised devices longitudinal electric field improves device vertically withstand voltage.
Advantage of the present invention is as follows:
1) the present invention can integrated single or multiple structure cells, the cellular of a plurality of parallel connections can share same terminal structure 12, and by drain metal drain electrode is laterally drawn, and makes grid, drain electrode and source electrode all on the surface, not only be easy to custom circuit integratedly, greatly reduce simultaneously chip area.
2) the present invention can be the structures such as planar gate, groove grid or V-type grid.
3) the P type doping bar 32 of the present invention's proposition and N-type drift region 43 form vertical super-junction structure, alleviate the contradictory relation of device electric breakdown strength and conduction resistance.
4) the P type doping bar 32 that proposes of the present invention and N-type doping bar 42 in the N-type drift region two new electric field spikes of 43 interior introducings so that the Electric Field Distribution of N-type drift region 43 is similar to the leak down Electric Field Distribution of vertical super-junction of source.Simultaneously, the extra electric field that P type doping bar 32 and N-type doping bar 42 produce has increased the electric field of groove oxide layer 24, and has shortened the active area of device, has then dwindled the area of whole device.
5) the present invention in the N-type drift region 43 interior introducing media slot 24, media slot 24 can strengthen electric field strength, and media slot 24 forms folding drift region simultaneously, can dwindle active region area, can significantly reduce conduction resistance, simulation result shows that the conduction resistance of device can be less than 60m Ω cm
2, optimal voltage can surpass 650V, and this has broken traditional silicon limit.
6) the common SOI high voltage power device of the Thickness Ratio of oxygen buried layer 25 of the present invention is thin, can slow down the self-heating effect of device.In addition, two of oxygen buried layer 25 have the inversion charge accumulation at the interface, so that oxygen buried layer 25 electric fields surpass 500V/mm.
Description of drawings
Fig. 1 is the horizontal high-voltage power device structure profile of traditional SOI, introduces media slot 24 in the N-type drift region 43, for reducing the conduction resistance of device.
Fig. 2 is the horizontal high-voltage power device structure schematic diagram of planar gate type SOI with Ultra-low Specific conducting resistance provided by the invention.Wherein, (a) be the device architecture schematic diagram of an integrated cellular; (b) be the device architecture schematic diagram of integrated a plurality of cellulars.
Fig. 3 is the horizontal high voltage power device transverse electric field of the planar gate type SOI schematic diagram with Ultra-low Specific conducting resistance provided by the invention.Wherein (a) is device transverse electric field schematic diagram of the present invention; (b) traditional devices transverse electric field schematic diagram.
Fig. 4 is the horizontal high voltage power device longitudinal electric field of the planar gate type SOI schematic diagram with Ultra-low Specific conducting resistance provided by the invention.
Fig. 5 is the horizontal high voltage power device body of the planar gate type SOI built-in potential distribution schematic diagram with Ultra-low Specific conducting resistance provided by the invention.Wherein (a) is device body built-in potential schematic diagram of the present invention, A be media slot 24 with source electrode contact point, B be media slot 24 with P type doping bar 32 contact points, C be media slot 24 with drain electrode contact point, D be media slot 24 edges a bit; (b) be traditional devices body built-in potential schematic diagram, A ', B ', C ', D ' correspond respectively to A, B, C, D 4 points in the structure of the present invention.
Fig. 6 provided by the inventionly has the horizontal high voltage power device of planar gate type SOI of Ultra-low Specific conducting resistance around the silicon distribution map of the electric field on media slot 24 surfaces.A be media slot 24 with source electrode contact point, B be media slot 24 with P type doping bar 32 contact points, C be media slot 24 with drain electrode contact point, D be media slot 24 edges a bit, A ', B ', C ', D ' correspond respectively to A, B, C, D 4 points in the structure of the present invention.
Fig. 7 is the schematic diagram that concerns of the horizontal high voltage power device conduction resistance of SOI and puncture voltage.
Fig. 8 is the horizontal high-voltage power device structure schematic diagram of shallow groove gate type SOI with Ultra-low Specific conducting resistance provided by the invention.Wherein, (a) be the device architecture schematic diagram of an integrated cellular; (b) be the device architecture schematic diagram of integrated a plurality of cellulars.
Fig. 9 is the horizontal high-voltage power device structure schematic diagram of dark groove gate type SOI with Ultra-low Specific conducting resistance provided by the invention.Wherein, (a) be the device architecture schematic diagram of an integrated cellular; (b) be the device architecture schematic diagram of integrated a plurality of cellulars.
Figure 10 is the horizontal high-voltage power device structure schematic diagram of planar gate type SOI with Ultra-low Specific conducting resistance provided by the invention, and 35 is P
+Drain contact region forms LIGBT (Lateral Insulated Gate Bipolar Transistor) structure.Wherein, (a) be the device architecture schematic diagram of an integrated cellular; (b) be the device architecture schematic diagram of integrated a plurality of cellulars.
Embodiment
The horizontal high voltage power device of a kind of SOI of Ultra-low Specific conducting resistance as shown in Figure 2, comprises and at least one or more than one vertically surpassing ties structure cell 11 and terminal structure 12; A plurality of vertically super knot structure cells 11 are horizontal or Width is together tightly packed along device, form whole vertically super knot structure cell; Described terminal structure 12 is positioned at the outside or the periphery of whole structure cell.Described vertically super knot structure cell 11 and terminal structure 12 are made on the soi layer 26 of SOI material, and described SOI material comprises substrate layer 34, oxygen buried layer 25 and soi layer 26, and wherein oxygen buried layer 25 is positioned in the middle of substrate layer 34 and the soi layer 26.
Described vertically super knot structure cell 11 comprises N-type drift region 43, is positioned at the P type well region 31 of N-type drift region 43 top outer, be arranged in P type well region 31 and with source metal 51 contacted P
+ Source contact area 33 and N
+ Source contact area 41, has P type doping bar 32 in the N-type drift region 43 of P type well region 31 belows, P type doping bar 32 forms super-junction structure with the N-type drift region 43 on next door, and the N-type drift region 43 of super-junction structure and super-junction structure below consists of the drift region with part super-junction structure; Grid structure is made of gate oxide 21 and polygate electrodes 52, and wherein gate oxide 21 contacts with N-type drift region 43 and P type well region 31, mutually isolates by dielectric layer 23 between polygate electrodes 52 and the source metal 51.
Described terminal structure 12 comprises N-type drift region 43, N-type doping bar 42, N-type heavy doping drain contact region 44 and media slot 24; Top one side of N-type drift region 43 is the N-type heavy doping drain contact region 44 that link to each other with drain metal 53 in the terminal structure 12, N-type doping bar 42 is arranged in the N-type drift region 43 of N-type heavy doping drain contact region 44 belows, and contacts with N-type heavy doping drain contact region 44; Media slot 24 is between the P type doping bar 32 of N-type doping bar 42 and described vertically super knot structure cell 11, media slot 24 and reserve part N-type drift region 43, N-type doping bar 42 below isolate by dielectric layer 23 between drain metal 53 and the source metal 51 mutually as current channel.
The present invention is by 43 introducing longitudinal P type doping bars 32, N-type doping bar 42 and media slot 24 in the N-type drift region, reduce chip area, alleviate the contradictory relation of conduction resistance and device withstand voltage, simultaneously, P type doping bar 32 assisted depletion N-type drift regions 43, thus N-type drift region 43 concentration that increase device reduce the device conduction resistance.In addition, adopt thin oxygen buried layer 25(thickness to be no more than 0.5 micron) can effectively slow down the device self-heating effect.Adopt the present invention can make the power device of various function admirables, have the characteristics of high withstand voltage, high integration, low conduction loss, low self-heating effect.
The horizontal high voltage power device of the SOI of Ultra-low Specific conducting resistance provided by the invention comprises structure cell 11, terminal structure 12; P type doping bar 32 and N-type type drift region 43 consist of vertical super-junction structure in the structure cell 11, alleviate the contradictory relation between device electric breakdown strength and the conduction resistance; Shown in Fig. 2 (b), device can integrated one or more cellulars, the cellular of a plurality of parallel connections can share a terminal structure 12, and draw by drain metal 53, the drain electrode of device is laterally drawn, not only greatly reduce domain, reduce process costs, and can be integrated with custom circuit, applying flexible;
The horizontal high voltage power device of the SOI of Ultra-low Specific conducting resistance provided by the invention can adopt the structures such as planar gate, groove grid or V-type grid.The opposite planar grid, it is less that the cellular of selection groove gate device can be done, because the groove grid have longitudinal channel, channel length is determined by the junction depth of P type well region 31, and the channel length of planar gate is by the length decision of P type well region 31.
Fig. 3 is the horizontal high voltage power device transverse electric field of the planar gate type SOI schematic diagram with Ultra-low Specific conducting resistance provided by the invention, because the present invention introduces P type doping bar 32 and N-type doping bar 42, shown in Fig. 3 (a), the introducing of P type doping bar 32 has increased the concentration of N-type drift region 43, thereby reduce the conduction resistance of device, simultaneously, the N-type doping bar 42 of high concentration reduces the conduction resistance of device for ON state current provides low impedance path.During OFF state, the silicon electric field at the new electric field spike of introducing at the interface of N-type drift region 43 and media slot 24, is improved in P type doping bar 32 assisted depletion N-type drift regions 43, thereby so that media slot 24 electric fields strengthen, then improves the puncture voltage of device.The P type doping bar 32 that the present invention introduces is introduced a large amount of ionization acceptor electric charges in media slot 24 left sides, modulated media groove 24 internal electric field lines avoid electric field line in the source electrode concentrations in the distribution of source, prevent that device from puncturing at the A point in advance.Same, the N-type doping bar 42 that the present invention introduces is introduced a large amount of ionized donor electric charges on media slot 24 right sides, and modulated media groove 24 internal electric field lines avoid electric field line in the drain electrode concentrations in the distribution of drain terminal, prevent that device from puncturing at the B point in advance, thereby improve the withstand voltage of device.So compare the horizontal high voltage power device of traditional SOI without P type doping bar 32 and N-type doping bar 42, shown in Fig. 3 (b), the electric field of media slot 24 has remarkable increase.
Fig. 4 is the longitudinal electric field distribution map with horizontal high voltage power device of planar gate type SOI of Ultra-low Specific conducting resistance provided by the invention.Strengthen theoretical electric field by enhancing oxygen buried layer 25 based on bulk electric field and improve the vertically withstand voltage of the horizontal high voltage power device of SOI.The electromotive force of oxygen buried layer 25 is by the vertical super-junction structure clamper in source electrode below, cause oxygen buried layer 25 upper and lower surfaces to accumulate respectively a large amount of holes and electronics, the direction of an electric field that these electron hole pairs produce is identical with the direction of an electric field of N-type drift region 43 and substrate 34, so that the common SOI lateral high-voltage device of the Thickness Ratio of oxygen buried layer 25 is thinner, slow down the self-heating effect of device.Because two of oxygen buried layer 25 have the inversion charge accumulation at the interface, so that oxygen buried layer 25 electric fields increase.
Fig. 5 is the horizontal high voltage power device Potential Distributing of SOI schematic diagram.Figure (a) is the potential profile with horizontal high voltage power device of planar gate type SOI of Ultra-low Specific conducting resistance provided by the invention, select media slot 24 and source electrode contact point A, with P type doping bar 32 contact point B, with drain electrode contact point C and media slot 24 edge's point D, to find out that Potential Distributing is more even, the potential line distribution of the similar vertical super-junction structure of potential lines under source electrode and the drain electrode.This is because the P type doping bar 32 that the present invention introduces and N-type drift region 43 consist of vertical super-junction structure, and P type doping bar 32 assisted depletion N-type drift regions 43, and introduce a longitudinal electric field peak value can the optimised devices longitudinal electric field, improves device vertically withstand voltage.The P type doping bar 32 of depletion type and N-type doping bar 42 are respectively N-type drift region 43 ionized donor and ionization acceptor are provided, and have optimized the Electric Field Distribution of media slot 24, alleviate N-type drift region 43 electric fields in source and drain terminal concentrations, thereby increase device withstand voltage.Figure (b) is the potential profile of the horizontal high voltage power device of traditional SOI, A ', B ', C ', D ' correspond respectively to A, B, C, D 4 points of structure of the present invention, compare with the present invention, the potential lines of device is more concentrated at an A ', D ', more past body built-in potential line distributes more sparse, causes easily puncturing at the interface in source electrode and drain electrode and groove oxide layer 43 of device.Simulation result surface, device electric breakdown strength of the present invention can be up to 684V, and the puncture voltage of traditional structure only has 389V.
Fig. 6 is that the horizontal high voltage power device of SOI is around the silicon distribution map of the electric field on groove oxide layer 24 surfaces.A, B, C, D are 4 selected among Fig. 5 points, and A ', B ', C ', D ' correspond respectively to A, B, C, D 4 points in the structure of the present invention.P type doping bar 32 assisted depletion N-type drift region 43 when the device OFF state that the present invention introduces, at the new electric field spike of introducing at the interface of N-type drift region 43 and media slot 24, improve the silicon electric field, thereby so that thimble groove 24 electric fields strengthen, then improve the puncture voltage of device, so compare with the horizontal high voltage power device of traditional SOI, device withstand voltage is significantly improved.
Fig. 7 is the schematic diagram that concerns of the horizontal high voltage power device conduction resistance of SOI and puncture voltage.The present invention is 43 interior introducing media slot 24 in the N-type drift region, media slot 24 can strengthen electric field strength, media slot 24 forms folding drift region simultaneously, dwindle active region area, conduction resistance significantly reduces, simultaneously, P type doping bar 32 assisted depletion N-type drift regions 43, thus the concentration that increases device N-type drift region 43 reduces conduction resistance.Simultaneously, the N-type doping bar 42 of high concentration further reduces the conduction resistance of device for ON state current provides low impedance path.Simulation result shows that the conduction resistance of device can be less than 60m Ω cm
2, optimal voltage can surpass 650V, and this has broken traditional silicon limit.
Fig. 8 (a) is the horizontal high-voltage power device structure profile of shallow groove gate type SOI of the Ultra-low Specific conducting resistance of an integrated cellular provided by the invention.Device also can integrated a plurality of cellulars, shown in Fig. 8 (b).Cellular 11 adopts P type doping bar 32 and N-type drift region 43 to consist of vertical super-junction structure; Polygate electrodes 52 peripheries are groove gate oxides 22; Terminal structure 12 comprises N-type doping bar 42 and media slot 24; Drain metal 53 is positioned at N
+Above the drain contact region 44, mutually isolate by dielectric layer 23 between drain metal 53 and the source metal 51.Except the grid structure is different, other of device consist of all can adopt the technique realization identical with Fig. 2.
Fig. 9 (a) is the horizontal high-voltage power device structure profile of dark groove gate type SOI of the Ultra-low Specific conducting resistance of an integrated cellular provided by the invention.Device also can integrated a plurality of cellulars, shown in Fig. 9 (b).Cellular 11 adopts P type doping bar 32 and N-type drift region 43 to consist of vertical super-junction structure; Polygate electrodes 52 peripheries are groove gate oxides 22, with the horizontal high voltage power device difference of shallow slot grid SOI of Fig. 8 Ultra-low Specific conducting resistance be that groove gate oxide 22 is darker, contact with oxygen buried layer 25; Terminal structure 12 comprises N-type doping bar 42 and media slot 24; Drain metal 53 is positioned at N
+Above the drain contact region 44, mutually isolate by dielectric layer 23 between drain metal 53 and the source metal 51.Adopt the concentration that deep trouth grid structure can N-type drift region 43, thereby further reduce conduction resistance.In addition, groove gate oxide 22 is linked to each other with oxygen buried layer, can avoid the wedge angle of groove gate oxide 22 bottoms to puncture in advance.But, the negative effect that this will bring device electric breakdown strength to reduce.Except the grid structure is different, other of device consist of all can adopt the technique realization identical with Fig. 2.
Figure 10 (a) is the section of structure of the integrated cellular of the horizontal high voltage power device of planar gate SOI of Ultra-low Specific conducting resistance provided by the invention, and the unique difference of the horizontal high voltage power device of planar gate SOI of the Ultra-low Specific conducting resistance that this device and Fig. 2 provide is to adopt P
+Drain contact region 35 forms the LIGBT structure, and this device possesses the good characteristic of LIGBT.Device also can integrated a plurality of cellulars, shown in Figure 10 (b).
Claims (4)
1. the horizontal high voltage power device of the SOI of a Ultra-low Specific conducting resistance comprises and at least one or more than one vertically surpassing ties structure cell (11) and terminal structure (12); A plurality of vertically super knot structure cells (11) are horizontal or Width is together tightly packed along device, form whole vertically super knot structure cell; Described terminal structure (12) is positioned at the outside or the periphery of whole structure cell; Described vertically super knot structure cell (11) and terminal structure (12) are made on the soi layer (26) of SOI material, described SOI material comprises substrate layer (34), oxygen buried layer (25) and soi layer (26), and wherein oxygen buried layer (25) is positioned in the middle of substrate layer (34) and the soi layer (26);
Described vertically super knot structure cell (11) comprises N-type drift region (43), is positioned at the P type well region (31) of N-type drift region (43) top outer, be arranged in P type well region (31) and with the contacted P of source metal (51)
+Source contact area (33) and N
+Source contact area (41), has P type doping bar (32) in the N-type drift region (43) of P type well region (31) below, P type doping bar (32) forms super-junction structure with the N-type drift region (43) on next door, and the N-type drift region (43) of super-junction structure and super-junction structure below consists of the drift region with part super-junction structure; Grid structure is made of gate oxide (21) and polygate electrodes (52), wherein gate oxide (21) contacts with N-type drift region (43) and P type well region (31), mutually isolates by dielectric layer (23) between polygate electrodes (52) and the source metal (51);
Described terminal structure (12) comprises N-type drift region (43), N-type doping bar (42), N-type heavy doping drain contact region (44) and media slot (24); Top one side of N-type drift region (43) is the N-type heavy doping drain contact region (44) that links to each other with drain metal (53) in the terminal structure (12), N-type doping bar (42) is arranged in the N-type drift region (43) of N-type heavy doping drain contact region (44) below, and contacts with N-type heavy doping drain contact region (44); Media slot (24) is positioned between the P type doping bar (32) of N-type doping bar (42) and described vertically super knot structure cell (11), media slot (24) and N-type doping bar (42) reserve part N-type drift region, below (43) isolate by dielectric layer (23) between drain metal (53) and the source metal (51) mutually as current channel.
2. the horizontal high voltage power device of the SOI of Ultra-low Specific conducting resistance according to claim 1 is characterized in that, described grid structure is planar gate, groove grid or V-type grid.
3. the horizontal high voltage power device of the SOI of Ultra-low Specific conducting resistance according to claim 1 is characterized in that, the thickness of the oxygen buried layer of described SOI material (25) is less than the oxygen buried layer thickness of SOI material in the existing horizontal high-voltage power semiconductor device of SOI.
4. the horizontal high voltage power device of the SOI of Ultra-low Specific conducting resistance according to claim 3 is characterized in that, the thickness of the oxygen buried layer of described SOI material (25) is no more than 0.5 micron.
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| CN103441147A (en) * | 2013-08-09 | 2013-12-11 | 电子科技大学 | Lateral direction SOI power semiconductor device |
| CN103715238A (en) * | 2013-12-30 | 2014-04-09 | 电子科技大学 | Transverse high-voltage component with ultra-low specific on-resistance |
| CN103762232A (en) * | 2013-12-31 | 2014-04-30 | 上海新傲科技股份有限公司 | High-voltage transistor with insulation buried layer |
| CN104201194A (en) * | 2014-08-26 | 2014-12-10 | 电子科技大学 | High-voltage power device with ultra-low specific on-resistance characteristic |
| CN107134481A (en) * | 2017-05-08 | 2017-09-05 | 工业和信息化部电子第五研究所华东分所 | A kind of electronic component and preparation method thereof |
| CN108292677A (en) * | 2016-09-17 | 2018-07-17 | 电子科技大学 | A kind of folder-type terminal with internal field plate |
| CN111312707A (en) * | 2020-02-27 | 2020-06-19 | 电子科技大学 | Power semiconductor device with low specific on-resistance |
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| CN108292677A (en) * | 2016-09-17 | 2018-07-17 | 电子科技大学 | A kind of folder-type terminal with internal field plate |
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| CN111312707B (en) * | 2020-02-27 | 2022-11-04 | 电子科技大学 | Power semiconductor device with low specific on-resistance |
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