CN102831091B - Serial port-based ship radar echo data collecting method - Google Patents
Serial port-based ship radar echo data collecting method Download PDFInfo
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Abstract
The invention discloses a serial port-based ship radar echo data collecting method, wherein a data processing unit collects radar echo data generated by a radar antenna unit. The method is characterized in that two DMA (Direct Memory Access) channels are arranged for transmission of the radar echo data; and two buffer areas are correspondingly arranged for caching the radar echo data, and the two DMA channels can transmit the radar echo data alternately. The method has the advantages that through the use of the dual channel DMA transmission and the double buffering mechanism, the problem of serial port data overflow is effectively solved, losing of the radar echo data is avoided, the correctness and stability of radar echo data collection is ensured, so that high-speed, continuous radar echo data can be timely and highly efficiently transmitted to the data processing unit for processing.
Description
Technical field
The present invention relates to a kind of disposal route of radar return data, especially relate to a kind of acquisition method of the marine radar echo data based on serial ports.
Background technology
Marine radar is one of necessary equipment of modern ships navigational system, and its Main Function is marine navigation and detection, avoids marine barrier.Modern marine radar is toward the future development of high resolving power, large display screen, and cause radar return data volume to significantly improve, improve radar return message transmission rate accordingly, meanwhile, radar return data are continual data stream.Radar return data are the most important data of whole radar system, and all Radar Algorithms and process are all carried out based on radar return data, gather radar return data therefore reliably, efficiently and seem of crucial importance.
The workflow of marine radar: the antenna element of radar produces radar return data, radar return data transfer to data processing unit, data processing unit carries out Acquire and process to radar return data, and the data processed the most at last are sent to display unit and carry out radar image display.
The acquisition method of traditional marine radar echo data uses a direct memory access (DMA) (Direct Memory Access, i.e. DMA) passage, the collection of radar return data is carried out in a core buffer, by DMA passage by radar return data from Serial Port Transmission in core buffer, but produce DMA from the data of the complete core buffer size of DMA channel transfer to interrupt carrying out needing between next data transfer to perform interrupt processing function to enable DMA, once the execution time of interrupt processing function is long, radar return data then in serial ports can not be transferred in core buffer in time, serial ports can be there is and receive spilling, cause the loss of radar return data.
Summary of the invention
Technical matters to be solved by this invention is to provide a kind of acquisition method of the marine radar echo data based on serial ports, and it can prevent serial ports from receiving spilling, thus effectively avoids the loss of radar return data.
The present invention solves the problems of the technologies described above adopted technical scheme: a kind of acquisition method of the marine radar echo data based on serial ports, data processing unit gathers the radar return data that radar antenna unit produces, described data processing unit comprises serial ports, dma controller, internal memory and data processing module, described serial ports comprises reception FIFO(first-in first-out memory buffer), radar return data transfer to internal memory by dma controller from reception FIFO, specifically comprise the following steps:
S1. serial ports is configured to DMA receiving mode, the threshold value receiving FIFO is set;
S2., the first identical buffer zone of two capacity and the second buffer zone are set in internal memory;
S3., two DMA passages are set in dma controller respectively as a DMA passage and the 2nd DMA passage, the source address of the source address of the one DMA passage and the 2nd DMA passage is all set to the address receiving FIFO, the destination address of the one DMA passage is set to the first address of the first buffer zone, the destination address of the 2nd DMA passage is set to the first address of the second buffer zone, the addressing mode of the addressing mode of the destination address of a DMA passage and the destination address of the 2nd DMA passage is all configured to increase progressively addressing mode;
S4. enable serial ports, an enable DMA passage, start data processing unit, data processing unit starts to gather radar return data, receives FIFO and starts receiving radar echo data;
S5. a DMA passage starts the radar return data received in FIFO to transfer in the first buffer zone;
S6. when radar return data fill up the first buffer zone, 2nd DMA passage starts the radar return data received in FIFO to transfer in the second buffer zone, radar return data simultaneously in the first buffer zone transfer to data processing module and process, and the time that radar return data fill up the second buffer zone is longer than the time that data processing module processes the radar return data in the first buffer zone;
S7. when radar return data fill up the second buffer zone, one DMA passage starts the radar return data received in FIFO to transfer in the first buffer zone, radar return data simultaneously in the second buffer zone transfer to data processing module and process, and the time that radar return data fill up the first buffer zone is longer than the time that data processing module processes the radar return data in the second buffer zone;
S8. circulation performs S6 ~ S7, until data processing unit stops gathering radar return data.
The concrete steps of step S5 are as follows:
S5-is 1.. and when the capacity receiving the radar return data in FIFO reaches set threshold value, serial ports sends DMA to dma controller and receives request;
S5-is after 2. .DMA controller receives the request of serial ports, and a DMA passage starts to transmit radar return data in the first buffer zone from reception FIFO, when radar return data do not fill up the first buffer zone, returns step S5-and 1. continues to perform; When radar return data fill up the first buffer zone, perform step S6.
The concrete steps of step S6 are as follows:
S6-is 1.. and when radar return data fill up the first buffer zone, enable 2nd DMA passage, closes a DMA passage;
S6-is 2.. and when the capacity receiving the radar return data in FIFO reaches set threshold value, serial ports sends DMA to dma controller and receives request;
S6-is after 3. .DMA controller receives the request of serial ports, 2nd DMA passage starts to transmit radar return data in the second buffer zone from reception FIFO, data processing module starts to process the radar return data in the first buffer zone simultaneously, when radar return data do not fill up the second buffer zone, return step S6-and 2. continue to perform; When radar return data fill up the second buffer zone, perform step S7.
The concrete steps of step S7 are as follows:
S7-is 1.. and when radar return data fill up the second buffer zone, an enable DMA passage, closes the 2nd DMA passage;
S7-is 2.. and when the capacity receiving the radar return data in FIFO reaches set threshold value, serial ports sends DMA to dma controller and receives request;
S7-is after 3. .DMA controller receives the request of serial ports, one DMA passage starts to transmit radar return data in the first buffer zone from reception FIFO, data processing module starts to process the radar return data in the second buffer zone simultaneously, when radar return data do not fill up the first buffer zone, return step S7-and 2. continue to perform; When radar return data fill up the first buffer zone, perform step S8.
Compared with prior art, the invention has the advantages that and applied for that two DMA passages carry out data transmission, be assigned with the radar return data that two buffer zones receive for buffer memory serial ports, two DMA passages can alternate transport radar return data, parallel owing to processing (execution containing interrupt processing function) and DMA channel transfer radar return data to the radar return data in buffer zone, therefore interrupt processing function timing does not affect the reception of radar return data, thus efficiently solve the problem of serial data spilling, avoid the loss of radar return data, the use of binary channels DMA transmission and double buffers ensure that correctness and the stability of radar return data acquisition, and the radar return data make at a high speed, continued can be transferred in data processing unit in time, efficiently and process.
Accompanying drawing explanation
Fig. 1 is the structural principle block diagram of data processing unit in the present invention;
Fig. 2 is the schematic flow sheet of the acquisition method of the marine radar echo data that the present invention is based on serial ports.
Embodiment
Below in conjunction with accompanying drawing embodiment, the present invention is described in further detail.
Embodiment one: as shown in the figure, a kind of acquisition method of the marine radar echo data based on serial ports, data processing unit gathers the radar return data that radar antenna unit produces, described data processing unit comprises serial ports, dma controller, internal memory and data processing module, described serial ports comprises reception FIFO, radar return data transfer to internal memory by dma controller from reception FIFO, serial ports is the Mcbsp serial ports of TI company, the capacity of the reception FIFO (first-in first-out memory buffer) of serial ports is 128 × 32bit, the clock frequency of serial ports is 48MHz, on radar, unit sends 3000 frame radar return data p.s., every frame radar return size of data is 1KB, therefore radar return data rate is 3MB/s, specifically comprise the following steps:
S1. serial ports is configured to DMA receiving mode, arrange the threshold value receiving FIFO, threshold value is set to 64 × 32bit;
S2. in internal memory, arrange the first identical buffer zone of two capacity and the second buffer zone, the capacity setting of the first buffer zone and the second buffer zone is 24KB;
S3., two DMA passages are set in dma controller respectively as a DMA passage and the 2nd DMA passage, the source address of the source address of the one DMA passage and the 2nd DMA passage is all set to the address receiving FIFO, the destination address of the one DMA passage is set to the first address of the first buffer zone, the destination address of the 2nd DMA passage is set to the first address of the second buffer zone, the addressing mode of the addressing mode of the destination address of a DMA passage and the destination address of the 2nd DMA passage is all configured to increase progressively addressing mode;
S4. enable serial ports, an enable DMA passage, start data processing unit, data processing unit starts to gather radar return data, receives FIFO and starts receiving radar echo data;
S5. a DMA passage starts the radar return data received in FIFO to transfer in the first buffer zone;
S6. when radar return data fill up the first buffer zone, 2nd DMA passage starts the radar return data received in FIFO to transfer in the second buffer zone, radar return data simultaneously in the first buffer zone transfer to data processing module and process, the time that radar return data fill up the second buffer zone is longer than the time that data processing module processes the radar return data in the first buffer zone, and the 2nd DMA passage fills up the second buffer zone needs
then data processing module needs the radar return data that process in 8ms in the first buffer zone;
S7. when radar return data fill up the second buffer zone, one DMA passage starts the radar return data received in FIFO to transfer in the first buffer zone, radar return data simultaneously in the second buffer zone transfer to data processing module and process, the time that radar return data fill up the first buffer zone is longer than the time that data processing module processes the radar return data in the second buffer zone, and a DMA passage fills up the first buffer zone needs
then data processing module needs the radar return data that process in 8ms in the second buffer zone;
S8. circulation performs S6 ~ S7, until data processing unit stops gathering radar return data.
The concrete steps of step S5 are as follows:
S5-is 1.. and when the capacity receiving the radar return data in FIFO reaches 64 × 32bit, serial ports sends DMA to dma controller and receives request;
S5-is after 2. .DMA controller receives the request of serial ports, and a DMA passage starts to transmit radar return data in the first buffer zone from reception FIFO, when radar return data do not fill up the first buffer zone, returns step S5-and 1. continues to perform; When radar return data fill up the first buffer zone, perform step S6.
The concrete steps of step S6 are as follows:
S6-is 1.. and when radar return data fill up the first buffer zone (i.e. a DMA channel transfer complete 24KB radar return data to the first buffer zone), enable 2nd DMA passage, closes a DMA passage;
S6-is 2.. and when the capacity receiving the radar return data in FIFO reaches 64 × 32bit, serial ports sends DMA to dma controller and receives request;
S6-is after 3. .DMA controller receives the request of serial ports, 2nd DMA passage starts to transmit radar return data in the second buffer zone from reception FIFO, data processing module starts to process the radar return data in the first buffer zone simultaneously, when radar return data do not fill up the second buffer zone, return step S6-and 2. continue to perform; When radar return data fill up the second buffer zone, perform step S7.
The concrete steps of step S7 are as follows:
S7-is 1.. and when radar return data fill up the second buffer zone (i.e. the 2nd DMA channel transfer complete 24KB radar return data to the second buffer zone), an enable DMA passage, closes the 2nd DMA passage;
S7-is 2.. and when the capacity receiving the radar return data in FIFO reaches 64 × 32bit, serial ports sends DMA to dma controller and receives request;
S7-is after 3. .DMA controller receives the request of serial ports, one DMA passage starts to transmit radar return data in the first buffer zone from reception FIFO, data processing module starts to process the radar return data in the second buffer zone simultaneously, when radar return data do not fill up the first buffer zone, return step S7-and 2. continue to perform; When radar return data fill up the first buffer zone, perform step S8.
Embodiment two: as shown in the figure, a kind of acquisition method of the marine radar echo data based on serial ports, data processing unit gathers the radar return data that radar antenna unit produces, described data processing unit comprises serial ports, dma controller, internal memory and data processing module, described serial ports comprises reception FIFO, radar return data transfer to internal memory by dma controller from reception FIFO, serial ports is the Mcbsp serial ports of TI company, the capacity of the reception FIFO (first-in first-out memory buffer) of serial ports is 128 × 32bit, the clock frequency of serial ports is 48MHz, on radar, unit sends 3000 frame radar return data p.s., every frame radar return size of data is 1KB, therefore radar return data rate is 3MB/s, specifically comprise the following steps:
S1. serial ports is configured to DMA receiving mode, arrange the threshold value receiving FIFO, threshold value is set to 32 × 32bit;
S2. in internal memory, arrange the first identical buffer zone of two capacity and the second buffer zone, the capacity setting of the first buffer zone and the second buffer zone is 24KB;
S3., two DMA passages are set in dma controller respectively as a DMA passage and the 2nd DMA passage, the source address of the source address of the one DMA passage and the 2nd DMA passage is all set to the address receiving FIFO, the destination address of the one DMA passage is set to the first address of the first buffer zone, the destination address of the 2nd DMA passage is set to the first address of the second buffer zone, the addressing mode of the addressing mode of the destination address of a DMA passage and the destination address of the 2nd DMA passage is all configured to increase progressively addressing mode;
S4. enable serial ports, an enable DMA passage, start data processing unit, data processing unit starts to gather radar return data, receives FIFO and starts receiving radar echo data;
S5. a DMA passage starts the radar return data received in FIFO to transfer in the first buffer zone;
S6. when radar return data fill up the first buffer zone, 2nd DMA passage starts the radar return data received in FIFO to transfer in the second buffer zone, radar return data simultaneously in the first buffer zone transfer to data processing module and process, the time that radar return data fill up the second buffer zone is longer than the time that data processing module processes the radar return data in the first buffer zone, and the 2nd DMA passage fills up the second buffer zone needs
then data processing module needs the radar return data that process in 8ms in the first buffer zone;
S7. when radar return data fill up the second buffer zone, one DMA passage starts the radar return data received in FIFO to transfer in the first buffer zone, radar return data simultaneously in the second buffer zone transfer to data processing module and process, the time that radar return data fill up the first buffer zone is longer than the time that data processing module processes the radar return data in the second buffer zone, and a DMA passage fills up the first buffer zone needs
then data processing module needs the radar return data that process in 8ms in the second buffer zone;
S8. circulation performs S6 ~ S7, until data processing unit stops gathering radar return data.
The concrete steps of step S5 are as follows:
S5-is 1.. and when the capacity receiving the radar return data in FIFO reaches 32 × 32bit, serial ports sends DMA to dma controller and receives request;
S5-is after 2. .DMA controller receives the request of serial ports, and a DMA passage starts to transmit radar return data in the first buffer zone from reception FIFO, when radar return data do not fill up the first buffer zone, returns step S5-and 1. continues to perform; When radar return data fill up the first buffer zone, perform step S6.
The concrete steps of step S6 are as follows:
S6-is 1.. and when radar return data fill up the first buffer zone (i.e. a DMA channel transfer complete 24KB radar return data to the first buffer zone), enable 2nd DMA passage, closes a DMA passage;
S6-is 2.. and when the capacity receiving the radar return data in FIFO reaches 32 × 32bit, serial ports sends DMA to dma controller and receives request;
S6-is after 3. .DMA controller receives the request of serial ports, 2nd DMA passage starts to transmit radar return data in the second buffer zone from reception FIFO, data processing module starts to process the radar return data in the first buffer zone simultaneously, when radar return data do not fill up the second buffer zone, return step S6-and 2. continue to perform; When radar return data fill up the second buffer zone, perform step S7.
The concrete steps of step S7 are as follows:
S7-is 1.. and when radar return data fill up the second buffer zone (i.e. the 2nd DMA channel transfer complete 24KB radar return data to the second buffer zone), an enable DMA passage, closes the 2nd DMA passage;
S7-is 2.. and when the capacity receiving the radar return data in FIFO reaches 32 × 32bit, serial ports sends DMA to dma controller and receives request;
S7-is after 3. .DMA controller receives the request of serial ports, one DMA passage starts to transmit radar return data in the first buffer zone from reception FIFO, data processing module starts to process the radar return data in the second buffer zone simultaneously, when radar return data do not fill up the first buffer zone, return step S7-and 2. continue to perform; When radar return data fill up the first buffer zone, perform step S8.
Embodiment three: as shown in the figure, a kind of acquisition method of the marine radar echo data based on serial ports, data processing unit gathers the radar return data that radar antenna unit produces, described data processing unit comprises serial ports, dma controller, internal memory and data processing module, described serial ports comprises reception FIFO, radar return data transfer to internal memory by dma controller from reception FIFO, serial ports is the Mcbsp serial ports of TI company, the capacity of the reception FIFO (first-in first-out memory buffer) of serial ports is 128 × 32bit, the clock frequency of serial ports is 48MHz, on radar, unit sends 3000 frame radar return data p.s., every frame radar return size of data is 1KB, therefore radar return data rate is 3MB/s, specifically comprise the following steps:
S1. serial ports is configured to DMA receiving mode, arrange the threshold value receiving FIFO, threshold value is set to 96 × 32bit;
S2. in internal memory, arrange the first identical buffer zone of two capacity and the second buffer zone, the capacity setting of the first buffer zone and the second buffer zone is 24KB;
S3., two DMA passages are set in dma controller respectively as a DMA passage and the 2nd DMA passage, the source address of the source address of the one DMA passage and the 2nd DMA passage is all set to the address receiving FIFO, the destination address of the one DMA passage is set to the first address of the first buffer zone, the destination address of the 2nd DMA passage is set to the first address of the second buffer zone, the addressing mode of the addressing mode of the destination address of a DMA passage and the destination address of the 2nd DMA passage is all configured to increase progressively addressing mode;
S4. enable serial ports, an enable DMA passage, start data processing unit, data processing unit starts to gather radar return data, receives FIFO and starts receiving radar echo data;
S5. a DMA passage starts the radar return data received in FIFO to transfer in the first buffer zone;
S6. when radar return data fill up the first buffer zone, 2nd DMA passage starts the radar return data received in FIFO to transfer in the second buffer zone, radar return data simultaneously in the first buffer zone transfer to data processing module and process, the time that radar return data fill up the second buffer zone is longer than the time that data processing module processes the radar return data in the first buffer zone, and the 2nd DMA passage fills up the second buffer zone needs
then data processing module needs the radar return data that process in 8ms in the first buffer zone;
S7. when radar return data fill up the second buffer zone, one DMA passage starts the radar return data received in FIFO to transfer in the first buffer zone, radar return data simultaneously in the second buffer zone transfer to data processing module and process, the time that radar return data fill up the first buffer zone is longer than the time that data processing module processes the radar return data in the second buffer zone, and a DMA passage fills up the first buffer zone needs
then data processing module needs the radar return data that process in 8ms in the second buffer zone;
S8. circulation performs S6 ~ S7, until data processing unit stops gathering radar return data.
The concrete steps of step S5 are as follows:
S5-is 1.. and when the capacity receiving the radar return data in FIFO reaches 96 × 32bit, serial ports sends DMA to dma controller and receives request;
S5-is after 2. .DMA controller receives the request of serial ports, and a DMA passage starts to transmit radar return data in the first buffer zone from reception FIFO, when radar return data do not fill up the first buffer zone, returns step S5-and 1. continues to perform; When radar return data fill up the first buffer zone, perform step S6.
The concrete steps of step S6 are as follows:
S6-is 1.. and when radar return data fill up the first buffer zone (i.e. a DMA channel transfer complete 24KB radar return data to the first buffer zone), enable 2nd DMA passage, closes a DMA passage;
S6-is 2.. and when the capacity receiving the radar return data in FIFO reaches 96 × 32bit, serial ports sends DMA to dma controller and receives request;
S6-is after 3. .DMA controller receives the request of serial ports, 2nd DMA passage starts to transmit radar return data in the second buffer zone from reception FIFO, data processing module starts to process the radar return data in the first buffer zone simultaneously, when radar return data do not fill up the second buffer zone, return step S6-and 2. continue to perform; When radar return data fill up the second buffer zone, perform step S7.
The concrete steps of step S7 are as follows:
S7-is 1.. and when radar return data fill up the second buffer zone (i.e. the 2nd DMA channel transfer complete 24KB radar return data to the second buffer zone), an enable DMA passage, closes the 2nd DMA passage;
S7-is 2.. and when the capacity receiving the radar return data in FIFO reaches 96 × 32bit, serial ports sends DMA to dma controller and receives request;
S7-is after 3. .DMA controller receives the request of serial ports, one DMA passage starts to transmit radar return data in the first buffer zone from reception FIFO, data processing module starts to process the radar return data in the second buffer zone simultaneously, when radar return data do not fill up the first buffer zone, return step S7-and 2. continue to perform; When radar return data fill up the first buffer zone, perform step S8.
Claims (3)
1. the acquisition method based on the marine radar echo data of serial ports, data processing unit gathers the radar return data that radar antenna unit produces, described data processing unit comprises serial ports, dma controller, internal memory and data processing module, described serial ports comprises reception FIFO, radar return data transfer to internal memory by dma controller from reception FIFO, specifically comprise the following steps:
S1. serial ports is configured to DMA receiving mode, the threshold value receiving FIFO is set;
S2., the first identical buffer zone of two capacity and the second buffer zone are set in internal memory;
S3., two DMA passages are set in dma controller respectively as a DMA passage and the 2nd DMA passage, the source address of the source address of the one DMA passage and the 2nd DMA passage is all set to the address receiving FIFO, the destination address of the one DMA passage is set to the first address of the first buffer zone, the destination address of the 2nd DMA passage is set to the first address of the second buffer zone, the addressing mode of the addressing mode of the destination address of a DMA passage and the destination address of the 2nd DMA passage is all configured to increase progressively addressing mode;
S4. enable serial ports, an enable DMA passage, start data processing unit, data processing unit starts to gather radar return data, receives FIFO and starts receiving radar echo data;
S5. a DMA passage starts the radar return data received in FIFO to transfer in the first buffer zone;
S6. when radar return data fill up the first buffer zone, 2nd DMA passage starts the radar return data received in FIFO to transfer in the second buffer zone, radar return data simultaneously in the first buffer zone transfer to data processing module and process, and the time that radar return data fill up the second buffer zone is longer than the time that data processing module processes the radar return data in the first buffer zone;
S7. when radar return data fill up the second buffer zone, one DMA passage starts the radar return data received in FIFO to transfer in the first buffer zone, radar return data simultaneously in the second buffer zone transfer to data processing module and process, and the time that radar return data fill up the first buffer zone is longer than the time that data processing module processes the radar return data in the second buffer zone;
S8. circulation performs S6 ~ S7, until data processing unit stops gathering radar return data; It is characterized in that the concrete steps of step S5 are as follows:
S5-is 1.. and when the capacity receiving the radar return data in FIFO reaches set threshold value, serial ports sends DMA to dma controller and receives request;
S5-is after 2. .DMA controller receives the request of serial ports, and a DMA passage starts to transmit radar return data in the first buffer zone from reception FIFO, when radar return data do not fill up the first buffer zone, returns step S5-and 1. continues to perform; When radar return data fill up the first buffer zone, perform step S6.
2. the acquisition method of a kind of marine radar echo data based on serial ports according to claim 1, is characterized in that the concrete steps of step S6 are as follows:
S6-is 1.. and when radar return data fill up the first buffer zone, enable 2nd DMA passage, closes a DMA passage;
S6-is 2.. and when the capacity receiving the radar return data in FIFO reaches set threshold value, serial ports sends DMA to dma controller and receives request;
S6-is after 3. .DMA controller receives the request of serial ports, 2nd DMA passage starts to transmit radar return data in the second buffer zone from reception FIFO, data processing module starts to process the radar return data in the first buffer zone simultaneously, when radar return data do not fill up the second buffer zone, return step S6-and 2. continue to perform; When radar return data fill up the second buffer zone, perform step S7.
3. the acquisition method of a kind of marine radar echo data based on serial ports according to claim 2, is characterized in that the concrete steps of step S7 are as follows:
S7-is 1.. and when radar return data fill up the second buffer zone, an enable DMA passage, closes the 2nd DMA passage;
S7-is 2.. and when the capacity receiving the radar return data in FIFO reaches set threshold value, serial ports sends DMA to dma controller and receives request;
S7-is after 3. .DMA controller receives the request of serial ports, one DMA passage starts to transmit radar return data in the first buffer zone from reception FIFO, data processing module starts to process the radar return data in the second buffer zone simultaneously, when radar return data do not fill up the first buffer zone, return step S7-and 2. continue to perform; When radar return data fill up the first buffer zone, perform step S8.
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| CN104637483A (en) * | 2015-02-03 | 2015-05-20 | 中国电子科技集团公司第五十八研究所 | Multichannel-based low-speed voice coding/decoding system |
| CN106649140A (en) * | 2016-12-29 | 2017-05-10 | 深圳前海弘稼科技有限公司 | Data processing method, apparatus and system |
| CN108509277A (en) * | 2018-04-03 | 2018-09-07 | 中国电子科技集团公司第七研究所 | Electronic lock serial ports Asynchronous Reception processing system and method |
| CN109542811B (en) * | 2018-10-15 | 2021-12-07 | 广东宝莱特医用科技股份有限公司 | Data communication processing method |
| CN110633233A (en) * | 2019-06-28 | 2019-12-31 | 中国船舶重工集团公司第七0七研究所 | DMA data transmission processing method based on assembly line |
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