CN108806243A - A kind of traffic flow information acquisition terminal based on Zynq-7000 - Google Patents
A kind of traffic flow information acquisition terminal based on Zynq-7000 Download PDFInfo
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- CN108806243A CN108806243A CN201810371782.8A CN201810371782A CN108806243A CN 108806243 A CN108806243 A CN 108806243A CN 201810371782 A CN201810371782 A CN 201810371782A CN 108806243 A CN108806243 A CN 108806243A
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- G—PHYSICS
- G08—SIGNALLING
- G08G—TRAFFIC CONTROL SYSTEMS
- G08G1/00—Traffic control systems for road vehicles
- G08G1/01—Detecting movement of traffic to be counted or controlled
- G08G1/0104—Measuring and analyzing of parameters relative to traffic conditions
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F18/00—Pattern recognition
- G06F18/20—Analysing
- G06F18/24—Classification techniques
-
- G—PHYSICS
- G08—SIGNALLING
- G08G—TRAFFIC CONTROL SYSTEMS
- G08G1/00—Traffic control systems for road vehicles
- G08G1/01—Detecting movement of traffic to be counted or controlled
- G08G1/0104—Measuring and analyzing of parameters relative to traffic conditions
- G08G1/0125—Traffic data processing
-
- G—PHYSICS
- G08—SIGNALLING
- G08G—TRAFFIC CONTROL SYSTEMS
- G08G1/00—Traffic control systems for road vehicles
- G08G1/01—Detecting movement of traffic to be counted or controlled
- G08G1/017—Detecting movement of traffic to be counted or controlled identifying vehicles
- G08G1/0175—Detecting movement of traffic to be counted or controlled identifying vehicles by photographing vehicles, e.g. when violating traffic rules
-
- G—PHYSICS
- G08—SIGNALLING
- G08G—TRAFFIC CONTROL SYSTEMS
- G08G1/00—Traffic control systems for road vehicles
- G08G1/065—Traffic control systems for road vehicles by counting the vehicles in a section of the road or in a parking area, i.e. comparing incoming count with outgoing count
-
- G—PHYSICS
- G08—SIGNALLING
- G08G—TRAFFIC CONTROL SYSTEMS
- G08G1/00—Traffic control systems for road vehicles
- G08G1/07—Controlling traffic signals
- G08G1/08—Controlling traffic signals according to detected number or speed of vehicles
-
- G—PHYSICS
- G08—SIGNALLING
- G08G—TRAFFIC CONTROL SYSTEMS
- G08G1/00—Traffic control systems for road vehicles
- G08G1/07—Controlling traffic signals
- G08G1/081—Plural intersections under common control
Abstract
The invention discloses a kind of traffic flow information acquisition terminal based on Zynq-7000, belongs to the technical field of traffic control system signal device.The terminal is using Zynq-7000 chips as carrier, it includes video image acquisition sensor to have built, external memory modules, the framework of HDMI display, PS modules are carried out using AXI4 buses and PL inside modules interconnect, devise the IP kernel for accelerating convolutional neural networks to calculate, it is interacted using the MCU real time datas for driving the communication construction of AXI4-VDMA IP kernels and AXI4-DMA IP kernels to realize PS modules and PL modules, by video image acquisition, storage, target detection, traffic statistics, the functions such as display output integrate on single-chip, integrated level is high, the requirement of real-time of magnitude of traffic flow statistics is disclosure satisfy that with the Digital Image Processing of low latency and data transmission at high speed.
Description
Technical field
The invention discloses a kind of traffic flow information acquisition terminal based on Zynq-7000, belongs to traffic control system
The technical field of signal device.
Background technology
As the rapid development of sociaty and economy, urban automobile volume rapidly increases, road traffic flow greatly improves,
Phenomena such as overload operation situation increasingly highlights, vehicular traffic congestion, environmental degradation, Frequent Accidents is on the rise, the magnitude of traffic flow
Monitoring oneself becomes city management problem of people's attention.For this purpose, in urban traffic management, there is an urgent need to by more effective
Technology real-time target detection, magnitude of traffic flow statistics and management and dispatching are carried out to complicated road conditions, to realize intelligent transportation system
System（ITS, Intelligent Transportation System）Control, improve the traffic environment quality in city.
Currently, common magnitude of traffic flow detection technique has：Induction coil detection technique, magnetometer detection technique, ultrasonic wave
Detection technique, passive infrared detector technologies, radar detection technique, computer video detection technique etc..But no matter use wave
Formula detects or the method for magnetic-type detection, testing result are seriously affected by road environment factor, can not provide comprehensively accurate
Traffic information, can only be as a kind of supplementary means of intelligent traffic monitoring system.Road traffic flow based on computer video
Detection technique is measured, small to urban road environmental disruption, detector is flexible for installation and installation maintenance is at low cost, application value bigger,
Application prospect is more wide.Traditional Video Image detection process technology is the live video letter for arriving camera acquisition
Number it is transmitted to processor（PC machine）, after digitized processing, Target detection and identification is carried out, is converted into magnitude of traffic flow letter
Breath data are sent to control command centre.However, general information processor is using CPU even GPU processors, application
There are still more defects in terms of video traffic flow information processing, such as：Image Information Processing machine body volume is huge, price is high
It is expensive；Carry out data transmission that the exclusive datas communication channel such as cable or optical fiber must be laid between camera and processor, makes
The complexity of installation is improved while at great number cost；The increase of detection unit makes network topology wiring more and more multiple
Miscellaneous, system reliability declines therewith and maintenance difficulty increases, it is also possible to cause asking for data transmission delay, distortion even loss
Topic causes system precision and real-time performance to reduce.
Therefore the present invention is developed using the ZYNQ-7Z20 series exploitation plates for being integrated with ARM and FPGA, combines ARM
The easily computing capability of operability and FPGA high degree of parallelism using high-speed data communication interface, and is based on convolutional neural networks
The YOLO of model（You Only Look Once）Real-time algorithm of target detection, in the offline shape in local that hardware resource is limited
Under state, meet the requirement of advanced traveler information systems and intelligent vehicle highway system, realizes that image transmitting quality is lossless, real-time performance
By force, scalability is strong, traffic flow information acquisition terminal of good compatibility.
Invention content
The goal of the invention of the present invention is the deficiency for above-mentioned background technology, provides a kind of friendship based on Zynq-7000
Through-current capacity information acquisition terminal realizes magnitude of traffic flow statistics based on computer vision, solves video traffic traffic statistics
The technical issues of of high cost, real-time is low and poor expandability.
The present invention adopts the following technical scheme that for achieving the above object：
A kind of traffic flow information acquisition terminal based on Zynq-7000 includes mainly video image acquisition sensor, Zynq-
7000 chips, HDMI display, external memory, Zynq-7000 integrated chips PL（Progarmmable Logic can be compiled
Journey logic）Module and PS（Processing System, processing system）Module, video image acquisition sensor are regarded for road conditions
It is simultaneously sent to PL modules by the acquisition of frequency information by MIPI interfaces, and PL modules are used for reception, the operation of video image information
It handles and exports, PS modules are counted for data interaction control and the magnitude of traffic flow, after HDMI display is used for display processing
Video image.
PL modules include mainly：Video input module, convolutional neural networks accelerator, Video Output Modules, video input
Module includes OV_Sensor IP and Video in To AXI4-Stream IP modules, and OV_Sensor IP modules will receive
Video data generate 24 bit data flow is synchronous with row, field sync signal, Video in To AXI4-Stream IP moulds
The data conversion of 24 bit is realized single-frame images information by block at the data format for meeting AXI4_Stream interface protocols
Data acquisition and storage.
Further, convolutional neural networks accelerator reads outer memory module FIFO（First In, First Out）It is slow
It deposits pretreated image in area and carries out traffic target detection identification operation, and operation result is returned again into outer memory module
In FIFO buffer areas.
Further, Video Output Modules include AXI4-Stream To Video out IP modules, will treated regards
Frequency image data is output to HDMI display after being converted into corresponding HDMI output formats, and generates HDMI display using VTC
Export required clock signal.
Further, PL modules further include xlcontact IP modules, two independent interrupt signals of DMA and VDMA
Merge the interrupt signal interface for the ZYNQ IP modules for being connected to PS modules.
Further, outer memory module stores data, ping-pong type read-write using three end to end buffering areas.
Further, PS modules include the bis- stone MCU of ARM CotrexA9, and single-frame images letter is obtained from outer memory module
Breath, is stored to after being pre-processed to image in outer memory module, and obtains target according to PL module arithmetic results
Position and classification information carry out the processing of target picture frame to image and the magnitude of traffic flow count, and by the image after picture frame outside
Portion's memory module.
Further, MCU controls the working condition of convolutional neural networks accelerator, packet by the 10 bit flag positions of GPIO
It includes：It receives data and starts operation, judge to receive is convolution Nuclear Data or feature diagram data, operation rule, if is needed
Relu operations are carried out, stride values are 1 or 2, and, returned data group number after the completion of operation.
Simultaneously in its specific communication construction of the traffic flow information acquisition terminal of the present invention, PS modules and PL modules pass through
AXI4 buses connect, and realize the data communication of intermodule.
Further, PS moulds MCU in the block drives AXI4-VDMA IP kernels and is connected by AXI4-Interconnect IP
The AXI4_HP0 interfaces at the ends PS are connected to, MCU driving AXI4-DMA IP kernels are simultaneously connected to by AXI4-Interconnect1 IP
The AXI4_HP1 interfaces at the ends PS realize the data interaction of PS modules and PL modules.
Further, video input module will be saved in outside by AXI4-VDMA interfaces by pretreated image
Memory module, Video Output Modules obtain in outer memory module that treated regards by picture frame also by AXI4-VDMA interfaces
Frequency image data.
Further, convolutional neural networks accelerator reads pending volume in outer memory module by AXI4-DMA interfaces
Product operation data information, after carrying out specified operation, then by AXI4-DMA interfaces by operation result return to external storage
In module.
And the traffic flow information acquisition terminal based on Zynq-7000 of the present invention, traffic target detection calculations are based on excellent
The YOLO methods of change, network parameter training set are PASCAL VOC data sets, which is divided into picture to be detected different
Net region, then obtains frame prediction and the probability in each region by operation, and distributes weight according to this probability value, finally
Threshold value is set, and output probability value is more than the object detection results of threshold value.
Further, magnitude of traffic flow statistical method of the magnitude of traffic flow statistical calculation based on double virtual detection lines, in order to avoid
The missing inspection of traffic target, flase drop improve the accuracy of traffic statistics, and two parallel void are arranged in the middle and lower part of video image frame
Quasi- detection line, and it is vertical with magnitude of traffic flow direction, the length of detection line is the length of image, according to road conditions and image capturing angle
Width between two detection lines of adjustment.
The present invention uses above-mentioned technical proposal, has the advantages that：
（1）The application is by using Zynq-7000 chips as carrier, carrying out PS modules using AXI4 buses and PL inside modules being mutual
Connection devises the IP kernel for accelerating convolutional neural networks to calculate, and AXI4-VDMA IP kernels and AXI4-DMA IP kernels are driven using MCU
Communication construction realize the real time data interaction of PS modules and PL modules, by video image acquisition, storage, target detection, stream
The functions such as amount statistics, display output integrate on single-chip, and integrated level is high, at high speed with the Digital Image Processing of low latency and data
Transmission disclosure satisfy that the requirement of real-time of magnitude of traffic flow statistics；
（2）The identification that variety classes target is realized by the target detection mode of optimization, improves accuracy of identification, without transplanting
LINUX operating systems, can take into account the compliance for meeting traffic management and scalability is strong；
（3）After tested, after convolutional neural networks accelerator being added, the target detection operation time of single image shortens 0.5 second, depending on
Frequency display output verification can be fully synchronized with real-time road；
（4）Using cost-effective Zynq-7000 chips, monolithic cost is the 1/5 of common GPU, and low in energy consumption, only 5V is needed to supply
Piezoelectric voltage, while arithmetic speed can reach 25 times of universal cpu.
Description of the drawings
Fig. 1 is the overall structure block schematic illustration of the present invention.
Fig. 2 is the data communications racks structure schematic diagram of the present invention.
Fig. 3 is the PS module control function flow charts of the present invention.
Specific implementation mode
The technical solution of invention is described in detail below in conjunction with the accompanying drawings.
Fig. 1 is the overall structure block schematic illustration of the present invention, and the structural framing is with the match with ARM+FPGA function structures
Sentos (Xilinx) company Zynq-7000 chips are carrier, have LVDS interface and HDMI on used MIZ702N development boards
Interface supports a variety of expansible equipment.Video image acquisition sensor is connect by LDVS interfaces with MIZ702N, and HDMI is shown
Device is connect by HDMI interface with MIZ702N, realizes acquisition input and the display output of image data.
The application public affairs are introduced with reference to PS control modules functional flow diagram shown in data communications racks structure shown in Fig. 2 and Fig. 3
The functional structure design implementation principle and Data communication principle for the traffic flow information acquisition terminal opened.
Concrete function structure design implementation principle and process are as follows：
1, corresponding configuration is carried out using OV5640 cameras as video image acquisition sensor and to it, obtains traffic information figure
As data flow；
2, the RGB565 formatted datas of acquisition are sent to the OV_Sensor of video input module by video image acquisition sensor
IP modules, OV_Sensor IP modules obtain the data of 32 bit wides, Video in To after being decoded to RGB565 formatted datas
After AXI4-Stream IP modules convert the data of 32 bit wides to the data format for meeting AXI4_Stream bus inferface protocols
It is sent in AXI4 buses；
3, MCU drives AXI4-VDMA IP kernels that VDMA image data streams are sent in outer memory module DDR3 memories；
4, it drives AXI4-DMA IP kernels transmission DMA data to flow to convolutional neural networks after MCU pre-processes image data to add
Fast device carries out specified operation, MCU accordingly and sends flag bit data by GPIO, and the 1st is GPIO enabler flags from low to high
Position, what the 2nd, 3 bit flag AXI4-DMA IP kernels were sent is convolution kernel or feature diagram data, and the 4th is operation enabler flags
Whether position, the 5th, 6, the 7 expression network number of plies, the 8th bit flag carry out relu, and the 9th is stride values；
5, convolutional neural networks accelerator receives the image data in DDR3 memories, while being rolled up according to corresponding GPIO values
To detect target, convolution algorithm result returns to DDR3 memories by AXI4-DMA IP kernels again for product operation；
6, MCU reads the operation result of convolutional neural networks accelerator, and the mesh in image to be detected is identified according to convolution results
Mark filters out the target more than set threshold value as testing result according to the confidence value of the target detected, selects one
Region of the highest testing result of confidence level as target identification carries out Classification and Identification to target identification region and is calculated finally
Detect the block diagram size and classification of target；
7, MCU carries out picture frame processing according to the block diagram size of target to the raw image data of acquisition, and passes through AXI4-VDMAIP
Core, AXI4 buses are output to the AXI4-Stream To Video out IP modules of Video Output Modules, and MCU is according to target
Classification carries out magnitude of traffic flow statistics；
8, AXI4-Stream To Video out modules carry out format conversion to data and are given birth to according to the sequential that VTC modules are sent
At final HDMI signals, output meets the digital image information of HDMI interface agreement to HDMI display.
The data communications racks structure of the present invention is as shown in Fig. 2, PS modules, PL modules and outer memory module pass through AXI4 buses
Connection is to realize that the high-speed data communication of intermodule, the interface signal of AXI4-VDMA IP cores output pass through AXI4-
Interconnect IP kernels are connected to the AXI4_HP0 interfaces at the ends PS；AXI4-DMA interface signals pass through AXI4-
Interconnect1 IP are connected to the AXI4_HP1 interfaces at the ends PS, and drive control is realized by MCU.
Specific Data communication principle and process are as follows：
1, video input module includes mainly：OV_Sensor IP modules, Video in To AXI4_Stream IP modules,
AXI4-VDMA IP modules, AXI4-Interconnect IP modules, the traffic information that OV_Sensor IP modules will receive
Image data is sent to Video in To AXI4_Stream IP modules and carries out format conversion, and the data after format conversion are logical
It crosses AXI4 buses and AXI4-VDMA interfaces is saved in outer memory module；
2, convolutional neural networks accelerator input port and output port all use AXI4_Stream agreements, and and AXI4-DMA
IP module input and output ports are connected, and AXI4-DMA IP modules are connected with AXI4-Interconnect1 IP modules again, lead to
It crosses AXI4-DMA IP kernels and accesses AXI4-Interconnect1 IP kernels, and DDR3 memories are accessed by AXI4_HP1 interfaces and are read
It takes and carries out specified operation in outer memory module after the data information of pending convolution algorithm, operation result passes through AXI4-DMA
IP kernel returns in outer memory module；
3, MCU connects AXI4_periph IP modules by AXI4_GPIO signaling interfaces（Interface parameters configuration of IP module）,
AXI4_periph IP modules are to AXI4-Interconnect IP modules, AXI4-VDMA IP modules, AXI4-DMA IP modules
Corresponding configuration is carried out with GPIO, such as：The slave device numbering number of AXI4_Interconnect IP module carries, AXI4-VDMA
The register address etc. of the operating mode and GPIO of IP modules and AXI4_DMA IP modules；
4, xlcontact IP modules（Signal merger IP modules）AXI4_DMA IP modules and AXI4_VDMA IP modules 2
Independent interrupt signal merges the IRQ interfaces for being connected to ZYNQ IP modules in PS modules；
5, Video Output Modules include mainly：AXI4_Stream To Video out IP modules, Hdmi_display IP moulds
Block；Pass through picture by being multiplexed in AXI4-VDMA IP modules, AXI4-Interconnect IP modules acquisition outer memory module
Frame treated vedio data, AXI4_Stream To Video out IP modules are to by picture frame treated video
Image data obtains video flowing and outputting video streams to Hdmi_display IP modules, Hdmi_ after carrying out Data Format Transform
Display IP modules are shown to after carrying out encoding video pictures to video flowing on HDMI display.
The above is only a preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
For member, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also answered
It is considered as protection scope of the present invention.
Claims (7)
1. a kind of traffic flow information acquisition terminal based on Zynq-7000, which is characterized in that including：Acquire traffic figure
As the video image acquisition sensor of data flow, traffic image data stream is handled to detect target and count traffic
The Zynq-7000 chips of flow cache the outside of the data during Zynq-7000 chip processing traffic image data streams
Memory module, and, the HDMI display of the target image of display Zynq-7000 chips detection,
The Zynq-7000 integrated chips：
The traffic image data stream that video image acquisition sensor uploads is converted to AXI4 data flows by video input module
After be sent to AXI4 buses,
AXI4-VDMA IP kernels will be changed to from the AXI4 stream compressions that AXI4 buses are read and be buffered in outside after VDMA data flows and deposit
In memory modules, transmits the traffic image handled through picture frame to the video read from external memory modules and export mould
Block,
MCU pre-processes the VDMA data flows read from external memory modules, driving AXI4-VDMA IP kernels feedback
Pretreated image data to external memory modules, driving AXI4-DMA IP kernels reads convolution god from external memory
The convolution results exported through network accelerator, are sieved according to the object detection results of convolutional neural networks accelerator final output
Choosing classifies to the prediction block in target identification region with determining target identification region to determine the block diagram size and class of target
Not, picture frame processing is carried out to the traffic image of acquisition according to the block diagram size of target and counts the magnitude of traffic flow, caching is through drawing
Frame processing traffic image in external memory modules,
AXI4-DMA IP kernels will obtain image data and be converted to DMA data stream after the pretreatment read from external memory, pass
Defeated DMA data flow to convolutional neural networks accelerator, and convolution results to the outside of transmission convolutional neural networks accelerator output is deposited
Memory modules,
Convolutional neural networks accelerator exports convolution results after carrying out convolutional calculation to the DMA data stream of reception,
Video Output Modules are converted to the traffic image handled through picture frame according to the time series that VTC IP kernels are sent
It is exported after meeting the digital image information of HDMI interface agreement.
2. a kind of traffic flow information acquisition terminal based on Zynq-7000 according to claim 1, which is characterized in that institute
It further includes signal merger IP kernel to state Zynq-7000 chips, signal merger IP kernel by the interrupt signal of AXI4-VDMA IP kernels and
The interrupt signal of AXI4-DMA IP kernels is sent to the IRQ interfaces of MCU after merging.
3. a kind of traffic flow information acquisition terminal based on Zynq-7000 according to claim 1, which is characterized in that institute
It further includes interface parameters configuration IP kernel to state Zynq-7000 chips, and interface parameters configuration of IP checks AXI4-VDMA IP kernels and AXI4_
The operating mode of DMA IP kernels is configured.
4. a kind of traffic flow information acquisition terminal based on Zynq-7000 according to claim 3, which is characterized in that institute
The GPIO interface for stating MCU sends flag bit data to interface parameters configuration IP kernel, and the flag bit data include：Convolutional Neural net
Network accelerator enable signal, transmission data type, operation enable signal, the number of plies of convolutional layer, the activation signal of convolutional layer, sliding
Convolution window step information.
5. a kind of traffic flow information acquisition terminal based on Zynq-7000 according to claim 1, which is characterized in that institute
It states the buffer zones FIFO that external memory modules are read and write by three ping-pong types and joins end to end and form.
6. the traffic flow information acquisition terminal based on Zynq-7000, feature described in any one of claim 1 to 5 exist
In the convolutional neural networks accelerator is based on YOLO algorithms and detects target.
7. the traffic flow information acquisition terminal based on Zynq-7000, feature described in any one of claim 1 to 5 exist
In magnitude of traffic flow statistical methods of the MCU based on double virtual detection lines is counted including but not limited to pedestrian, motor vehicle and non-machine
The magnitude of traffic flow of motor-car.
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