CN102819138A - Array base plate and display device - Google Patents
Array base plate and display device Download PDFInfo
- Publication number
- CN102819138A CN102819138A CN201210260959XA CN201210260959A CN102819138A CN 102819138 A CN102819138 A CN 102819138A CN 201210260959X A CN201210260959X A CN 201210260959XA CN 201210260959 A CN201210260959 A CN 201210260959A CN 102819138 A CN102819138 A CN 102819138A
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- array base
- array
- base palte
- groove
- grid
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136222—Colour filters incorporated in the active matrix substrate
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Liquid Crystal (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention relates to the technical field of liquid crystal display and discloses an array base plate which comprises a colorful film and an array which are formed on a substrate, wherein the array is positioned above the colorful film. In the array base plate, the array is arranged above the colorful film, the transparent layer of the colorful film is provided with a groove, and the grid and/or grid line of the array are/is arranged in the groove, so that on one hand, the total thickness of a liquid crystal display device can be reduced, and thus the liquid crystal display device is thinner and lighter; and on the other hand, the flatness of the liquid crystal display device can be increased, so that certain poor display phenomena of liquid crystal display can be reduced.
Description
Technical field
The present invention relates to the display technique field, particularly relate to a kind of array base palte and display device.
Background technology
Thin Film Transistor-LCD (TFT-LCD) has occupied leading position owing to have characteristics such as volume is little, low in energy consumption, radiationless in the FPD field, be applied in all trades and professions widely.
The structure of liquid crystal indicator comprises array base palte, color membrane substrates and is full of the liquid crystal between the two substrates in the prior art.The structure of array base palte comprises grid line, data line, thin film transistor (TFT) and pixel electrode; The structure of color membrane substrates comprises black matrix, color resin layer and transparency conducting layer; Apply electric field through pixel electrode and electrically conducting transparent course liquid crystal molecule, thereby realize the deflection of liquid crystal molecule.
Prior art is through at a formation array base palte on glass, another formation color membrane substrates on glass, at last with two substrates to box and pour into liquid crystal and prepare liquid crystal indicator.On the one hand, array base palte and color membrane substrates are in manufacture process, and all there is section difference zone in all out-of-flatnesses of surface, and behind box, it is more bad phenomenon to occur; On the other hand,, can increase the thickness of substrate to a certain extent, run counter to the original intention that LCD develops to the slimming direction through the process modification section of minimizing difference zone.
Summary of the invention
The technical matters that (one) will solve
The technical matters that the present invention will solve is how to eliminate the section difference zone that array base palte and color membrane substrates surface irregularity are brought, and does not increase the thickness of liquid crystal indicator.
(2) technical scheme
In order to solve the problems of the technologies described above, the present invention provides a kind of array base palte, and said array base palte comprises color film and the array that is formed on the underlay substrate, and said array is positioned at the top of said color film.
Wherein, said color film comprises the color resin layer that is formed on the underlay substrate, and the hyaline layer that is formed on said color resin layer top; Said array comprises grid line, thin film transistor (TFT) and pixel electrode; Said hyaline layer is provided with groove, and the grid of said thin film transistor (TFT) is positioned at said groove.
Wherein, said color film also comprises the black matrix between said color resin layer, and said groove is positioned at the top of said black matrix and is oppositely arranged with it.
Wherein, the degree of depth of said groove, width and length respectively with thickness, width and the length correspondent equal of said grid.
Wherein, the shape of said groove is identical with the global shape of said grid line and said grid, and the degree of depth of said groove equates with the thickness of said grid line and grid.
Wherein, said array also comprises public electrode, and said public electrode is positioned at the top or the below of said pixel electrode.
Wherein, said color resin layer comprises red resin, green resin and blue resins.
Wherein, said hyaline layer adopts acrylic material.
The present invention also provides a kind of display device, comprises as above arbitrary described array base palte.
(3) beneficial effect
The array base palte that technique scheme provided; Array is arranged on the color film, and on the hyaline layer of color film, offers groove, the grid and/or the grid line of array is arranged in the groove; Can reduce the general thickness of liquid crystal indicator on the one hand, make it thinner, lighter; The flatness of liquid crystal indicator can be increased on the other hand, thereby some demonstration bad phenomenon of liquid crystal display can be reduced.
Description of drawings
Fig. 1 is the structural representation of the embodiment of the invention 1 liquid crystal indicator;
Fig. 2 is the structural representation of the embodiment of the invention 1 array base palte infrabasal plate;
Fig. 3 is the synoptic diagram that forms on the infrabasal plate in the embodiment of the invention 1 behind the black matrix figure;
Fig. 4 is the synoptic diagram that forms on the infrabasal plate in the embodiment of the invention 1 behind the color resin figure;
Fig. 5 is the synoptic diagram that forms on the infrabasal plate in the embodiment of the invention 1 behind the hyaline layer;
Fig. 6 is the synoptic diagram that forms on the infrabasal plate in the embodiment of the invention 1 behind the gate patterns;
Fig. 7 is for forming the synoptic diagram of active layer, source electrode, drain electrode and TFT raceway groove figure on the infrabasal plate in the embodiment of the invention 1;
Fig. 8 is the synoptic diagram that forms on the infrabasal plate in the embodiment of the invention 1 behind the passivation layer figure;
Fig. 9 is the synoptic diagram that forms on the infrabasal plate in the embodiment of the invention 1 behind the pixel electrode figure;
Figure 10 is the structural representation of the embodiment of the invention 2 liquid crystal indicators.
Wherein, 1: infrabasal plate; 2: black matrix; 3: red resin; 4: green resin; 5: blue resins; 6: hyaline layer; 7:TFT; 8: grid; 9: gate insulator; 10: semiconductor layer; 11: doping semiconductor layer; 12: source electrode; 13: drain electrode; 14: passivation layer; 15: pixel electrode; 16: upper substrate; 17: public electrode; 18: liquid crystal.
Embodiment
Below in conjunction with accompanying drawing and embodiment, specific embodiments of the invention describes in further detail.Following examples are used to explain the present invention, but are not used for limiting scope of the present invention.
Fig. 1 shows the structural representation of present embodiment liquid crystal indicator, and Fig. 2 is the structural representation of infrabasal plate among Fig. 1.The present embodiment liquid crystal indicator comprises upper substrate 16, infrabasal plate 1 and is filled in the liquid crystal 18 between the two substrates.Infrabasal plate comprises following underlay substrate (not shown), be formed on down the color film on the underlay substrate and be positioned at the array of color film top, and upper substrate 16 comprises the underlay substrate (not shown) and is formed on the public electrode 17 of underlay substrate lower surface.
See figures.1.and.2, color film specifically comprises black matrix 2 and the color resin layer that is formed on down the underlay substrate upper surface and is formed on black matrix 2 and the hyaline layer 6 of color resin layer top that hyaline layer 6 can adopt acrylic material to make.As shown in Figure 2, array comprises grid line (not shown), data line (not shown), TFT7 and the pixel electrode 15 that is formed on hyaline layer 6 tops.The enlarged drawing of array base palte upper film transistor (TFT) 7 is as shown in Figure 9, and wherein, the structure of TFT comprises: grid 8, gate insulator 9, semiconductor layer 10, doping semiconductor layer 11, source electrode 12, drain electrode 13, passivation layer 14 and pixel electrode 15.Color film and array are wholely set, can reduce the integral thickness of liquid crystal indicator, make LCD gentlier change development towards more approaching.
In order further to avoid array and color film in manufacture process; Because of there is section difference zone in surface irregularity, and the problem more to bad phenomenon behind the box that occurs, in the present embodiment; On hyaline layer 6, groove is set; Make grid 8 be positioned at groove, the degree of depth that guarantees groove and width get final product with the thickness and the width correspondent equal of grid 8 respectively, the having an even surface of realization substrate.Need to prove that also groove can be set on the described hyaline layer 6 of present embodiment, grid 8 directly is formed at the top of said hyaline layer 6, those skilled in the art can freely select to be provided with according to actual needs.Color resin layer comprises red resin 3, green resin 4 and blue resins 5, and black matrix 2 is positioned at red resin 3, green resin 4 and blue resins 5 between any two.Groove can be arranged on black matrix 2 tops and be oppositely arranged with it.Certainly, colored color resin layer can also comprise the resin of other color according to design demand, and the present invention does not limit.
In addition, grid line also can be positioned at said groove, and the shape of groove is identical with the global shape of grid line and grid, and the degree of depth of groove equates with the thickness of grid line and grid.
In the present embodiment, the manufacturing approach based on above-mentioned LCD device array substrates is provided also, has specifically comprised following process:
At first, prepare color film.
With reference to Fig. 3, underlay substrate once is provided, on following underlay substrate, form the black matrix 2 of patterning.Particularly, depositing black matrix material on the underlay substrate down, black matrix material can adopt light-proofness preferred metal material or resin material or other light-proofness material preferably, forms the black matrix of arranging with array way 2 then.If black matrix material adopts metal material, then form black matrix figure, if black matrix material adopts resin material, then through forming black matrix figure after exposure, development and the baking processing through gluing, exposure, development, etching and stripping technology.
With reference to Fig. 4, deposition color resin figure on substrate shown in Figure 3, and color resin is distributed between the black matrix 2.Particularly; Deposition color resin material on the underlay substrate after accomplishing black matrix figure; Through forming the color resin figure after exposure, development, the baking processing; And the color resin graphical distribution is between black matrix 2, and wherein color resin comprises red resin 3, green resin 4 and blue resins 5, perhaps also comprises the resin of other colors such as white resin, yellow resin; Versicolor resin figure can adopt random order to arrange in the practical application, and including only red resin 3, green resin 4 and blue resins 5 with said color resin in the present embodiment is that example describes.
With reference to Fig. 5, deposit transparent layer 6 on substrate shown in Figure 4.Particularly; Deposit transparent layer 6 on the underlay substrate of accomplishing the color resin figure; Form flat surface, through on hyaline layer 6, forming groove after exposure, development, the baking processing, depth of groove and width and gate and width are suitable; Can control the degree of depth and the width that forms groove through regulating exposure, wherein the hyaline layer material can adopt acrylic (PMMA) material or other to can be used for the transparent material of present technique scheme.
Then, on color film, prepare array.
With reference to Fig. 6; On the underlay substrate of accomplishing the hyaline layer figure, adopt the method deposition gate metal layer of magnetron sputtering; The grid film can adopt metals such as molybdenum, aluminium, alumel, molybdenum and tungsten alloy, chromium or copper, also can use the unitized construction of above-mentioned different materials film.Form the figure that comprises grid 8 and grid line (not shown) through normal masks technology, wherein grid 8 is positioned at the groove of hyaline layer 6, and forms planarized surface with hyaline layer 6.
With reference to Fig. 7; Successive sedimentation gate insulator 9, semiconductor layer 10, doping semiconductor layer 11 and drain-source electrode layer on the underlay substrate of accomplishing gate patterns; The material of gate insulator 9 can adopt silicon nitride, monox or silicon oxynitride etc.; The drain-source electrode film can adopt metals such as molybdenum, aluminium, alumel, molybdenum and tungsten alloy, chromium or copper, also can use the unitized construction of above-mentioned different materials film.Form the figure that comprises active layer, source electrode 12, drain electrode 13, data line (not shown) and TFT raceway groove (not shown) through grayscale mask process.
Wherein, the step that adopts grayscale mask process to form active layer, source electrode 12, drain electrode 13 and TFT raceway groove figure is specially:
On the underlay substrate of accomplishing gate patterns; Using plasma strengthens chemical vapor deposition (PECVD) method and deposits successively after gate insulator 9, semiconductor layer 10 and the doping semiconductor layer 11; Adopt magnetically controlled sputter method deposition drain-source metallic film again, behind the resist coating, adopt the exposure of gray scale mask version; Make photoresist form removal zone, part removal zone and complete reserve area fully; The wherein complete reserve area respective data lines of photoresist, source electrode 12 and 13 regions that drain, the corresponding TFT raceway groove of photoresist part reserve area figure region, photoresist is removed the zone beyond the corresponding above-mentioned figure in zone fully;
After the development treatment, the photoresist thickness of the complete reserve area of photoresist does not change, the photoresist attenuation of photoresist part reserve area, and photoresist is removed the photoresist in zone fully and is removed fully;
Adopt wet-etching technique to etch away the drain-source metallic film that photoresist is removed the zone fully; Adopt dry carving technology to etch away doping semiconductor layer 11 and semiconductor layer 10 that photoresist is removed the zone fully; Photoresist is carried out ashing treatment, remove the photoresist of photoresist part reserve area fully, expose the drain-source metallic film; Adopt etching technics to carry out the etching second time; Etch away the drain-source metallic film and the doped semiconductor films of photoresist part reserve area fully, and etch away part semiconductor layer 10, form the TFT channel region;
At last, peel off the residue photoresist, accomplish the making of array base palte.
With reference to Fig. 8; Using plasma strengthens chemical gaseous phase depositing process deposit passivation layer 14 on the underlay substrate of accomplishing active layer, source electrode 12, drain electrode 13 and TFT raceway groove figure; Form the passivation layer via hole figure through normal masks technology, wherein passivation material can adopt silicon nitride, monox or silicon oxynitride.
With reference to Fig. 9; Deposit transparent conductive layer on the underlay substrate of accomplishing passivation layer 14; The electrically conducting transparent layer material can adopt materials such as tin indium oxide (ITO), indium zinc oxide (IZO) or aluminum zinc oxide; Form pixel electrode 15 through normal masks technology, and pixel electrode 15 links to each other directly with drain electrode 13 through passivation layer via hole.
When further needing the preparation liquid crystal indicator, can between upper substrate and infrabasal plate, pour into liquid crystal, box-like is become liquid crystal indicator through the preparation upper substrate.
The concrete preparation process of tool upper substrate does, underlay substrate on is provided, and deposit transparent conductive layer on last underlay substrate forms public electrode 17, and this step is identical with the step of formation pixel electrode figure.
With reference to Figure 10, be the structural representation of liquid crystal indicator in the present embodiment, wherein the partial enlarged drawing of TFT7 is referring to Fig. 9.Similar among present embodiment liquid crystal indicator structure and the embodiment 1, its difference part is that the array base palte among the embodiment 1 is set to the TN pattern; And the array base palte in the present embodiment is set to the ADS pattern; Particularly, public electrode 17 all is arranged on the infrabasal plate 1 with pixel electrode 15, and pixel electrode 15 is positioned at public electrode 17 tops; And pixel electrode 15 is a slit-shaped, and public electrode 17 can be made with layer with grid 8.Perhaps; The array base palte of ADS pattern is when all being arranged on public electrode 17 and pixel electrode 15 on the infrabasal plate 1 in the present embodiment; Public electrode 17 is arranged on pixel electrode 15 tops; This moment, public electrode 17 was set to slit-shaped, and public electrode 17 and pixel electrode 15 lay respectively at the above and below of passivation layer 14.In the present embodiment on the infrabasal plate 1 other of color film and array to form structure identical with embodiment 1 with forming process, repeat no more.
Can find out by above embodiment; The present invention is through being arranged on array base palte on the color membrane substrates, and on the hyaline layer of color membrane substrates, offers groove, and grid is arranged in the groove; Can reduce the general thickness of liquid crystal indicator on the one hand, make it thinner, lighter; The flatness of liquid crystal indicator can be increased on the other hand, thereby some demonstration bad phenomenon of liquid crystal display can be reduced.
The above only is a preferred implementation of the present invention; Should be pointed out that for those skilled in the art, under the prerequisite that does not break away from know-why of the present invention; Can also make some improvement and replacement, these improvement and replacement also should be regarded as protection scope of the present invention.
Claims (9)
1. an array base palte is characterized in that, said array base palte comprises color film and the array that is formed on the underlay substrate, and said array is positioned at the top of said color film.
2. array base palte as claimed in claim 1 is characterized in that, said color film comprises the color resin layer that is formed on the underlay substrate, and the hyaline layer that is formed on said color resin layer top; Said array comprises grid line, thin film transistor (TFT) and pixel electrode; Said hyaline layer is provided with groove, and the grid of said thin film transistor (TFT) is positioned at said groove.
3. array base palte as claimed in claim 2 is characterized in that, said color film also comprises the black matrix between said color resin layer, and said groove is positioned at the top of said black matrix and is oppositely arranged with it.
4. array base palte as claimed in claim 2 is characterized in that, the degree of depth of said groove, width and length respectively with thickness, width and the length correspondent equal of said grid.
5. array base palte as claimed in claim 3 is characterized in that, the shape of said groove is identical with the global shape of said grid line and said grid, and the degree of depth of said groove equates with the thickness of said grid line and grid.
6. array base palte as claimed in claim 2 is characterized in that said array also comprises public electrode, and said public electrode is positioned at the top or the below of said pixel electrode.
7. array base palte as claimed in claim 2 is characterized in that said color resin layer comprises red resin, green resin and blue resins.
8. array base palte as claimed in claim 2 is characterized in that, said hyaline layer adopts acrylic material.
9. a display device comprises like each described array base palte among the claim 1-8.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210260959XA CN102819138A (en) | 2012-07-25 | 2012-07-25 | Array base plate and display device |
| PCT/CN2012/086228 WO2014015617A1 (en) | 2012-07-25 | 2012-12-07 | Array substrate and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210260959XA CN102819138A (en) | 2012-07-25 | 2012-07-25 | Array base plate and display device |
Publications (1)
| Publication Number | Publication Date |
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| CN102819138A true CN102819138A (en) | 2012-12-12 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210260959XA Pending CN102819138A (en) | 2012-07-25 | 2012-07-25 | Array base plate and display device |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN102819138A (en) |
| WO (1) | WO2014015617A1 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103489922A (en) * | 2013-09-30 | 2014-01-01 | 京东方科技集团股份有限公司 | Thin film transistor and preparation method thereof, array substrate and preparation method thereof and display device |
| CN104393002A (en) * | 2014-10-29 | 2015-03-04 | 合肥京东方光电科技有限公司 | Display substrate and manufacturing method thereof and display device |
| CN107203077A (en) * | 2016-03-17 | 2017-09-26 | 株式会社日本显示器 | Image display device |
| CN108333830A (en) * | 2018-02-08 | 2018-07-27 | 深圳市华星光电技术有限公司 | Color membrane substrates and its manufacturing method, light shield layer and its manufacturing method |
| CN108388041A (en) * | 2018-02-08 | 2018-08-10 | 深圳市华星光电技术有限公司 | Color membrane substrates and its manufacturing method, the manufacturing method of light screening material and light shield layer |
| WO2019024189A1 (en) * | 2017-08-01 | 2019-02-07 | 惠科股份有限公司 | Display panel |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103489922A (en) * | 2013-09-30 | 2014-01-01 | 京东方科技集团股份有限公司 | Thin film transistor and preparation method thereof, array substrate and preparation method thereof and display device |
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| CN103489922B (en) * | 2013-09-30 | 2017-01-18 | 京东方科技集团股份有限公司 | Thin film transistor and preparation method thereof, array substrate and preparation method thereof and display device |
| CN104393002A (en) * | 2014-10-29 | 2015-03-04 | 合肥京东方光电科技有限公司 | Display substrate and manufacturing method thereof and display device |
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| WO2019024189A1 (en) * | 2017-08-01 | 2019-02-07 | 惠科股份有限公司 | Display panel |
| CN108333830A (en) * | 2018-02-08 | 2018-07-27 | 深圳市华星光电技术有限公司 | Color membrane substrates and its manufacturing method, light shield layer and its manufacturing method |
| CN108388041A (en) * | 2018-02-08 | 2018-08-10 | 深圳市华星光电技术有限公司 | Color membrane substrates and its manufacturing method, the manufacturing method of light screening material and light shield layer |
| CN108333830B (en) * | 2018-02-08 | 2021-03-26 | Tcl华星光电技术有限公司 | Color film substrate and manufacturing method thereof, and light shielding layer and manufacturing method thereof |
| CN108388041B (en) * | 2018-02-08 | 2021-06-01 | Tcl华星光电技术有限公司 | Color film substrate and manufacturing method thereof, shading material and manufacturing method of shading layer |
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| Publication number | Publication date |
|---|---|
| WO2014015617A1 (en) | 2014-01-30 |
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