CN102760648A - Manufacturing method of voltage division ring of plane high-voltage transistor - Google Patents
Manufacturing method of voltage division ring of plane high-voltage transistor Download PDFInfo
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- CN102760648A CN102760648A CN2012102057024A CN201210205702A CN102760648A CN 102760648 A CN102760648 A CN 102760648A CN 2012102057024 A CN2012102057024 A CN 2012102057024A CN 201210205702 A CN201210205702 A CN 201210205702A CN 102760648 A CN102760648 A CN 102760648A
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- dividing ring
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Abstract
The invention provides a manufacturing method of voltage division rings of a plane high-voltage transistor. A main node and the voltage division rings are formed in different processes. In the invention, the plane high-voltage transistor formed by adopting the method has small occupying area of the voltage division rings, and the cost of the plane high-voltage transistor is reduced; the impurity concentration of the voltage division rings is approximate to epitaxial concentration, and the voltage division rings are ensured to be exhausted when a PN node is reversely biased in voltage; electric fields of the voltage division rings are much higher than the electric fields of the voltage division rings formed by the traditional process method in intensity, the voltage division rings have small spacing, and the average electric field intensity of a voltage division ring region is greatly enhanced under the condition of keeping maximum avalanche electric field intensity E unchanged, and therefore, voltage magnitude born at an average unit dimension is improved, the dimensions of the voltage division rings needed by the plane high-voltage transistor are finally greatly reduced under same voltage and chip cost is further reduced; and ring spacings of the voltage division rings and the main node are greatly reduced, and therefore, the widths of the voltage division rings can be designed according to minimum photoetching dimensions.
Description
Technical field
The present invention relates to the withstand voltage technology of plane high voltage transistor, relate in particular to the potential dividing ring designing technique of plane high voltage transistor.
Background technology
The terminal PN junction bending of plane high voltage transistor can cause that usually electric field is concentrated, causes the withstand voltage theoretical value that is significantly less than of puncture of plane high voltage transistor, and the normal potential dividing ring that adopts reduces surface field intensity in the high voltage transistor of plane, and the raising puncture is withstand voltage.
The potential dividing ring of conventional plane high voltage transistor forms with main knot simultaneously, and implementation step is following:
(1) the SIO2 layer to the plane high voltage transistor carries out photoetching, etching, forms main knot window, potential dividing ring window, like Fig. 1 (a);
(2) to plane high voltage transistor master tie window, potential dividing ring graphical window carries out oxidation, like Fig. 1 (b);
(3) main knot window, the potential dividing ring graphical window of plane high voltage transistor inject 1E14～2E15 boron ion for every square centimeter, like Fig. 1 (c);
(4) main knot window, the potential dividing ring window of plane high voltage transistor carry out implantation annealing, form main knot, potential dividing ring, like Fig. 1 (d).
The potential dividing ring junction depth that said method forms, concentration are identical with main knot, and the ring spacing of potential dividing ring and main knot is usually at tens microns, for example when main tie junction depth on the plane of 15um high voltage transistor, its ring spacing is generally at 60um; When main knot junction depth on the plane of 6um high voltage transistor, its ring spacing is generally more than 50um.Potential dividing ring is less relatively to the cost impact of large-size crystals pipe with the size of the ring spacing of main knot; And it is very big to the cost impact of small-geometry transistor; As be of a size of the chip of 1mm * 1mm; Its potential dividing ring might take 10% of the chip gross area with the ring spacing of main knot, and possibly also need two potential dividing rings or more a plurality of potential dividing ring for more high-tension plane high voltage transistor, and the shared area of potential dividing ring will cause chip cost too high.
Summary of the invention
The present invention is intended to solve the deficiency of prior art, provides to reduce chip area, the potential dividing ring manufacturing approach of the plane high voltage transistor that reduces production costs.
The present invention simultaneously also provides the potential dividing ring structure of a kind of plane high voltage transistor.
The potential dividing ring manufacturing approach of a kind of plane high voltage transistor, the main knot of planar transistor forms in different operations with potential dividing ring, comprises the steps:
(1) adopt diffusion technology to form the main knot of plane high voltage transistor at the N layer;
(2) the SIO2 layer to the plane high voltage transistor carries out chemical wet etching, forms the potential dividing ring window at the SIO2 layer;
(3) the potential dividing ring window to the plane high voltage transistor carries out oxidation;
(4) the potential dividing ring window of high voltage transistor injects low dose of boron on the plane;
(5) the potential dividing ring window to the plane high voltage transistor carries out implantation annealing, forms potential dividing ring;
Can a potential dividing ring can be formed according to the requirement of withstand voltage of product in the said method, also several potential dividing rings can be formed simultaneously.
Said potential dividing ring injects 1E12～1E13 boron ion for every square centimeter.
The potential dividing ring manufacturing approach of a kind of in addition plane high voltage transistor, the main knot of planar transistor and potential dividing ring are in different operations
Middle formation comprises the steps:
(1) the SIO2 layer to the plane high voltage transistor carries out chemical wet etching, forms main knot window, potential dividing ring window;
(2) main knot window, the potential dividing ring window to the plane high voltage transistor gives oxidation;
(3) main knot window, the potential dividing ring window of plane high voltage transistor inject 1E12～1E13 boron ion for every square centimeter;
(4) the main knot window to the plane high voltage transistor carries out photoetching;
(5) the main knot window of high voltage transistor injects 1E14～1E15 boron ion for every square centimeter on the plane;
(6) the potential dividing ring window and other regional photoresists of removal plane high voltage transistor;
(7) main knot window, the potential dividing ring window of plane high voltage transistor carry out implantation annealing, form main knot and potential dividing ring;
Can a potential dividing ring can be formed according to the requirement of withstand voltage of product in the said method, also several potential dividing rings can be formed simultaneously.
The potential dividing ring structure of plane high voltage transistor in the N layer, comprises one or several potential dividing rings, a main knot, and the ring spacing of said potential dividing ring and main knot is usually at (8～20) um.
Further, said potential dividing ring and the main big 2～10um of gap ratio master junction depth that ties.
Further, said potential dividing ring junction depth is less than 50% of main knot junction depth, and the doping content of potential dividing ring is less than 10% of main knot doping content.
Further, the number of said potential dividing ring is according to the decision of the requirement of withstand voltage of product, when potential dividing ring during more than one, and the spacing 6um between each potential dividing ring～15um.
The potential dividing ring manufacturing approach of the plane high voltage transistor that the present invention proposes, its beneficial effect is:
1. the plane high voltage transistor that adopts this method to form; The potential dividing ring area occupied is little; Can reduce plane high voltage transistor cost, the potential dividing ring impurity concentration is close with extension concentration, can guarantee that potential dividing ring exhausts when the PN junction reverse biased; Electric field on the potential dividing ring is than the electric field strength on the potential dividing ring of traditional handicraft method formation big a lot (electric field strength on the conventional potential dividing ring technology potential dividing ring is zero or very little); A potential dividing ring spacing is little is simultaneously keeping under the constant situation of maximum snowslide electric field strength E, has greatly improved the average field intensity in potential dividing ring zone, thereby has improved the voltage swing that average unit sizes is born; The size that finally makes the plane high voltage transistor depress required potential dividing ring in same electrical declines to a great extent, and can further reduce chip cost.
2. potential dividing ring significantly reduces with the main ring spacing of tying simultaneously, and the potential dividing ring ring width can design by minimum lithographic dimensions.
Description of drawings:
Fig. 1 (a)-1 (d) is that the potential dividing ring of traditional plane high voltage transistor forms block diagram
Fig. 2 (a)-2 (e) proposes first kind plane high voltage transistor for the present invention potential dividing ring forms block diagram
Fig. 2 (f) is a plurality of potential dividing ring sketch mapes of first kind plane high voltage transistor
Fig. 3 (a)-3 (g) forms block diagram for the potential dividing ring that the present invention proposes a kind of in addition plane high voltage transistor
Fig. 3 (h) is in addition a kind of a plurality of potential dividing ring sketch mapes of plane high voltage transistor
Embodiment
Below in conjunction with accompanying drawing content of the present invention is further specified.
The potential dividing ring manufacturing approach of a kind of plane high voltage transistor, the main knot of planar transistor forms in different operations with potential dividing ring, comprises the steps:
(1) adopts diffusion technology to form the main of plane high voltage transistor and tie, like Fig. 2 (a) at the N layer;
(2) the SIO2 layer to the plane high voltage transistor carries out chemical wet etching, forms the potential dividing ring window at the SIO2 layer, like Fig. 2 (b);
(3) the potential dividing ring window to the plane high voltage transistor carries out oxidation, like Fig. 2 (c);
(4) the potential dividing ring window of high voltage transistor injects low dose of boron on the plane, like Fig. 2 (d);
(5) the potential dividing ring window to the plane high voltage transistor carries out implantation annealing, forms potential dividing ring, like Fig. 2 (e).
Can a potential dividing ring can be formed according to the requirement of withstand voltage of product in the said method, also several potential dividing rings can be formed simultaneously, like Fig. 2 (f).
Said potential dividing ring injects 1E12～1E13 boron ion for every square centimeter.
The potential dividing ring manufacturing approach of a kind of in addition plane high voltage transistor, the main knot of planar transistor forms in different operations with potential dividing ring, comprises the steps:
(1) the SIO2 layer to the plane high voltage transistor carries out chemical wet etching, forms main knot window, potential dividing ring window, like Fig. 3 (a);
(2) main knot window, the potential dividing ring window to the plane high voltage transistor gives oxidation, like Fig. 3 (b);
(3) main knot window, the potential dividing ring window of plane high voltage transistor inject 1E12～1E13 boron ion for every square centimeter, like Fig. 3 (c);
(4) the main knot window to the plane high voltage transistor carries out photoetching, like Fig. 3 (d);
(5) the main knot window of high voltage transistor injects 1E14～1E15 boron ion for every square centimeter on the plane, like Fig. 3 (e);
(6) the potential dividing ring window and other regional photoresists of removal plane high voltage transistor are like Fig. 3 (f);
(7) main knot window, the potential dividing ring window of plane high voltage transistor carry out implantation annealing, form main knot and potential dividing ring, like Fig. 3 (g);
Can a potential dividing ring can be formed according to the requirement of withstand voltage of product in the said method, also several potential dividing rings can be formed simultaneously, shown in Fig. 3 (h).
The potential dividing ring structure of plane high voltage transistor in the N layer, comprises one or several potential dividing rings, a main knot, and the ring spacing of said potential dividing ring and main knot is usually at (8～20) um.
Further, said potential dividing ring and the main big 2～10um of gap ratio master junction depth that ties.
Further, said potential dividing ring junction depth is less than 50% of main knot junction depth, and the doping content of potential dividing ring is less than 10% of main knot doping content.
Further, the number of said potential dividing ring is according to the decision of the requirement of withstand voltage of product, when potential dividing ring during more than one, and the spacing 6um between each potential dividing ring～15um.
Be to be understood that to be that the foregoing description is just to explanation of the present invention, rather than limitation of the present invention, anyly do not exceed the replacement of the unsubstantiality in the connotation scope of the present invention or the innovation and creation of modification all fall within the protection range of the present invention.
Claims (3)
1. the potential dividing ring manufacturing approach of a plane high voltage transistor is characterized in that the main knot of planar transistor forms in different operations with potential dividing ring.Comprise the steps:
(1) adopt diffusion technology to form the main knot of plane high voltage transistor at the N layer;
(2) the SIO2 layer to the plane high voltage transistor carries out chemical wet etching, forms the potential dividing ring window at the SIO2 layer;
(3) the potential dividing ring window to the plane high voltage transistor carries out oxidation;
(4) the potential dividing ring window of high voltage transistor injects low dose of boron on the plane;
(5) the potential dividing ring window to the plane high voltage transistor carries out implantation annealing, forms potential dividing ring.
2. method according to claim 1 is characterized in that forming a potential dividing ring, also can form several potential dividing rings simultaneously.
3. method according to claim 1 is characterized in that said potential dividing ring injects 1E12～1E13 boron ion for every square centimeter.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104465773A (en) * | 2014-11-10 | 2015-03-25 | 深圳深爱半导体股份有限公司 | Terminal structure of metal oxide semiconductor field effect transistor and manufacturing method of terminal structure of metal oxide semiconductor field effect transistor |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1514480A (en) * | 2002-12-31 | 2004-07-21 | 上海贝岭股份有限公司 | Manufacturing technology of high voltage integrated circuit |
| US20090194786A1 (en) * | 2008-02-04 | 2009-08-06 | Fuji Electric Device Technology Co., Ltd. | Semiconductor device and method of manufacturing same |
| CN101777556A (en) * | 2010-01-15 | 2010-07-14 | 无锡新洁能功率半导体有限公司 | Trench large-power MOS part and manufacturing method thereof |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1514480A (en) * | 2002-12-31 | 2004-07-21 | 上海贝岭股份有限公司 | Manufacturing technology of high voltage integrated circuit |
| US20090194786A1 (en) * | 2008-02-04 | 2009-08-06 | Fuji Electric Device Technology Co., Ltd. | Semiconductor device and method of manufacturing same |
| CN101777556A (en) * | 2010-01-15 | 2010-07-14 | 无锡新洁能功率半导体有限公司 | Trench large-power MOS part and manufacturing method thereof |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104465773A (en) * | 2014-11-10 | 2015-03-25 | 深圳深爱半导体股份有限公司 | Terminal structure of metal oxide semiconductor field effect transistor and manufacturing method of terminal structure of metal oxide semiconductor field effect transistor |
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Effective date of registration: 20180312 Address after: 610404 in the Central Development Zone of ABA industry in Chengdu, Sichuan Patentee after: Chengdu Silan Semiconductor Manufacturing Co., Ltd. Address before: No. 308, No. 10, East District, economic and Technological Development Zone, Hangzhou (Xiasha), Zhejiang Province Patentee before: Hangzhou Silan Integrated Circuit Co., Ltd. |
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