CN102737596A - Liquid crystal display - Google Patents
Liquid crystal display Download PDFInfo
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- CN102737596A CN102737596A CN2011104005477A CN201110400547A CN102737596A CN 102737596 A CN102737596 A CN 102737596A CN 2011104005477 A CN2011104005477 A CN 2011104005477A CN 201110400547 A CN201110400547 A CN 201110400547A CN 102737596 A CN102737596 A CN 102737596A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0421—Structural details of the set of electrodes
- G09G2300/0426—Layout of electrodes and connections
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0439—Pixel structures
- G09G2300/0452—Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0202—Addressing of scan or signal lines
- G09G2310/0205—Simultaneous scanning of several lines in flat panels
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3614—Control of polarity reversal in general
Abstract
A liquid crystal display is provided. The liquid crystal display comprises: a liquid crystal display panel (10) comprising data lines (D) formed in a line direction, gate lines (G) formed in a column direction intersecting the line direction, and a plurality of pixels disposed in a matrix form in a cell area defined by the data lines (D) and the gate lines (G); a data driving circuit (120) for supplying a data voltage to the data lines (D); and a gate driving circuit (110) for sequentially supplying gate pulses to the gate lines (G), wherein each of the pixels comprises subpixels, and a length of a column direction of each of the subpixels is longer than that of a line direction of each of the subpixels, at least two subpixels of the subpixels share one gate line (G), and the at least two subpixels charge a data voltage in response to a gate pulse of a gate line.
Description
The application requires by reference to combine its full content at this for various purposes in the right of priority of the korean patent application No.10-2011-0030323 of submission on April 1st, 2011, just looks like to illustrate fully equally at this paper.
Technical field
The present invention relates to a kind of LCD.
Background technology
The LCD of driven with active matrix method uses thin film transistor (TFT) (below be called " TFT ") to show moving image as on-off element.Compare with cathode ray tube (CRT), thereby LCD can be used as the display in portable information device, business machine, computing machine and the TV with small size formation.Therefore, LCD has promptly replaced CRT.
Along with the exploitation of driving method and manufacturing process, LCD has greatly improved production cost and image quality.Now; Pixel arrangement through comprising LCD has proposed three speed and has driven (triple rate driving, TRD) technology as in the pixel arrangement shown in Fig. 1; Wherein the decreased number to 1/2 of source drive IC is to 1/3, thereby reduced production cost.
Fig. 1 shows through show the experimental result of " A " to the clear type of the TRD of correlation technique lcd applications.Clear type is meant that the font image of Microsoft Windows presents technology and on computer display screens, utilizes concrete grammar to improve the shape of character string.As shown in Figure 1, the TRD LCD of correlation technique comprises a plurality of sub-pixels, compares with column direction (that is, the y direction of principal axis), and said sub-pixel is gone up further at line direction (that is x direction of principal axis) and extended.That is, the length at sub-pixel on the line direction is longer than the length of sub-pixel on column direction.Thus, following problem occurs: in the TRD of correlation technique LCD, compare with comprising the LCD of comparing the sub-pixel that further extends along column direction with line direction, the readability of clear ocra font ocr has reduced by 30% or more.Therefore, the TRD LCD of correlation technique is not owing to be applied to commercial product in the low cause of the character readable property aspect the clear type.Yet, to the cost cutting demand of display panels,, the demand to the method for the number that reduces source drive IC has been proposed constantly in order to reduce production costs according to device fabrication company.
Summary of the invention
The present invention relates to a kind of LCD.An object of the present invention is to provide a kind of number that can reduce source drive IC, reduce cost and improve the LCD of the readability of clear ocra font ocr.
Attendant advantages of the present invention, purpose and characteristics will partly be illustrated in following instructions and when reading following content, concerning those one skilled in the art, will partly become clearer, perhaps can learn through putting into practice the present invention.The object of the invention and other advantage will realize and obtain by the structure of in the instructions of being described and claim and accompanying drawing, specifically noting.
In order to realize these purposes and other advantage; Intention according to an aspect; A kind of LCD comprises: display panels; Comprise gate line and a plurality of pixel that column direction that the data line, edge and the line direction that follow direction and form intersect forms, said pixel with matrix arrangement in the unit area that limits said data line and said gate line; Data drive circuit is used for to said data line data voltage being provided; And gate driver circuit; Be used for grid impulse sequentially being provided to said gate line; Wherein each pixel comprises a plurality of sub-pixels; And the length of the column direction of each sub-pixel is longer than the length of the line direction of each sub-pixel, and at least two subpixels in the said sub-pixel are shared a gate line, and said at least two subpixels charge into data voltage simultaneously in response to the grid impulse from a said gate line.
According to another aspect of the present invention; A kind of LCD comprises: display panels; Comprise gate line and a plurality of pixel that column direction that the data line, edge and the line direction that follow direction and form intersect forms, said pixel with matrix arrangement in the unit area that limits said data line and said gate line; Data drive circuit is used for to said data line data voltage being provided; And gate driver circuit; Be used for grid impulse sequentially being provided to said gate line; Wherein each pixel comprises a plurality of sub-pixels; And the length of the line direction of each sub-pixel is longer than the length of the column direction of each sub-pixel, and at least two subpixels in the said sub-pixel are shared a data line, and said at least two subpixels charge into the data voltage that provides according to time division way through a said data line.
Description of drawings
Accompanying drawing shows embodiment of the present invention and is used for explaining principle of the present invention with instructions, and said accompanying drawing is used to provide further understanding of the present invention and incorporates and constitute the application's a part into.In the accompanying drawings:
In the TRD LCD that Fig. 1 shows in correlation technique with the figure of the experimental result of clear type character display;
Fig. 2 is the block diagram that illustrates according to the LCD of embodiment of the present invention;
Fig. 3 is the equivalent circuit diagram that illustrates according to the one part of pixel array of first embodiment of the invention;
Fig. 4 illustrates the data voltage of the some counter-rotating that is used to realize Fig. 3 and the oscillogram of grid impulse;
Fig. 5 be illustrated in according in the LCD with pel array of first embodiment of the invention and correlation technique with the chart of the experimental result of clear type character display;
Fig. 6 is the equivalent circuit diagram that illustrates according to the one part of pixel array of second embodiment of the invention;
Fig. 7 illustrates the data voltage of vertical two somes counter-rotating that is used to realize Fig. 6 and the oscillogram of grid impulse;
Fig. 8 is the equivalent circuit diagram that illustrates according to the one part of pixel array of third embodiment of the invention; And
Fig. 9 illustrates the data voltage of vertical two somes counter-rotating that is used to realize Fig. 8 and the oscillogram of grid impulse.
Embodiment
Followingly describe the present invention more fully, wherein show a plurality of illustrative embodiments of the present invention with reference to accompanying drawing.Yet the present invention can adopt many different forms to realize, should not be interpreted as the embodiment that is limited to here to be illustrated.In whole instructions, refer to similar elements with similar Reference numeral.In being described below, can make theme of the present invention unclear, will omit this detailed description so if judge detailed description to known function relevant or configuration with the present invention.
Can consider that the convenience of writing instructions is chosen in the element title that middle use is described below.Thereby the title of element can be different from the title of the element that in actual product, uses.
Fig. 2 is the block diagram that illustrates according to the LCD of embodiment of the present invention.With reference to Fig. 2, the LCD of accordinging to embodiment of the present invention comprises display panels 10, gate driver circuit 110, data drive circuit 120 and time schedule controller 130.Data drive circuit 120 comprises a plurality of source electrode drive IC.
In display panels 10, between two substrates, form liquid crystal layer.Display panels 10 comprises a plurality of pixels, these pixels with matrix arrangement in the unit area of the decussate texture qualification through data line D and gate lines G.Can according to the pixel arrangement that Fig. 3,6 and 8 form realize display panels 10.
In the infrabasal plate of display panels 10, the gate lines G that forms data line D, intersects with data line D, at thin film transistor (TFT) that the infall of data line D and gate lines G forms (below be called ' TFT '), be connected to pixel electrode 1 and the holding capacitor Cst that is connected to pixel electrode 1 of the liquid crystal cells Clc of TFT.Data line D follows direction (that is, the x direction of principal axis) and forms, and the gate lines G edge forms with the column direction (that is y direction of principal axis) that line direction intersects.
Liquid crystal cells Clc is connected to TFT so that driven by the electric field between pixel electrode 1 and public electrode 2.To public electrode 2 common electric voltage Vcom is provided.In infrabasal plate and/or upper substrate, form public electrode 2.In the upper substrate of display panels 10, form black matrix" and color filter etc.Polarization plates is attached to the infrabasal plate of display panels 10 and each in the upper substrate.In in infrabasal plate and upper substrate each, with surface that liquid crystal layer contacts in be formed for being provided with the alignment of the tilt angle of liquid crystal molecule.
The grid timing control signal comprises grid initial pulse GSP, grid shift clock GSC, grid output enable signal GOE etc.The sequential of first grid impulse of grid initial pulse GSP control.Grid shift clock GSC is used to be shifted the clock signal of grid initial pulse.The output timing of grid output enable signal GOE control gate driver circuit 110.
The data time sequence control signal comprises source electrode initial pulse SSP, source electrode sampling clock SSC, polarity control signal POL and source electrode output enable signal SOE etc.The initial opportunity of data sampling of source electrode initial pulse SSP control data driving circuit 120.Source electrode sampling clock SSC is used for according to rising or negative edge is controlled at the clock signal of the data sampling sequential of each source drive IC.The output timing of source electrode output enable signal SOE control data driving circuit 120.Polarity control signal POL indication is from the reversal of poles sequential of the data voltage of data drive circuit 120 outputs.
Fig. 3 is the equivalent circuit diagram that illustrates according to the one part of pixel array of first embodiment of the invention.With reference to Fig. 3, follow direction (x direction of principal axis) and form data line D1, and form gate lines G 1 to G3 along column direction (y direction of principal axis) to D4.Each pixel of display panel 10 comprises red sub-pixel R, green sub-pixels G and blue subpixels B.The sub-pixel of each pixel of display panel 10 follows direction and is arranged in parallel.That is, each pixel of display panel 10 follows direction according to the order of red sub-pixel R, green sub-pixels G and blue subpixels B and is arranged in parallel, and is as shown in Figure 3.
The sub-pixel of same color is arranged in parallel along column direction.Red sub-pixel R lists along column direction (3i-2) (i is a natural number) and is arranged in parallel.Green sub-pixels G is arranged in parallel along column direction in (3i-1) row.Blue subpixels B is arranged in parallel along column direction in the 3i row.Yet the layout of red sub-pixel R, green sub-pixels G and blue subpixels B is not limited thereto and can in the scope that can be changed by one of ordinary skill in the art, changes.In addition, the column direction length of each among red sub-pixel R, green sub-pixels G and the blue subpixels B forms and is longer than line direction length.
At least two subpixels among the red sub-pixel R of each pixel, green sub-pixels G and the blue subpixels B are shared a gate line.That is, share at each sub-pixel of arranged in odd columns with at contiguous each sub-pixel of arranging at even column on the line direction and be present in the gate line between them.As shown in Figure 3; Each red sub-pixel R of first row and share at each green sub-pixels G of secondary series contiguous on the line direction and to be present in the first grid polar curve G1 between them, and tertial each blue subpixels B and share at each red sub-pixel R of the 4th contiguous on line direction row and to be present in the second grid line G2 between them.
In addition, at least two subpixels among the red sub-pixel R of each pixel, green sub-pixels G and the blue subpixels B charge into data voltage simultaneously in response to the grid impulse from a gate line.Below, the syndeton and the data voltage supply of the first pixel P1, gate line and data line will be described with reference to Fig. 3.
The TFT that is connected with the pixel electrode of the red sub-pixel R of the first pixel P1 is defined as a TFTT1; The TFT that is connected with the pixel electrode of its green sub-pixels G is defined as the 2nd TFT T2, and the TFT that is connected with the pixel electrode of its blue subpixels B is defined as the 3rd TFT T3.The one TFT T1 is in response to the pixel electrode that is provided to red data voltage from the first data line D1 red sub-pixel R from the first grid pulse GP1 of first grid polar curve G1.The grid of the one TFT T1 is connected to first grid polar curve G1, and its source electrode is connected to the pixel electrode of red sub-pixel R, and its drain electrode is connected to the first data line D1.The 2nd TFT T2 is in response to the pixel electrode that is provided to green data voltage from the second data line D2 green sub-pixels G from the first grid pulse GP1 of first grid polar curve G1.The grid of the 2nd TFT T2 is connected to first grid polar curve G1, and its source electrode is connected to the pixel electrode of green sub-pixels G, and its drain electrode is connected to the second data line D2.The 3rd TFT T3 is in response to the pixel electrode that is provided to blue data voltage from the first data line D1 blue subpixels B from the second grid pulse GP2 of second grid line G2.The grid of the 3rd TFT T3 is connected to second grid line G2, and its source electrode is connected to the pixel electrode of blue subpixels B, and its drain electrode is connected to the first data line D1.
At last, in the LCD that comprises the pel array of accordinging to first embodiment of the invention, form data line D because follow direction (x direction of principal axis), so can reduce the number of source drive IC.For example; In the LCD of 1366 * 738 resolution, under the situation of the LCD that forms data line D along column direction (y direction of principal axis), form 4098 (1366 * 3) bar data line D; And, need at least three source drive IC in order to control 4098 data line D.Yet, follow direction (x direction of principal axis) form data line D according in the LCD of the present invention, because form 1536 (738 * 2) bar data line D, so only utilize one or two source drive IC just can control 1536 data line D fully.Therefore, in accordinging to the LCD of first embodiment of the invention, because can reduce the number of source drive IC, so can reduce cost.
In addition, in first embodiment of the present invention, because the sub-pixel of the sub-pixel of odd column and even column is shared a gate lines G, so can reduce the number of gate lines G.Therefore in first embodiment of the present invention,, can reduce the complexity of technology and can reduce the frequency of gate driver circuit 110 through reducing the number of gate lines G.In addition, in first embodiment of the present invention, when reducing the number of gate lines G, the aperture of pixel is than increasing.
In addition, in first embodiment of the present invention, follow direction and form data line D, form gate lines G, and the column direction length of each sub-pixel forms and is longer than its line direction length along column direction.Stray capacitance Cdp is present between pixel electrode and the data line D of sub-pixel and by equality 1 definition.
[equality 1]
In equality 1, Cdp is present in the pixel electrode of sub-pixel and the stray capacitance between the data line D, and s is a sectional area, and d is a distance.Stray capacitance Cdp is directly proportional with sectional area, shown in equality 1.Being adjacent to data line therein forms in the LCD on long limit of sub-pixel, because the sectional area s of the pixel electrode of sub-pixel is very big, so the increase of the value of stray capacitance Cdp.Yet, in first embodiment of the present invention, because be adjacent to the minor face that data line forms sub-pixel, so can reduce the sectional area s of the pixel electrode of sub-pixel.That is, according to first embodiment of the present invention, the stray capacitance Cdp that between the pixel electrode of sub-pixel and data line, exists is minimized.
As shown in Figure 3, utilize the some counter-rotating to realize pel array according to first embodiment of the invention, so that suppress to worsen, reduce the after image of liquid crystal and reduce power consumption.Below, will describe some inversion driving in detail with reference to Fig. 4 according to the pel array of first embodiment of the invention.
Fig. 4 illustrates the data voltage of the some counter-rotating that is used to realize Fig. 3 and the oscillogram of grid impulse.Fig. 4 show the polarity of the data voltage that provides through data line D of being used for periodically reversing polarity control signal POL, be provided to waveform and the waveform that is provided to the grid impulse of first to the 3rd gate lines G 1-G3 of the data voltage of first to the 4th data line D1-D4.
Source drive IC is in response to the reverse polarity of the data voltage that is provided to data line D1-D4 of the polarity control signal POL based on each frame.For example, can odd-numbered frame in the cycle with high level voltage H and even frame in the cycle with low level voltage L polarization control signal POL.Fig. 4 shows with high level voltage H polarization control signal POL.
In odd-numbered frame in the cycle, the positive polarity data voltage as direct current (DC) (that is, the level of this positive polarity data voltage is higher than common electric voltage Vcom) that the first and the 4th data line D1 and D4 provide its level to be higher than common electric voltage Vcom.In odd-numbered frame in the cycle, the negative polarity data voltage as DC (that is, the level of this negative polarity data voltage is lower than common electric voltage Vcom) that the second and the 3rd data line D2 and D3 provide its level to be lower than common electric voltage Vcom.The first data line D1 is included in (4k-3) (k is a natural number) data line, and the second data line D2 is included in (4k-2) data line.The 3rd data line D3 is included in (4k-1) data line, and the 4th data line D4 is included in the 4k data line.For ease of describing, Fig. 4 shows first to the 4th data line D1-D4.
In cycle, the first and the 4th data line D1 and D4 provide its level to be lower than the negative polarity data voltage as DC of common electric voltage Vcom in even frame.In cycle, the second and the 3rd data line D2 and D3 provide its level to be higher than the positive polarity data voltage as DC of common electric voltage Vcom in even frame.
For the pixel duration of charging of undercompensation, gate driver circuit 110 sequentially provides the grid impulse that has greater than the pulse width of two horizontal cycle 2H to gate lines G 1-G3.Grid impulse is overlapping according to predetermined period.For example, the pulse width of grid impulse can be approximated to be two horizontal cycle 2H.In this case, grid impulse can be overlapping according to approximate horizontal cycle 1H.A horizontal cycle is single file sweep time, wherein writes data in the pixel of a display line in display panels 10.Each sub-pixel is gone into data voltage and is charged into data voltage so that show at next horizontal cycle at first horizontal cycle preliminary filling of grid impulse.The data voltage that each sub-pixel charges into a frame period maintenance.For example, as shown in Figure 3, the blue subpixels B of the first pixel P1 goes into red data voltage R+ and charges into blue data voltage B+ so that show at next horizontal cycle at first horizontal cycle preliminary filling of the second grid pulse GP2 of second grid line G2.
With reference to Fig. 3 and 4, being provided to first simultaneously is different with the 4th data line D1 and D4 and second with the polarity of the data voltage of the 3rd data line D2 and D3.The polarity that is provided to the data voltage of the first and the 4th data line D1 and D4 and the second and the 3rd data line D2 and D3 is simultaneously reversed with the circulation in a frame period.For the odd-numbered frame cycle, the positive polarity data voltage is provided to the first and the 4th data line D1 and D4 and negative polarity data voltage and is provided to the second and the 3rd data line D2 and D3.For the even frame cycle, the positive polarity data voltage is provided to the first and the 4th data line D1 and D4 and negative polarity data voltage and is provided to the second and the 3rd data line D2 and D3.As a result, utilize the some counter-rotating to drive the pel array of Fig. 3.Because the some inversion driving, the LCD of accordinging to first embodiment of the invention can suppress to worsen and reduce the after image of liquid crystal.
In addition, to the first and the 4th data line D1 and D4 and the second and the 3rd data line D2 and D3 the data voltage as DC is provided according to the LCD of first embodiment of the invention.As a result, the LCD according to first embodiment of the invention can reduce power consumption P significantly.Power consumption P is defined by equality 2.
[equality 2]
P＝2πf×n×C×V
2
In equality 2, P is a power consumption, and f is a frequency, and n is the number of data line, and C is an electric capacity, and V is an effective voltage.The amplitude of power consumption P and frequency f and effective voltage V is proportional; And when utilizing AC to drive; Frequency f increases, and when the positive polarity data voltage is changed into the negative polarity data voltage or when the negative polarity data voltage is changed into the positive polarity data voltage, effective voltage V increases.
In the LCD of correlation technique, the data voltage of positive polarity and each horizontal cycle of the data voltage of negative polarity or per two horizontal cycles are around common electric voltage Vcom swing.The LCD of correlation technique has high-frequency f, and the amplitude of its effective voltage V from the negative polarity data voltage to the positive polarity data voltage.Yet; Because carrying out DC according to the LCD of first embodiment of the invention with the circulation in a frame period drives; So LCD has low frequency f, and the amplitude of its effective voltage V is as shown in Figure 4 from the common electric voltage to positive polarity or the negative polarity data voltage.That is, corresponding to 50% of the amplitude of the effective voltage V of the LCD of correlation technique, and its frequency f is starkly lower than the frequency of correlation technique LCD according to the amplitude of the effective voltage V of the LCD of embodiment of the present invention.Therefore, compare with the LCD of correlation technique, the LCD of accordinging to embodiment of the present invention can greatly reduce power consumption P.
Fig. 5 be illustrated in according in the LCD with pel array of first embodiment of the invention and correlation technique with the chart of the experimental result of clear type character display.Fig. 5 shows the TRD technology of correlation technique and (wherein compares with column direction; The sub-pixel of same color prolonged in an enterprising step of line direction) and first embodiment of the present invention (wherein compare with line direction, the sub-pixel of same color further prolongs along column direction).Clear type is meant that the font image of Microsoft Windows presents technology and on computer display screens, utilizes concrete grammar to improve the shape of character string.
In not using the non-Clear Type of clear type, the TRD of correlation technique technology and first embodiment of the present invention are having no under the situation of problem demonstration sub-pixel image and clear display character on screen.Yet when using clear type, in correlation technique, thereby the sub-pixel image is expressed obvious reduction of readability quilt of character on screen faintly.Yet, in first embodiment of the present invention,, also can show the sub-pixel image in the situation that has no under the situation of problem or be similar to when not using clear type even if use clear type.That is, in first embodiment of the present invention, can use clear type-word body, and can reduce the number of source drive IC.In addition, in the of the present invention second and the 3rd embodiment, when using clear type, compare when not using clear type, character more clearly is presented on the screen.
Fig. 6 is the equivalent circuit diagram that illustrates according to the one part of pixel array of second embodiment of the invention.With reference to Fig. 6, follow direction (x direction of principal axis) and form data line D1, and form gate lines G 1 to G3 along column direction (y direction of principal axis) to D4.Each pixel of display panel 10 comprises red sub-pixel R, green sub-pixels G and blue subpixels B.Each pixel of display panel 10 is arranged in parallel along column direction according to the order of red sub-pixel R, green sub-pixels G and blue subpixels B, and is as shown in Figure 6.
The sub-pixel of same color follows direction and is arranged in parallel.Red sub-pixel R follows direction and is arranged in parallel in (3p-2) (p is a natural number) row.Green sub-pixels G follows direction and is arranged in parallel in (3p-1) row.Blue subpixels B follows direction and is arranged in parallel in 3p is capable.Yet the layout of red sub-pixel R, green sub-pixels G and blue subpixels B is not limited thereto, and can in the scope that can be changed by one of ordinary skill in the art, change.In addition, the line direction length of each among red sub-pixel R, green sub-pixels G and the blue subpixels B forms and is longer than column direction length.
At least two subpixels among the red sub-pixel R of each pixel, green sub-pixels G and the blue subpixels B are shared a data line.More particularly, each sub-pixel of arranging in odd-numbered line and share at each sub-pixel that even number line contiguous on the column direction is arranged and to be present in the data line between them.As shown in Figure 6, each red sub-pixel R of first row and share at each green sub-pixels G of second contiguous on the column direction row and to be present in the first data line D1 between them.Each blue subpixels B of the third line and share at each red sub-pixel R of fourth line contiguous on the column direction and to be present in the second data line D2 between them.
In addition, at least two subpixels among the red sub-pixel R of each pixel, green sub-pixels G and the blue subpixels B charge into the data voltage that provides according to time division way through a data line.Below, the syndeton and the data voltage supply of the second pixel P2, gate line and data line will be described with reference to Fig. 6.
The TFT that the TFT that is connected with the pixel electrode of the red sub-pixel R of the second pixel P2 is defined as the 4th TFTT4, be connected with the pixel electrode of green sub-pixels G is defined as the 5th TFT T5, and the TFT that is connected with the pixel electrode of blue subpixels B is defined as the 6th TFT T6.The 4th TFT T4 is in response to the pixel electrode that is provided to red data voltage from the first data line D1 red sub-pixel R from the first grid pulse GP1 of first grid polar curve G1.The grid of the 4th TFT T4 is connected to first grid polar curve G1, and its source electrode is connected to the pixel electrode of red sub-pixel R, and its drain electrode is connected to the first data line D1.The 5th TFT T5 is in response to the pixel electrode that is provided to green data voltage from the first data line D1 green sub-pixels G from the second grid pulse GP2 of second grid line G2.The grid of the 5th TFT T5 is connected to second grid line G2, and its source electrode is connected to the pixel electrode of green sub-pixels G, and its drain electrode is connected to the first data line D1.The 6th TFT T6 is in response to the pixel electrode that is provided to blue data voltage from the second data line D2 blue subpixels B from the second grid pulse GP2 of second grid line G2.The grid of the 6th TFT T6 is connected to second grid line G2, and its source electrode is connected to the pixel electrode of blue subpixels B, and its drain electrode is connected to the second data line D2.
At last, according in the LCD that comprises pel array of second embodiment of the invention, form data line D because follow direction (x direction of principal axis), so can reduce the number of source drive IC.For example; In the LCD of 1366 * 738 resolution, under the situation of the LCD that forms data line D along column direction (y direction of principal axis), form 4098 (1366 * 3) bar data line D; And, need at least three source drive IC in order to control 4098 data line D.Yet, follow direction (x direction of principal axis) form data line D according in the LCD of the present invention, because the shared data line D of the sub-pixel of the sub-pixel of odd-numbered line and even number line, so form 1152 (738 * 3/2) bar data line.Therefore, the LCD according to second embodiment of the invention only utilizes one or two source drive IC just can control 1152 data line D fully.Therefore, in accordinging to the LCD of second embodiment of the invention, because can reduce the number of source drive IC, so can reduce cost.
In order to suppress to worsen and reduce the after image of liquid crystal and reduce power consumption, utilize vertical two somes counter-rotatings (two dot inversion) to realize pel array according to second embodiment of the invention, as shown in Figure 6.Below, will describe vertical two some inversion driving in detail with reference to Fig. 7 according to the pel array of second embodiment of the invention.
Fig. 7 illustrates the data voltage of vertical two somes counter-rotating that is used to realize Fig. 6 and the oscillogram of grid impulse.Fig. 7 show the polarity of the data voltage that provides through data line D of being used for periodically reversing polarity control signal POL, be provided to waveform and the waveform that is provided to the grid impulse of first to the 4th gate lines G 1-G4 of the data voltage of first to the 6th data line D1-D6.
Source drive IC is in response to the reverse polarity of the data voltage that is provided to data line D1-D6 of the polarity control signal POL based on each frame.In addition, with the circulation reversed polarity control signal POL of two horizontal cycles.In order to realize vertical two somes counter-rotating, it is opposite with the swing that is provided to such as the data voltage of the even data line of the second, the 4th and the 6th data line D2, D4 and D6 that source drive IC provides data voltage to make to be provided to such as the swing of the data voltage of the odd data line of the first, the 3rd and the 5th data line D1, D3 and D5.
For the pixel duration of charging of undercompensation, gate driver circuit 110 sequentially provides the grid impulse that has greater than the pulse width of two horizontal cycle 2H to gate lines G 1-G4.Grid impulse is overlapping according to predetermined period.For example, the pulse width of grid impulse can be approximated to be two horizontal cycle 2H.In this case, grid impulse can be overlapping according to approximate horizontal cycle 1H.A horizontal cycle is single file sweep time, wherein writes data in the pixel of a display line in display panels 10.Each sub-pixel is gone into data voltage and is charged into data voltage so that show at next horizontal cycle at first horizontal cycle preliminary filling of grid impulse.The data voltage that each sub-pixel charges into a frame period maintenance.For example, as shown in Figure 6, the green sub-pixels G of the second pixel P2 goes into red data voltage R+ and charges into green data voltage G+ so that show at next horizontal cycle at first horizontal cycle preliminary filling of the second grid pulse GP2 of second grid line G2.In addition, the blue subpixels B of the second pixel P2 goes into red data voltage R-and charges into blue data voltage B-so that show at next horizontal cycle at first horizontal cycle preliminary filling of the second grid pulse GP2 of second grid line G2.
With reference to Fig. 6 and 7, being provided to such as the first, the 3rd simultaneously is different with the odd data line of the 5th data line D1, D3 and D5 and such as the second, the 4th with the polarity of the data voltage of the even data line of the 6th data line D2, D4 and D6.The data voltage that is provided to the odd and even number data line is swung between positive polarity data voltage and negative polarity data voltage by predetermined period.In second embodiment of the present invention, predetermined period is shown as two horizontal cycles.Be provided to simultaneously such as the odd data line of the first, the 3rd and the 5th data line D1, D3 and D5 and such as the circulation counter-rotating of the polarity of the data voltage of the even data line of the second, the 4th and the 6th data line D2, D4 and D6 with a frame period.As a result, utilize vertical two points to reverse and drive the pel array of Fig. 6.Because vertical two some inversion driving, the LCD of accordinging to second embodiment of the invention can suppress to worsen and reduce the after image of liquid crystal.
Fig. 8 is the equivalent circuit diagram that illustrates according to the one part of pixel array of third embodiment of the invention.Gend wherein, Rend represent the green sub-pixels of end, the red sub-pixel of end respectively.With reference to Fig. 8, follow direction (x direction of principal axis) and form data line D1, and form gate lines G 1 to G6 along column direction (y direction of principal axis) to Dm.Each pixel of display panel 10 comprises red sub-pixel R, green sub-pixels G and blue subpixels B.Each pixel of display panel 10 is arranged in parallel along column direction according to the order of blue subpixels B, green sub-pixels G and red sub-pixel R, and is as shown in Figure 8.
The sub-pixel of same color follows direction and is arranged in parallel.Red sub-pixel R follows direction and is arranged in parallel in 3r (r is a natural number) row.Green sub-pixels G follows direction and is arranged in parallel in (3r-1) row.Blue subpixels B follows direction and is arranged in parallel in (3r-2) row.Yet the layout of red sub-pixel R, green sub-pixels G and blue subpixels B is not limited thereto, and can in the scope that can be changed by one of ordinary skill in the art, change.In addition, the column direction length of each among red sub-pixel R, green sub-pixels G and the blue subpixels B forms and is longer than column direction length.
At least two subpixels among the red sub-pixel R of each pixel, green sub-pixels G and the blue subpixels B are shared a data line.More particularly, in the 3rd embodiment of the present invention, at the sub-pixel that is arranged in odd-numbered line and be arranged on its column direction between the sub-pixel of contiguous even number line and do not have data line.Therefore, the sub-pixel that is arranged in even number line and the sub-pixel that is arranged in odd-numbered line contiguous on its column direction share with the contiguous data line of the sub-pixel that is arranged in odd-numbered line and with one of them of the contiguous data line of the sub-pixel that is arranged in even number line.As shown in Figure 8; Each blue subpixels B of first row and on column direction each green sub-pixels G of the second contiguous row share the first and second data line D1 and one of D2, and each red sub-pixel R of the third line and one of shared the second and the 3rd data line D2 of each blue subpixels B of contiguous fourth line and D3 on column direction.
In addition, the sub-pixel that is arranged in odd-numbered line and the sub-pixel that is arranged in even number line alternately share the contiguous data line of the sub-pixel that is adjacent to and is arranged in odd-numbered line and with one of them of the contiguous data line of the sub-pixel that is arranged in even number line.As shown in Figure 8, the blue subpixels B of first row and in first row on column direction the green sub-pixels G of the second contiguous row share the second data line D2.The blue subpixels B of first row and in secondary series on column direction the green sub-pixels G of the second contiguous row share the first data line D1.In addition, the red sub-pixel R of the third line and in first row on column direction the blue subpixels B of contiguous fourth line share the 3rd data line D3.The red sub-pixel R of the third line and in secondary series the blue subpixels B of contiguous fourth line share the 3rd data line D3.
In addition, at least two subpixels among the red sub-pixel R of each pixel, green sub-pixels G and the blue subpixels B charge into the data voltage that provides according to time division way through a data line.Below, the syndeton of the 3rd pixel P3, gate line and data line will be described with reference to Fig. 8.
The TFT that the TFT that is connected with the pixel electrode of the red sub-pixel R of the 3rd pixel P3 is defined as the 7th TFT T7, be connected with the pixel electrode of green sub-pixels G is defined as the 8th TFT T8, and the TFT that is connected with the pixel electrode of blue subpixels B is defined as the 9th TFT T9.The 7th TFT T7 is in response to the pixel electrode that is provided to red data voltage from the 3rd data line D3 red sub-pixel R from the first grid pulse GP 1 of first grid polar curve G1.The grid of the 7th TFT T7 is connected to first grid polar curve G1, and its source electrode is connected to the pixel electrode of red sub-pixel R, and its drain electrode is connected to the 3rd data line D3.The 8th TFT T8 is in response to the pixel electrode that is provided to green data voltage from the second data line D2 green sub-pixels G from the second grid pulse GP2 of second grid line G2.The grid of the 8th TFT T8 is connected to second grid line G2, and its source electrode is connected to the pixel electrode of green sub-pixels G, and its drain electrode is connected to the second data line D2.The 9th TFT T9 is in response to the pixel electrode that is provided to blue data voltage from the second data line D2 blue subpixels B from the first grid pulse GP1 of first grid polar curve G1.The grid of the 9th TFT T9 is connected to first grid polar curve G1, and its source electrode is connected to the pixel electrode of blue subpixels B, and its drain electrode is connected to the second data line D2.
At last, according in the LCD that comprises pel array of third embodiment of the invention, form data line D because follow direction (x direction of principal axis), so can reduce the number of source drive IC.For example; In the LCD of 1366 * 738 resolution, under the situation of the LCD that forms data line D along column direction (y direction of principal axis), form 4098 (1366 * 3) bar data line D; And, need at least three source drive IC in order to control 4098 data line D.Yet, follow direction (x direction of principal axis) form data line D according in the LCD of the present invention, because the sub-pixel shared data line D of the sub-pixel of odd-numbered line and even number line, so form 1152 (738 * 3/2) bar data line.Therefore, in accordinging to the LCD of third embodiment of the invention, because form 1152 (738 * 3/2) bar data line D, so only utilize one or two source drive IC just can control 1152 data line D fully.Therefore,, can reduce the number of source drive IC, can reduce cost thus according in the LCD of third embodiment of the invention.
In order to suppress to worsen and reduce the after image of liquid crystal and reduce power consumption, utilize vertical two somes counter-rotating to realize pel array according to third embodiment of the invention, as shown in Figure 8.Below, will describe vertical two some inversion driving in detail with reference to Fig. 9 according to the pel array of third embodiment of the invention.
Fig. 9 illustrates the data voltage of vertical two somes counter-rotating that is used to realize Fig. 8 and the oscillogram of grid impulse.Fig. 9 shows the polarity control signal POL of the polarity of the data voltage that provides through data line D of being used for periodically reversing, the waveform that is provided to first to m data line D1-Dm data voltage and the waveform that is provided to the grid impulse of first to the 6th gate lines G 1-G6.
Source drive IC is in response to the reverse polarity of the data voltage that is provided to data line D1-Dm of the polarity control signal POL based on each frame.For example, can odd-numbered frame in the cycle with high level voltage H and even frame in the cycle with low level voltage L polarization control signal POL.Fig. 9 shows with high level voltage H polarization control signal POL.
In odd-numbered frame in the cycle, provide its level to be higher than the positive polarity data voltage of common electric voltage Vcom as DC such as the odd data line of the first and the 3rd data line D1 and D3.In odd-numbered frame in the cycle, provide its level to be lower than the negative polarity data voltage of common electric voltage Vcom as DC such as the even data line of the second and the 4th data line D2 and D4.In even frame in the cycle, provide its level to be lower than the negative polarity data voltage of common electric voltage Vcom as DC such as the odd data line of the first and the 3rd data line D1 and D3.In even frame in the cycle, provide its level to be higher than the positive polarity data voltage of common electric voltage Vcom as DC such as the even data line of the second and the 4th data line D2 and D4.
For the pixel duration of charging of undercompensation, gate driver circuit 110 sequentially provides the grid impulse that has greater than the pulse width of two horizontal cycle 2H to gate lines G 1-G4.Grid impulse is overlapping according to predetermined period.For example, the pulse width of grid impulse can be approximated to be two horizontal cycle 2H.In this case, grid impulse can be overlapping according to approximate horizontal cycle 1H.A horizontal cycle is single file sweep time, wherein writes data in the pixel of a display line in display panels 10.Each sub-pixel is gone into data voltage and is charged into data voltage so that show at next horizontal cycle at first horizontal cycle preliminary filling of grid impulse.The data voltage that each sub-pixel charges into a frame period maintenance.For example, as shown in Figure 8, the green sub-pixels G of the 3rd pixel P3 goes into blue data voltage B-and charges into green data voltage G-so that show at next horizontal cycle at first horizontal cycle preliminary filling of the second grid pulse GP2 of second grid line G2.
With reference to Fig. 8 and 9, being provided to such as first simultaneously is different with the odd data line of the 3rd data line D1 and D3 and such as second with the polarity of the data voltage of the even data line of the 4th data line D2 and D4.Be provided to simultaneously such as the odd data line of the first and the 3rd data line D1 and D3 and such as the circulation counter-rotating of the polarity of the data voltage of the even data line of the second and the 4th data line D2 and D4 with a frame period.As a result, utilize the pel array of vertical two some inversion driving Fig. 8.Because vertical two some inversion driving, the LCD of accordinging to third embodiment of the invention can suppress to worsen and reduce the after image of liquid crystal.
In addition, according to the LCD of third embodiment of the invention to the data voltage as DC being provided such as the odd data line of the first and the 3rd data line D1 and D3 and such as the even data line of the second and the 4th data line D2 and D4.As a result, the LCD according to third embodiment of the invention can reduce power consumption P significantly.Power consumption P is defined by equality 1.
The amplitude of power consumption P and frequency f and effective voltage V is proportional; And when utilizing AC to drive; Frequency f increases, and when the positive polarity data voltage is changed into the negative polarity data voltage or when the negative polarity data voltage is changed into the positive polarity data voltage, effective voltage V increases.
In the LCD of correlation technique, the data voltage of positive polarity and each horizontal cycle of the data voltage of negative polarity or per two horizontal cycles are around common electric voltage Vcom swing.The LCD of correlation technique has high-frequency f, and the amplitude of its effective voltage V from the negative polarity data voltage to the positive polarity data voltage.Yet; LCD according to third embodiment of the invention drives because carry out DC with the circulation in a frame period; So LCD has low frequency f, and the amplitude of its effective voltage V is as shown in Figure 4 from the common electric voltage to positive polarity or the negative polarity data voltage.That is, corresponding to 50% of the amplitude of the effective voltage V of the LCD of correlation technique, and its frequency f is starkly lower than the frequency of correlation technique LCD according to the amplitude of the effective voltage V of the LCD of third embodiment of the invention.Therefore, compare with the LCD of correlation technique, the LCD of accordinging to third embodiment of the invention can greatly reduce power consumption P.
As stated, in the present invention, along the line direction formation data line of display panel, and along column direction formation gate line.In addition, sub-pixel of the present invention is shared at least one gate line or a data line.As a result, in the present invention,, can reduce cost and can improve the readability of clear ocra font ocr through reducing the number of source drive IC.In addition, in the present invention,, can increase the aperture ratio through reducing gate line.
In addition, in the present invention, according to the sub-pixel that the some inverting method drives display panel, and apply data voltage as DC to data line.As a result, in the present invention, can reduce power consumption significantly.
In addition, in the present invention, form the minor face of sub-pixel abreast with data line.As a result, in the present invention, the stray capacitance that is present between sub-pixel and the data line is minimized.
Although described embodiment, but should be appreciated that one of ordinary skill in the art can design many other modifications and the embodiment that falls in the principle of the invention scope with reference to a plurality of illustrative embodiments.More particularly, in this instructions, accompanying drawing and appended claims scope, at the ingredient of subject combination scheme and/or various variations in arranging and changing also be fine.Except that the variation and change of ingredient and/or layout, substituting use also is conspicuous concerning one of ordinary skill in the art.
Claims (17)
1. LCD comprises:
Display panels comprises gate line and a plurality of pixel that column direction that the data line, edge and the line direction that follow direction and form intersect forms, said pixel with matrix arrangement in the unit area that limits said data line and said gate line;
Data drive circuit is used for to said data line data voltage being provided; With
Gate driver circuit is used for to said gate line grid impulse being provided sequentially,
Wherein each pixel comprises a plurality of sub-pixels, and the length of the column direction of each sub-pixel is longer than the length of the line direction of each sub-pixel,
At least two subpixels in the said sub-pixel are shared a gate line, and said at least two subpixels charge into data voltage simultaneously in response to the grid impulse from a said gate line.
2. LCD as claimed in claim 1, wherein the sub-pixel of each pixel follows direction and is arranged in parallel, and
The sub-pixel of same color is arranged in parallel along column direction.
3. LCD as claimed in claim 1, each sub-pixel that wherein is arranged in each sub-pixel of odd column and is arranged on the line direction contiguous even column is shared and is present in the gate line between them.
4. LCD as claimed in claim 3; The polarity that wherein is provided to the data voltage of (4k-3) and 4k data line is identical; And the polarity that is provided to the data voltage of (4k-2) and (4k-1) data line is identical, and wherein k is a natural number, and
The polarity that is provided to the data voltage of (4k-3) and 4k data line is opposite with the polarity that is provided to the data voltage of (4k-2) and (4k-1) data line.
5. LCD as claimed in claim 4 wherein is provided to the data voltage of (4k-3), (4k-2), (4k-1) and 4k data line to reverse in the circulation in a frame period, and
To (4k-3), (4k-2), (4k-1) and 4k data line the data voltage as direct current (DC) is provided.
6. LCD as claimed in claim 1, the pulse width of wherein said grid impulse is greater than two horizontal cycles.
7. LCD as claimed in claim 6, wherein the pulse width of n grid impulse is overlapping according to the pulse width of predetermined period and (n-1) grid impulse, and wherein n is the natural number more than or equal to 2.
8. LCD comprises:
Display panels comprises gate line and a plurality of pixel that column direction that the data line, edge and the line direction that follow direction and form intersect forms, said pixel with matrix arrangement in the unit area that limits said data line and said gate line;
Data drive circuit is used for to said data line data voltage being provided; With
Gate driver circuit is used for to said gate line grid impulse being provided sequentially,
Wherein each pixel comprises a plurality of sub-pixels, and the length of the line direction of each sub-pixel is longer than the length of the column direction of each sub-pixel,
At least two subpixels in the said sub-pixel are shared a data line, and said at least two subpixels charge into the data voltage that provides according to time division way through a said data line.
9. LCD as claimed in claim 8, wherein the sub-pixel of each pixel is arranged in parallel along column direction, and
The sub-pixel of same color follows direction and is arranged in parallel.
10. LCD as claimed in claim 8, each sub-pixel that wherein is arranged in each sub-pixel of arranged in odd columns and is arranged on the column direction contiguous even column is shared and is present in the data line between them.
11. LCD as claimed in claim 10, the polarity that wherein is provided to the data voltage of odd data line are identical and the polarity that is provided to the data voltage of even data line is identical, and
The polarity that is provided to the data voltage of odd data line is opposite with the polarity that is provided to the data voltage of even data line.
12. LCD as claimed in claim 11; The data voltage that wherein is provided to the odd and even number data line is swung between the data voltage of the data voltage of positive polarity and negative polarity by predetermined period; The level of the data voltage of wherein said positive polarity is higher than common electric voltage, and the voltage level of the data voltage of said negative polarity is lower than said common electric voltage.
13. LCD as claimed in claim 8 wherein is arranged in the sub-pixel of odd-numbered line and shares one of them of data line adjacent with the said sub-pixel that is arranged in odd-numbered line and the data line adjacent with the said sub-pixel that is arranged in even number line with the said sub-pixel that is arranged in odd-numbered line adjacent sub-pixel that is arranged in even number line on column direction.
14. LCD as claimed in claim 13, the polarity that wherein is provided to the data voltage of odd data line is identical, and the polarity that is provided to the data voltage of even data line is identical, and
The polarity that is provided to the data voltage of odd data line is opposite with the polarity that is provided to the data voltage of even data line.
15. LCD as claimed in claim 14 wherein reverses with the circulation in a frame period and is provided to the data voltage of odd and even number data line, and
To said odd and even number data line the data voltage as DC is provided.
16. LCD as claimed in claim 8, the pulse width of wherein said grid impulse is greater than two horizontal cycles.
17. LCD as claimed in claim 16, wherein the pulse width of n grid impulse is overlapping according to the pulse width of predetermined period and (n-1) grid impulse, and wherein n is the natural number more than or equal to 2.
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| KR10-2011-0030323 | 2011-04-01 | ||
| KR1020110030323A KR20120111684A (en) | 2011-04-01 | 2011-04-01 | Liquid crystal display device |
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| CN102737596A true CN102737596A (en) | 2012-10-17 |
| CN102737596B CN102737596B (en) | 2014-12-10 |
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| CN201110400547.7A Active CN102737596B (en) | 2011-04-01 | 2011-11-24 | Liquid crystal display |
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| US (1) | US20120249492A1 (en) |
| EP (1) | EP2506246A1 (en) |
| KR (1) | KR20120111684A (en) |
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Also Published As
| Publication number | Publication date |
|---|---|
| EP2506246A1 (en) | 2012-10-03 |
| US20120249492A1 (en) | 2012-10-04 |
| CN102737596B (en) | 2014-12-10 |
| TWI485677B (en) | 2015-05-21 |
| TW201241810A (en) | 2012-10-16 |
| KR20120111684A (en) | 2012-10-10 |
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