CN102723405A - Method for preparing double-faced growth efficient wide-spectrum absorption multi-junction solar cell - Google Patents
Method for preparing double-faced growth efficient wide-spectrum absorption multi-junction solar cell Download PDFInfo
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- CN102723405A CN102723405A CN2012102139575A CN201210213957A CN102723405A CN 102723405 A CN102723405 A CN 102723405A CN 2012102139575 A CN2012102139575 A CN 2012102139575A CN 201210213957 A CN201210213957 A CN 201210213957A CN 102723405 A CN102723405 A CN 102723405A
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Abstract
The invention discloses a method for preparing a double-faced growth efficient wide-spectrum absorption multi-junction solar cell. Indium phosphide (InP) extension on a gallium arsenide (GaAs) material and monolithic integration of GaAs and InP cells are realized by using a high depth-to-width ratio dislocation capture technology. The method specifically comprises the following steps of: (1) forming a medium film on a first face of a double-faced polished GaAs substrate, and growing a lattice-matched GaAs/GaInP solar cell structure on a second face of the GaAs substrate; (2) protecting the second face of the substrate, and processing nanoscale medium mask patterns on the first face of the substrate; (3) growing an InP thin film on the first face of the substrate, and polishing the InP thin film until the flatness reaches an extension level; (4) sequentially growing an InGaAsP or InGaAsP/InGaAs solar cell structure and an electrode contact layer on the first face of the substrate; and (5) unprotecting the second face of the substrate, and thus obtaining a target product. The method is simple in process, easy to operate and high in yield, and the influence of lattice mismatch and thermal mismatch in a heterogeneous multi-junction solar cell on the quality and performance of a cell material is effectively eliminated.
Description
Technical field
The present invention relates to a kind of preparation method of photovoltaic device, relate in particular to the preparation method that the efficient wide range of a kind of two-sided growth absorbs solar cell.
Background technology
Solar cell becomes the important development direction of regenerative resource as the typical way that solar energy utilizes, and improving efficiency of solar cell is one of target of solar cell pursuit.The III-V compound semiconductor is because its broad band structure becomes the ideal selection of solar cell material, and GaAs base III-V family multijunction cell has been the efficient record holder and the creator in solar cell field since coming out always.Can be with relation according to sun power spectrum and III-V family material; The InGaAsP/InGaAs binode battery of the GaInP/GaAs binode battery of GaAs base lattice match and the basic lattice match of InP can appropriate design; Currents match ground covers most solar spectrums; Experiment showed, and adopt beam split means, the battery efficiency of such solar battery system can reach 43%.It is the desirable combination that realizes the wide range efficient solar battery.But because GaAs material and InP material lattice mismatch degree reach 3.8%, conventional method is difficult to extension high-quality InP material on GaAs, therefore; In order to obtain efficient GaInP/GaAs/InGaAsP/InGaAs solar cell, adopt the method for wafer bonding to attempt realizing that this four junction currents coupling wide range absorbs battery at present mostly, yet wafer bonding relate to kinds of processes (comprising that layer shifts and the chip lift-off technology) on the one hand; Make the success rate of chip reduce; On the other hand, GaAs material and InP material Direct Bonding are very high to the cleanliness factor requirement of environment and equipment, and because the difference of thermal expansion coefficients of the two; If the technology or the later stage work temperature difference are bigger behind the bonding; The warpage that all can cause material chip, and the series resistance of bonding between the latter two is bigger, can increase the electrical losses of this four junction battery virtually; If the employing metal bonding then can run into the problem that compensating series resistor and infrared optics absorb again.
Summary of the invention
The objective of the invention is to deficiency of the prior art, the preparation method who provides the efficient wide range of a kind of two-sided growth to absorb multijunction solar cell, it adopts the design of GaAs base nano patterning to realize the high-quality epitaxial of GaAs base InP material; The InGaAsP/InGaAs solar cell of the lattice match of then growing on this basis; And the GaAs/GaInP solar cell in GaAs substrate another side growth lattice match has finally obtained to have less lattice mismatch and thermal mismatching, and well behaved target product; And; This preparation method's easy operating, yields is high, the reliability and the life-span that help improving integral device.
For realizing the foregoing invention purpose, the preparation method that the efficient wide range of the two-sided growth that the present invention adopts absorbs multijunction solar cell comprises the steps:
(1) on first of the GaAs of twin polishing substrate, form deielectric-coating, and the GaAs/GaInP solar battery structure of the formation lattice match of on second of said substrate, growing;
(2) said substrate second face is protected, on first of said substrate, be processed to form nanoscale medium mask pattern again;
(3) growth forms the InP film on first of said substrate, and said InP film polishing to evenness is reached the extension level;
(4) on first of said substrate successively growth form InGaAsP or InGaAsP/InGaAs solar battery structure and contact electrode layer;
(5) releasing obtains target product to second protection of said substrate.
Wherein, Step (1) is specially: on first of the GaAs of twin polishing substrate, form the deielectric-coating of thickness more than 200nm, and on second of said substrate successively growth form GaAs solar cell-tunnel junctions-GaInP solar battery structure, battery Window layer and contact electrode layer.
Be said deielectric-coating to be carried out patterned in the step (2), thereby form smooth compact medium mask pattern, and the substrate surface corresponding with exposed area exposed fully through chemistry and/or physical refining processes.
As one of preferred version, said deielectric-coating can be selected from SiO
2Film, SiN film, Al
2O
3Film and TiO
2More than in the film any one, but be not limited thereto.
Be at first to form pattern in the step (2) through chemistry and/or physical refining processes; Then adopt dry etching and/or wet-etching technology with design transfer to deielectric-coating; Thereby form smooth compact medium film figure, and the substrate surface corresponding with exposed area exposed fully.
Preferably, be to adopt at least a mode that applies in organic photoresist and the deposition medium film that second face of said substrate is protected in the step (2).
Step (3) is specially: selective growth InP material in the nanometer ditch in the medium mask pattern on being formed at first of said substrate at first; Misfit dislocation is suppressed in the medium nanometer ditch; Up to obtaining dislocation-free InP material, then with the InP material polymerization of separation, until forming the InP film; Then polish, form InP film with extension level evenness with chemistry and/or physical method.
In the step (4) growth InGaAsP solar cell or InGaAsP solar cell-tunnel junctions-InGaAs solar cell and contact electrode layer on the InP film that is formed on first of the said substrate successively.
As one of preferred scheme, contact layer can adopt InP and/or InGaAs layer described in the step (4), but is not limited thereto.
Further, after the protection of removing second of said substrate, also adopt pervasive III-V II-VI group solar cell technology that the multijunction solar cell device that forms has been carried out subsequent treatment, the final goal product in the step (5).
Description of drawings
Fig. 1 deposits the structural representation of the twin polishing GaAs substrate of deielectric-coating for the A face;
Fig. 2 is the sketch map of look unfamiliar at GaAs substrate B shown in Figure 1 long GaAs/GaInP battery and contact electrode layer;
Fig. 3 is at the sketch map of GaAs substrate B face shown in Figure 2 with deielectric-coating or photoresist protection;
Fig. 4 is GaAs substrate A face deielectric-coating nano-scale patterns structural representation, wherein Fig. 4 A-1,4A-2: straight flute shape; Fig. 4 B-1,4B-2: pattern; Fig. 4 C-1,4C-2: cylindrical; Fig. 4 D-1,4D-2: taper shape;
The sketch map of Fig. 5 long dislocation inhibition InP layer, dislocation-free InP layer and InP polymer layer for GaAs substrate A looks unfamiliar;
Fig. 6 is the sketch map of GaAs substrate A face institute grown InP film after polishing;
Fig. 7 is the sketch map of continued growth InGaAsP/InGaAs battery and contact electrode layer on the GaAs substrate A face;
Fig. 8 for the protective layer of removing GaAs substrate B face after the structural representation of device
Fig. 9 is the structural representation of multijunction solar cell device in the embodiment of the invention, and its two-sided growth has contact electrode layer/GaInP (battery)/tunnel junctions 1/GaAs (battery)/GaAs substrate/deielectric-coating nano-scale patterns/InP dislocation to suppress layer/InP dislocation-free layer/InGaAsP (battery)/tunnel junctions 2/InGaAs (battery)/contact electrode layer.
Embodiment
As previously mentioned, the inventor is intended to the deficiency to existing multijunction solar cell preparation technology in this case, provides a kind of high-efficiency wide-spectrum to absorb the preparation technology of multijunction solar cell.That summarizes says, the present invention is applied to GaAs base InP material epitaxy (lattice mismatch of the two reaches 3.81%, and thermal mismatching is less, and is the zincblende cubic structure) (GaAs thermal coefficient of expansion 5.73*10 with the nano-patterning technology
-6℃
-1, InP thermal coefficient of expansion 4.6*10
-6℃
-1, the thermal coefficient of expansion of Si is 2.6*10
-6℃
-1, the thermal coefficient of expansion of Ge is 5.9*10
-6℃
-1), and adopt two-sided growth pattern, in the hope of not influencing the growth quality of each lattice matched materials, thereby obtain GaInP/GaAs/InGaAsP/ (InGaAs) wide range efficient multi-node battery.
Say that further technology of the present invention can comprise the steps:
(1) at the GaAs of the twin polishing substrate A long certain thickness deielectric-coating of looking unfamiliar;
(2) adopt the solar cell GaAs/GaInP structure of MOCVD or MBE growth lattice match at this substrate B face;
(3) this substrate B face structure is adopted the ad hoc fashion protection, substrate A face carry out nano-scale patternsization, obtain nano-scale patterns medium mask.
(4) the GaAs substrate of this nano-scale patternsization is inserted in MOCVD or the MBE equipment again, the grown InP dislocation suppresses layer, dislocation-free layer material and InP polymer layer material successively, up to forming the InP film.
(5) with the InP film of this InP film polishing up to acquisition extension level evenness; Then this substrate is inserted among the MOCVD (perhaps MBE); According to multijunction cell matching Design principle continued growth InGaAsP (or InGaAsP battery, tunnel junctions and InGaAs battery) solar cell; After treating that the battery growth is accomplished, the contact electrode layer of growing at last.
(6) this multijunction cell B face structure protective layer is removed,, thereby prepared GaInP/GaAs/InGaAsP or GaInP/GaAs/InGaAsP/InGaAs high-efficiency wide-spectrum absorption multijunction cell then according to pervasive III-V II-VI group solar cell technology.
In the abovementioned steps 1, be any selection for the GaAs substrate A face and the B face of twin polishing, just for easy mark, and deielectric-coating can be SiO
2, SiNO, SiN, also can be Al
2O
3, TiO
2Deng, and growth pattern can be PECVD, thermal oxidation CVD, magnetron sputtering, electron beam evaporation and ALD, and growth thickness is decided according to the demand of follow-up nano-scale patternsization and the demand of substrate protective aspect, should be not less than 50nm.
In the abovementioned steps 2; Can adopt MOCVD or MBE in the look unfamiliar solar cell GaAs/GaInP structure of long lattice match of this substrate B; This B face refers to the not one side of long deielectric-coating; The GaAs/GaInP solar cell of growing successively is according to the design and the existing growth conditions of efficient multi-node solar battery, the GaAs solar cell-tunnel junctions of growing successively-GaInP solar battery structure and battery Window layer and contact layer.
In the abovementioned steps 3, the mode that this substrate B face structure is protected can be to adopt organic photoresist to apply, and also can be the protection of deielectric-coating deposition, as long as make the GaAs/GaInP battery structure of having grown not receive the pollution of subsequent material growth and technology.And substrate A face carry out nano-scale patternsization, this is meant that according to follow-up InP material growing requirements the deielectric-coating that the A face is covered carries out patterned; Wherein the pattern generation type can be interference lithography, electron beam exposure, nano impression, receive ball photoetching, metal self assembly etc.; Design transfer exposes the GaAs substrate up to exposed region fully to A face deielectric-coating then, and branch mode can be dry etching, wet etching; It also can be the mixing application of the two; As long as can form smooth compact medium film figure, and exposed area exposes the GaAs substrate fully, and substrate quality preserves from and gets final product.
In the abovementioned steps 4; Be that the GaAs substrate of this nano-scale patternsization is inserted in MOCVD or the MBE equipment again; At first selective growth InP material in nanometer ditch deielectric-coating is suppressed at misfit dislocation in the medium nanometer ditch, up to obtaining dislocation-free InP material; Then the InP material of separation is realized polymerization, up to forming the InP film.
In the abovementioned steps 5; Be up to the InP film that obtains extension level evenness with this InP film polishing; Then this substrate is inserted among the MOCVD (perhaps MBE), according to multijunction cell currents match design principle continued growth InGaAsP (or InGaAsP/InGaAs) solar cell.Wherein, the InP film polishing can adopt multiple modes such as chemico-mechanical polishing, chemical polishing, ion beam polishing, as long as can obtain large tracts of land extension level evenness.After the polished and cleaned; Then substrate B is faced up and continue to insert in MOCVD (MBE) equipment; Perhaps (InGaAsP-tunnel junctions-InGaAs) solar cell and bottom electrode contact layer, this contact layer can be that InP also can be InGaAs on the InP film after the polishing, to require growth InGaAsP solar cell according to the efficient multi-node battery design.
In the abovementioned steps (6); Be that this multijunction cell B face structure protective layer is removed; Then according to pervasive III-V II-VI group solar cell technology, thereby prepare GaInP/GaAs/InGaAsP or the GaInP/GaAs/InGaAsP/InGaAs high-efficiency wide-spectrum absorbs multijunction cell.
Below in conjunction with a preferred embodiment and corresponding accompanying drawing technical scheme of the present invention is described further:
The technological process of present embodiment is following:
At first simultaneously deposit a layer dielectric at the GaAs substrate, as shown in Figure 1, comprise GaAs substrate 0 and the deielectric-coating 1 that deposits, this deielectric-coating can be SiO as required
2, SiN, SiNO, TiO
2, Al
2O
3Deng, deposit thickness is decided according to later stage nano-scale patterns substrate epitaxial demand and extension protection demand, and depositing device can be PECVD, thermal oxidation CVD, magnetron sputtering, electron beam evaporation and ald etc.
Adopt MOCVD or MBE equipment to deposit GaAs battery, tunnel junctions, GaInP battery and contact electrode layer successively at this GaAs substrate B face then, as shown in Figure 2.Wherein Reference numeral 0 is identical with Fig. 1 with 1 finger assembly, and Reference numeral 2 then is meant the GaAs battery, and 3 are meant tunnel junctions, and 4 are meant the GaInP battery, and 41 refer to battery Window layer Al (Ga) InP, and 5 are meant contact electrode layer.The thickness of each layer growth and doping type and concentration are decided according to the design of efficient multi-node battery structure.
For B face battery when the growth A face battery structure unaffected; B face battery is adopted deielectric-coating or photoresist protection, and shown in figure three, wherein Reference numeral 0-5 indication is identical with prior figures 2; 6 of Reference numerals are meant the deielectric-coating that deposits for protection A face battery structure, can be SiO
2, SiN, SiNO, TiO
2, Al
2O
3Deng, depositing device can be PECVD, thermal oxidation CVD, magnetron sputtering, electron beam evaporation and ald etc.
Then said structure is overturn; A faces up; Deielectric-coating 1 is carried out nano-patterning; The figure of patterning can be one dimension zanjon shape (shown in Fig. 4 A), two-dimentional zanjon shape (shown in Fig. 4 B), two-dimensional circle cylindricality (shown in Fig. 4 C) with condition according to actual needs, perhaps two-dimensional circle taper patterns such as (shown in Fig. 4 D).The method for preparing figure can be interference lithography, electron beam exposure, receive methods such as ball photoetching, the self assembly of nano impression metal, and graph transfer method can be that wet etching also can be that the mixing of reactive ion etching or inductively coupled plasma etching and dry method and wet etching is used.
After treating that substrate A face nano-scale patterns process is accomplished; At first adopt MOCVD or MBE to select the grown InP layer at this substrate surface; Be suppressed in the deielectric-coating sidewall of nano-scale patternsization fully up to misfit dislocation, continued growth InP exposes the medium nanostructure up to InP then.As shown in Figure 5, wherein Reference numeral 1-6 institute finger assembly is the same with prior figures 4 and 3, and Reference numeral 81 then is meant the InP mismatch layer of being grown; Threading dislocation is suppressed in the deielectric-coating sidewall fully, and is as shown in the drawing, and Reference numeral 82 is meant dislocation-free InP layer in the deielectric-coating of being grown; Reference numeral 83 is meant the InP layer that exposes the patterned media film; In view of selective growth is an anisotropic growth, the InP surface is certain crystal orientation, and strengthens cross growth; Finally make and the mutual polymerization of InP layer form non-smooth InP film.
This InP is carried out surface finish, obtain the InP surface of atomically flating, as shown in Figure 6.Wherein, Reference numeral 1-6,81 is consistent with Fig. 5 indication with 82 finger assemblies, and Reference numeral 84 is meant the InP film after the polishing.Polishing mode can be chemico-mechanical polishing, also can be chemical polishing, and the combination of the two.
MBE or MOCVD growth InGaAsP battery-tunnel junctions-InGaAs battery-contact electrode layer are adopted in InP surface after this polishing, accomplish the growth of InGaAsP/InGaAs binode battery.As shown in Figure 7; Wherein Reference numeral 0-6,81,82,83,84 finger assemblies are identical with prior figures 6, and Reference numeral 9 is meant the InGaAsP battery here, and 10 are meant the tunnel junctions between InGaAsP battery and the InGaAs battery; 11 are meant the InGaAs battery, and 12 are meant contact electrode layer.
Then A flooring protective layer is removed, as shown in Figure 8.
At last according to pervasive this GaInP/GaAs/GaAs of III-V II-VI group solar cell prepared (substrate)/InGaAsP/InGaAs four knot series-connected cells; As shown in Figure 9; Wherein Reference numeral 13 refers to the InGaAs Ohm contact electrode; Reference numeral 14 is meant the Ohm contact electrode of GaAs material, and other each digital indication is identical with prior figures 7.
More than explanation, and the embodiment shown on drawing can not be resolved the design philosophy of the present invention surely of exceeding.In technical field of the present invention, holding identical knowledge the knowledgeable can be with technical thought of the present invention with various form improvement change, and such improvement and change are interpreted as belonging in protection scope of the present invention.
Claims (10)
1. the preparation method of the efficient wide range absorption of a two-sided growth multijunction solar cell is characterized in that this method comprises the steps:
(1) on first of the GaAs of twin polishing substrate, form deielectric-coating, and the GaAs/GaInP solar battery structure of the formation lattice match of on second of said substrate, growing;
(2) said substrate second face is protected, on first of said substrate, be processed to form nanoscale medium mask pattern again;
(3) growth forms the InP film on first of said substrate, and said InP film polishing to evenness is reached the extension level;
(4) on first of said substrate successively growth form InGaAsP or InGaAsP/InGaAs solar battery structure and contact electrode layer;
(5) releasing obtains target product to second protection of said substrate.
2. the efficient wide range of two-sided growth according to claim 1 absorbs the preparation method of multijunction solar cell; It is characterized in that; Step (1) is specially: on first of the GaAs of twin polishing substrate, form the deielectric-coating of thickness more than 50nm, and on second of said substrate successively growth form GaAs solar cell-tunnel junctions-GaInP solar battery structure, battery Window layer and contact electrode layer.
3. the efficient wide range of two-sided growth according to claim 1 absorbs the preparation method of multijunction solar cell; It is characterized in that; Be said deielectric-coating to be carried out patterned in the step (2) through chemistry and/or physical refining processes; Thereby form smooth compact medium mask pattern, and the substrate surface corresponding with exposed area exposed fully.
4. absorb the preparation method of multijunction solar cell according to the efficient wide range of each described two-sided growth among the claim 1-3, it is characterized in that said deielectric-coating is selected from SiO at least
2Film, SiNO film, SiN film, Al
2O
3Film and TiO
2In the film any one.
5. the efficient wide range of two-sided growth according to claim 3 absorbs the preparation method of multijunction solar cell; It is characterized in that; Be at first to form pattern in the step (2) through chemistry and/or physical refining processes; Then adopt dry etching and/or wet-etching technology with design transfer to deielectric-coating, thereby form smooth compact medium film figure, and the substrate surface corresponding with exposed area exposed fully.
6. absorb the preparation method of multijunction solar cell according to the efficient wide range of claim 1 or 5 described two-sided growths; It is characterized in that, be to adopt at least a mode that applies in organic photoresist and the deposition medium film that second face of said substrate is protected in the step (2).
7. the efficient wide range of two-sided growth according to claim 1 absorbs the preparation method of multijunction solar cell; It is characterized in that; Step (3) is specially: selective growth InP material in the nanometer ditch in the medium mask pattern on being formed at first of said substrate at first is suppressed at misfit dislocation in the medium nanometer ditch, up to obtaining dislocation-free InP material; Then with the InP material polymerization of separation; Until forming the InP film, polish with chemistry and/or physical method thereafter, form InP film with extension level evenness.
8. the efficient wide range of two-sided growth according to claim 1 absorbs the preparation method of multijunction solar cell; It is characterized in that, be growth InGaAsP solar cell or InGaAsP solar cell-tunnel junctions-InGaAs solar cell and contact electrode layer on the InP film that is formed on first of the said substrate successively in the step (4).
9. according to the preparation method of claim 1 or the efficient wide range absorption of 8 described two-sided growths multijunction solar cell, it is characterized in that contact layer described in the step (4) is InP and/or InGaAs layer.
10. the efficient wide range of two-sided growth according to claim 1 absorbs the preparation method of multijunction solar cell; It is characterized in that; In the step (5) after the protection of removing second of said substrate; Also adopt pervasive III-V II-VI group solar cell technology that the multijunction solar cell device that forms has been carried out subsequent treatment, the final goal product.
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| CN105576068A (en) * | 2015-12-17 | 2016-05-11 | 中国电子科技集团公司第十八研究所 | Double-face-growing InP five-junction solar battery |
| CN112259617A (en) * | 2020-11-12 | 2021-01-22 | 江苏华兴激光科技有限公司 | High-responsivity detector for 850nm waveband |
| CN113013275A (en) * | 2021-01-18 | 2021-06-22 | 中山德华芯片技术有限公司 | Solar multi-junction cell with mismatched structure and manufacturing method |
| CN114134565A (en) * | 2021-11-10 | 2022-03-04 | 江苏华兴激光科技有限公司 | Method for preparing InP film based on GaAs substrate |
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