CN102723404B - Method for preparing inverted-growth wide-spectrum absorption III-V multi-junction cell - Google Patents
Method for preparing inverted-growth wide-spectrum absorption III-V multi-junction cell Download PDFInfo
- Publication number
- CN102723404B CN102723404B CN201210213314.0A CN201210213314A CN102723404B CN 102723404 B CN102723404 B CN 102723404B CN 201210213314 A CN201210213314 A CN 201210213314A CN 102723404 B CN102723404 B CN 102723404B
- Authority
- CN
- China
- Prior art keywords
- gaas
- layer
- substrate
- inp
- battery
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Photovoltaic Devices (AREA)
Abstract
The invention discloses a method for preparing an inverted-growth wide-spectrum absorption III-V multi-junction cell. Indium phosphide (InP) extension on a gallium arsenide (GaAs) material and monolithic integration of GaAs and InP cells are realized by using a high depth-to-width ratio dislocation capture technology, a GaInP/GaAs/InGaAsP/InGaAs multi-junction cell is prepared on a GaAs substrate by inverted growth, the GaInP/GaAs/InGaAsP/InGaAs multi-junction cell is transferred to a cheap substrate by using a layer transfer technology and a substrate peeling technology, and a high-cost-performance solar cell with high photoelectric conversion efficiency is obtained. The method provided by the invention is easy to implement and low in cost and can be applied to large-scale production of III-V multi-junction solar cells.
Description
Technical field
The present invention relates to a kind of preparation technology of photovoltaic device, particularly one is inverted growth efficient wide-spectrum absorption III-V multijunction cell preparation method, belongs to technical field of solar batteries.
Background technology
Solar cell, as the typical way of Solar use, becomes the important development direction of regenerative resource, and improving efficiency of solar cell is one of target of solar cell pursuit.Group III-V compound semiconductor becomes the ideal chose of solar cell material due to the band structure of its broadness, and GaAs base iii-v multijunction cell is to the efficiency record holder and the creator that since coming out have been solar cell field always.Relation can be with according to sun power spectrum and iii-v, the GaInP/GaAs binode battery of GaAs base Lattice Matching and the InGaAsP/InGaAs binode battery of InP-base Lattice Matching appropriate design, currents match ground can cover most solar spectrum, test proves, adopt light splitting means, the battery efficiency of such solar battery system can reach 43%.It is the desirable combination realizing wide range efficient solar battery.But because GaAs material and InP material lattice mismatch reach 3.8%, conventional method is difficult to extension high-quality InP material on GaAs, therefore, in order to obtain efficient GaInP/GaAs/InGaAsP/InGaAs solar cell, the method of bonding chip is adopted at present mostly to realize the integrated of GaAs system battery and InP system battery, but bonding chip relates to kinds of processes (comprising layer transfer and chip lift-off technology) on the one hand, the success rate of chip is reduced, on the other hand, GaAs material and the purity requirements of InP material Direct Bonding to environment and equipment very high, and due to the two difference of thermal expansion coefficients, if after bonding technique or the later stage work temperature difference larger, all can cause the warpage of material chip, and the series resistance of bonding between the latter two is larger, virtually can increase the electrical losses of this four junction battery, in addition, GaAs substrate is 6 inches, and quality is high and price is low, and InP substrate is 4 inches, and of poor quality and price is high.These factors all hinder and realize GaAs system battery based on bonding chip and InP system battery monomer is integrated, therefore only with prior art, still more difficultly to accomplish scale production.
Summary of the invention
The object of the invention is to for deficiency of the prior art, a kind of preparation method of inverted-growth wide-spectrum absorption III-V multi-junction cell is provided, it utilizes high-aspect-ratio dislocation capture technique to realize InP extension on GaAs material, thus realize the single-chip integration of GaAs system and InP system battery, and realize GaInP/GaAs/InGaAsP/InGaAs multijunction cell on gaas substrates by being inverted growth, thereafter inexpensive substrate is more transferred to by layer transfer technology and substrate desquamation technology, obtain the high performance-price ratio solar cell with high light photoelectric transformation efficiency, and this preparation method is easy to implement, the large-scale production of III-V multijunction solar cell can be realized, and effectively improve lattice between GaAs material and InP material and do not mate a unmatched difficult problem with thermal coefficient of expansion, contribute to reliablely and stablely realizing the integrated of GaAs and InP system battery.
For achieving the above object, the preparation method of the inverted-growth wide-spectrum absorption III-V multi-junction cell of the present invention's employing comprises the steps:
(1) on polishing GaAs substrate surface, Al(Ga is grown successively) As substrate desquamation layer, GaAs contact electrode layer, inversion GaInP/GaAs Stringing cells and GaAs protective layer;
(2) on described GaAs protective layer, deposition forms deielectric-coating, and carries out patterned process to described deielectric-coating, obtains nano-scale patterns medium mask structure, and is come out by the GaAs protective layer corresponding with unmasked areas;
(3) grow formation InP dislocation inhibition layer, dislocation-free layer and film polymer layer on the GaAs surface of described nano-scale patterns medium mask structure successively, subsequently polishing is carried out to described InP polymer layer, until obtain the smooth InP film of device level; Wherein InP dislocation layer and dislocation-free layer growth adopt growth selection technology; make on the GaAs protective layer of InP Material growth under medium nanostructure mask; and effectively suppress the threading dislocation between GaAs and InP material by nanometer dielectric mask structure side wall; thus form InP dislocation inhibition layer; then selective growth InP dislocation-free layer in this dislocation inhibition layer, until InP layer is basic and nanometer dielectric structure height is basically identical.In view of the growth of InP selective anisotropic, on this, strengthen cross growth further until InP aggregates into film, Material growth is complete.Then to be polymerized the InP film formed and carry out polishing and (comprise chemical polishing, mechanical polishing or chemico-mechanical polishing various ways, until obtain the smooth InP film of device level.
(4) on the InP film after described polishing, growth is formed and is inverted InGaAsP/InGaAs string junction battery structure, then form ohmic contact metal layer at the described InGaAsP/InGaAs string junction battery body structure surface being inverted growth, and by described ohmic contact metal layer and translate substrate bonding, obtain complete inversion growth InGaP/GaAs/InGaAsP/InGaAs tetra-junction battery structure;
(5) described GaAs substrate not damaged from aforementioned InGaP/GaAs/InGaAsP/InGaAs tetra-junction battery structure is peeled off, and the device surface formed after peeling off GaAs substrate forms ohmic contact metal layer, and then adopt conventional I II-V battery process, obtain target product.
Specifically, be inverted GaInP/GaAs Stringing cells described in step (1) and be included in GaInP battery, tunnel junctions and the GaAs battery of substrate first surface being inverted growth.
First form pattern by chemistry and/or physical refining processes in step (2); then adopt dry etching and/or wet-etching technology by design transfer on deielectric-coating; thus form smooth compact medium film figure, and the GaAs protective layer corresponding with unmasked areas is exposed completely.
Preferably, described deielectric-coating can be selected from SiO
2film, SiN film, Al
2o
3any one in film and SiNO film, but be not limited thereto.
Refer at the GaAs protective layer corresponding with unmasked areas employing high-aspect-ratio dislocation capture technique grown InP dislocation inhibition layer, dislocation-free layer and InP polymer layer successively in step (3), and then form InP film.
The string of InGaAsP/InGaAs described in step (4) junction battery structure comprises on described InP film, grow formation successively InP resilient coating, inversion InGaAsP battery, tunnel junctions and InGaAs battery and InGaAs contact electrode layer.
Described in step (4), translate substrate can be selected from any one in metal substrate, Semiconductor substrate and insulating material substrate, but is not limited thereto.
First by described InGaP/GaAs/InGaAsP/InGaAs tetra-junction battery structural entity protection in step (5); but make the Al(Ga near GaAs substrate in this four junction batteries structure) exposure of As substrate desquamation layer; and Al(Ga described in after etching) As substrate desquamation layer, until GaAs substrate is peeled off completely from described four junction battery structures.
Further; by carrying out Global Macros in described four junction battery body structure surface coating protects material layer to it in step (5); thereafter again so that can Al(Ga be etched) As substrate desquamation layer; but to the undamaged liquid state of protects material layer or gaseous state etachable material removing Al(Ga) As substrate desquamation layer; and then realize the stripping completely of GaAs substrate, and stripping mode can be wet method also can be dry method.
Further, after forming ohmic contact metal layer in step (5) on the device surface peeling off GaAs substrate, also adopt pervasive iii-v solar cell technique to carry out subsequent treatment to the multijunction solar cell device formed, finally obtain target product.
Accompanying drawing explanation
Fig. 1 is that GaAs Grown adopts MOCVD or MBE to grow the schematic diagram of AlGaAs peel ply, GaAs contact electrode layer;
Fig. 2 is the schematic diagram being inverted growth GaInP battery, tunnel junctions and GaAs battery;
Fig. 3 is the schematic diagram of deposition medium film on battery structure shown in Fig. 2;
Fig. 4 for realizing the schematic diagram of deielectric-coating nano-scale patterns on battery structure shown in Fig. 3 by micro-nano graph preparation technology, wherein, (4A-1,4A-2: straight flute shape, 4B-1,4B-2: pattern, 4C-1,4C-2: cylindrical, 4D-1,4D-2: conical);
Fig. 5 for adopting the schematic diagram of MOCVD or MBE grown InP dislocation inhibition layer, dislocation-free layer and InP film polymer layer on battery structure shown in Fig. 4;
Fig. 6 carries out the schematic diagram after chemico-mechanical polishing for battery structure shown in Fig. 5;
Fig. 7 inserts MOCVD or MBE usable material chamber continued growth InP resilient coating, inversion growth InGaAsP battery, tunnel junctions and InGaAs battery for battery structure shown in Fig. 6 and finally grows the schematic diagram of InGaAs contact layer;
Fig. 8 is schematic diagram Fig. 7 gained battery structure being bonded to translate substrate;
Fig. 9 is the schematic diagram of battery structure shown in Fig. 8 after realizing GaAs substrate desquamation;
Figure 10 is the structural representation of the complete solar cell obtained based on material structure shown in Fig. 1-Fig. 9 and technique in the embodiment of the present invention.
Embodiment
As previously mentioned, generally, the present invention be utilize high-aspect-ratio dislocation capture technique realize InP extension on GaAs material (lattice mismatch of the two reaches 3.81%, and thermal mismatching is less, and is zincblende cubic structure, wherein, GaAs thermal coefficient of expansion 5.73*10
-6dEG C
-1, InP thermal coefficient of expansion 4.6*10
-6dEG C
-1); and the single-chip integration of GaAs system and InP system battery; and realize GaInP/GaAs/InGaAsP/InGaAs multijunction cell on gaas substrates by being inverted growth; thereafter inexpensive substrate is more transferred to by layer transfer technology and substrate desquamation technology; obtain the high performance-price ratio solar cell with high light photoelectric transformation efficiency; and this preparation method is easy to implement, the large-scale production of III-V multijunction solar cell can be realized.
Further say, technical scheme of the present invention is roughly:
1) on the GaAs substrate of single-sided polishing, MOCVD or MBE is adopted to grow Al(Ga successively) As substrate desquamation layer, GaAs contact electrode layer, inversion GaInP battery, inversion tunnel junctions, inversion GaAs battery and GaAs protective layer;
2) deposit certain thickness deielectric-coating at the GaAs protective layer of this structure, and implemented nano-scale patterns, obtain nano-scale patterns medium mask, and unmasked areas is exposed protective layer GaAs material surface;
3) this nano-scale patterns sample is inserted in MOCVD or MBE equipment again, successively grown InP dislocation inhibition layer, dislocation-free layer and InP polymer layer, until obtain this sample surfaces InP film;
4) by sample surfaces polishing complete for above-mentioned growth, obtain the InP film that device level is smooth, then this sample is inserted in MOCVD (or MBE), grown InP resilient coating and inversion InGaAsP battery, tunnel junctions and inversion InGaAs battery and InGaAs contact electrode layer successively, obtains complete inversion growth InGaP/GaAs/InGaAsP/InGaAs tetra-junction battery structure thus;
5) at said structure surface evaporation ohmic contact metal layer, be then bonded on corresponding substrate;
6) total is protected completely, but exposes the Al(Ga near GaAs substrate position) As, then adopt HF to corrode Al (Ga) As material, whole battery structure is peeled off completely from GaAs substrate;
7) the sample surfaces evaporation ohmic contact metal layer after stripping, then prepares this GaInP/GaAs/InGaAsP/InGaAs tetra-junction battery traditionally.
In abovementioned steps 1, Al (Ga) is as long as As substrate desquamation layer material component meets: have very large Selection radio during (1) and GaAs Lattice Matching (2) HF corrosion and between GaAs, the thickness of its grown layer is determined, as long as the device grown all can intactly from GaAs substrate desquamation according to the needs of specific size substrate desquamation.In view of this multijunction cell is for being inverted growth structure, therefore, described GaInP battery, tunnel junctions and GaAs battery all grow successively according to inverted structure, comprise material component and doping type and concentration; GaAs contact electrode layer then realizes the highly doped of suitable type as far as possible; GaAs protective layer then realizes opposite dopant type as far as possible, and the thickness of GaAs protective layer is determined according to the needs of later stage depth-to-width ratio dislocation capture technique grown InP film.
In abovementioned steps 2, deielectric-coating material can be SiO
2, SiN, SiNO, Al
2o
3, the thickness of deielectric-coating is determined according to the needs of GaAs base InP depth-to-width ratio dislocation capture technique grown InP material.In nano-scale patterns GaAs surface, figure generation type can be electron beam exposure, interference lithography, metal self assembly, receive ball photoetching, one or more in the technology such as anodised aluminium are combined, Graphic transitions mode can be that dry etching is (as reactive ion etching (RIE), sense coupling (ICP) and Ecr plasma etching (ECR) etc.), wet etching or the two combination, form the high-aspect-ratio mask pattern of growth needs, this pattern needs can be one-dimensional medium zanjon according to Material growth, also can be TWO-DIMENSIONAL CIRCULAR CYLINDER, circular cone, and square pattern, it can be periodic structure, also can be aperiodic structure, as long as smooth compact medium film figure can be formed, and exposed area exposes GaAs protective layer completely, and GaAs protective layer quality preserves from again.
Growth conditions in abovementioned steps 3 is can realize high-quality selective growth InP dislocation inhibition layer and dislocation-free layer, and cross growth realizes the transverse direction polymerization of high-quality InP layer.Wherein, InP dislocation layer and dislocation-free layer growth adopt growth selection technology; make on the GaAs protective layer of InP Material growth under medium nanostructure mask; and effectively suppress the threading dislocation between GaAs and InP material by nanometer dielectric mask structure side wall; thus form InP dislocation inhibition layer; then selective growth InP dislocation-free layer in this dislocation inhibition layer, until InP layer is basic and nanometer dielectric structure height is basically identical.In view of the growth of InP selective anisotropic, on this, strengthen cross growth further until InP aggregates into film, Material growth is complete.Then to be polymerized the InP film formed and carry out polishing and (comprise chemical polishing, mechanical polishing or chemico-mechanical polishing various ways, until obtain the smooth InP film of device level.In this process, in order to obtain effective high-quality InP thin-film material on gaas substrates, usually need the height of deielectric-coating to be greater than the width of the GaAs layer that dielectric structure exposes, therefore, this growing technology is referred to as high-aspect-ratio dislocation capture technique.
In abovementioned steps 4, surface finish can adopt the various ways such as chemico-mechanical polishing, chemical polishing, ion beam polishing, as long as can obtain large area extension level evenness;
In abovementioned steps 5, evaporation ohmic contact metal layer can adopt the equipment such as magnetron sputtering, electron beam evaporation, the metal of evaporation can be the N-type metal ohmic contacts such as gold germanium nickel according to the dopant species of InGaAs contact electrode layer, also can be the P type metal ohmic contacts such as titanium platinum; The substrate preferably metal substrate of bonding not increase extra Ohmic resistance (such as: the materials such as stainless steel), certainly, according to actual needs, also can be Semiconductor substrate (as Si material) or insulating material (as glass etc.).Bonding pattern is different according to the substrate of institute's bonding, can select the various ways such as metal bonding, plasmaassisted bonding, anode linkage.
Protect the material of total can be metal in abovementioned steps 6, also can be organic substance (as materials such as photoresist, polyimides, polystyrene, PDMS), as long as this kind of material does not react with fluoride, is easy to apply and remove, the mode implementing protection if metal, then can adopt magnetron sputtering mode; If organic substance, then the mode of spin coating can be adopted to obtain.Adopt fluoride corrosion Al (Ga) As material, wherein fluoride is peeled off GaAs substrate and can be adopted liquid HF solution wet etching Al (Ga) As material, also can adopt the X of gaseous state
2f, realizes substrate desquamation by plasma dry undercutting.In a word, with realize not damaged GaAs surface and substrate peel off completely as benchmark.
In abovementioned steps 7, the ohmic contact layer of evaporation can be the P type metal ohmic contacts such as titanium platinum according to the polarity of top layer GaAs contact layer, also can be the N-type metal ohmic contacts such as gold germanium nickel, evaporation mode can be magnetron sputtering also can be electron beam evaporation or thermal evaporation.Then this GaInP/GaAs/InGaAsP/InGaAs tetra-junction battery is prepared traditionally.
Below in conjunction with a preferred embodiment and relevant indicators, technical scheme of the present invention is described further:
Consult Fig. 1-Figure 10, the technological process of the present embodiment is roughly as follows:
First MBE or MOCVD is adopted to grow Al (Ga) As peel ply, GaAs contact electrode layer successively on GaAs polished substrate surface, as shown in Figure 1, wherein Reference numeral 0 is GaAs substrate, 1 is Al (Ga) As peel ply, 2 is the GaAs contact layer of high-concentration dopant, this contact layer thickness is 200-1000nm, and doping content is 1x10
18cm
-3-1x10
21cm
-3, doping type is determined by the battery polar designed and prepare, and dopant material is determined according to the equipment sources of MOCVD and MBE.
Then continue to utilize MOCVD or MBE to be inverted growth Al (Ga) InP Window layer 31 successively, to be inverted GaInP battery layers 3, to be inverted tunnel junctions 4, to be inverted GaAs battery layers 5, as shown in Figure 2.Wherein, Al (Ga) InP Window layer needs according to actual battery, GaInP battery 3 and GaAs battery 4 comprise the emitter layer (emitter) of each battery and base layer (base layer) and back surface field material respectively, and tunnel junctions materials and structures can be GaAs/GaAs, GaInP/AlGaAs according to Material growth technology and relevant device, also can be GaAs/AlGaAs combination; The doping type of above all material, dopant dose and growth thickness and order all need to go here and there the design of junction battery determine according to being inverted growth GaInP/GaAs.
And then deposition medium film on the GaInP/GaAs battery material grown, as shown in Figure 3, other each Reference numeral institute finger is with similar above, and 6 is the deielectric-coating deposited, and deielectric-coating material can be SiN, SiO
2, TiO
2or Al
2o
3deng, depositional mode can be PECVD, electron beam evaporation, thermal evaporation, thermal oxidation and ald etc., and the thickness of deielectric-coating is determined according to the needs of GaAs base InP depth-to-width ratio dislocation capture technique grown InP material.
Fig. 4 is given by micro-nano graph preparation technology and realizes deielectric-coating nano-scale patterns schematic diagram, and wherein the implication indication of Reference numeral 0-6 is with identical above.Reference numeral 71-74 is the different micro-nano structures realized on deielectric-coating 6 by micro-nano graph branch mode, wherein, 71 is that deielectric-coating to be etched into one dimension zanjon shape, 72 be that deielectric-coating to be etched into two-dimentional zanjon shape, 73 be that deielectric-coating to be etched into cylinder pass, 74 be that deielectric-coating is etched into wedge shape.In nano-scale patterns GaAs surface, figure generation type can be electron beam exposure, interference lithography, metal self assembly, receive ball photoetching, one or more in the technology such as anodised aluminium are combined, Graphic transitions mode can be that dry etching is (as reactive ion etching (RIE), sense coupling (ICP) and Ecr plasma etching (ECR) etc.), wet etching or the two combination, form the high-aspect-ratio mask pattern of growth needs, this pattern needs can be one-dimensional medium zanjon 71 according to Material growth, also can be TWO-DIMENSIONAL CIRCULAR CYLINDER 73, circular cone 74, and square pattern 72, it can be periodic structure, also can be aperiodic structure, as long as smooth compact medium film figure can be formed, and exposed area exposes GaAs surface completely, and GaAs surface quality preserves from again.
Fig. 5 is given on said structure and figure and adopts MOCVD or MBE grown InP dislocation inhibition layer 81, dislocation-free layer 82 and InP film polymer layer 83 schematic diagram, wherein, other digital indication with respectively scheme above consistent, here, Reference numeral 81, 82 and 83 refer to the dislocation inhibition layer adopting MOCVD or MBE continued growth in above-mentioned medium micro-nano structure respectively successively, dislocation-free layer and InP film polymer layer, wherein, growth conditions is can realize high-quality selective growth InP dislocation inhibition layer and dislocation-free layer, the transverse direction that cross growth realizes high-quality InP layer is polymerized to target.
Fig. 6 provide said structure growth after sample carry out the schematic diagram after chemico-mechanical polishing, Reference numeral 84 refers to the InP film that surface of polished is smooth, and other digital indication is with completely the same above.Wherein, surface finish can adopt the various ways such as chemico-mechanical polishing, chemical polishing, ion beam polishing, as long as can obtain large area extension level evenness and few defect;
Fig. 7 provides said structure sample and again inserts MOCVD or MBE growth room, continues grown InP resilient coating successively, is inverted growth InGaAsP battery, the schematic diagram of tunnel junctions and InGaAs battery and InGaAs contact electrode layer; Wherein Reference numeral 84 is InP resilient coating, 9 refer to the InGaAsP battery, 10 being inverted growth be tunnel junctions, 11 be InGaAs battery, 12 for InGaAs contact electrode layer, other each digital indications are with completely the same above.Wherein the thickness of the doping type of grown layers of material, doping content and layers of material is determined according to design completely, and dopant is selected then to determine according to the source material that structure needs and MOCVD and MBE equipment is all.
Fig. 8 provide above-mentioned sample grown complete after and at surperficial evaporation metal ohmic contact layer, be then bonded to the schematic diagram on other substrates, wherein, Reference numeral 13 indication be bonding need substrate, all the other each digital indications are with identical above.Here, evaporation ohmic contact metal layer can adopt the equipment such as magnetron sputtering, electron beam evaporation, the metal of evaporation can be the N-type metal ohmic contacts such as gold germanium nickel according to the dopant species of InGaAs contact electrode layer, also can be the P type metal ohmic contacts such as titanium platinum; The substrate preferably metal substrate of bonding, not increase extra Ohmic resistance (such as: the material such as copper and stainless steel), certainly, according to actual needs, also can be Semiconductor substrate (as Si material) or insulating material (as glass etc.).Bonding pattern is different according to the substrate of institute's bonding, can select the various ways such as metal bonding, plasmaassisted bonding, anode linkage.
Fig. 9 provide above-mentioned sample realize GaAs substrate desquamation after sample schematic diagram; Complete way is protected completely total, but expose Al (Ga) As near GaAs substrate position, then adopts fluoride corrosion Al (Ga) As material, peeled off completely by whole battery structure from GaAs substrate; Wherein, the material of protection total can be metal, also can be organic substance (as materials such as photoresist, polyimides, polystyrene, PDMS), as long as this kind of material does not react with fluoride, is easy to apply and remove, the mode implementing protection if metal, then can adopt magnetron sputtering mode; If organic substance, then the mode of spin coating can be adopted to obtain.Adopt fluoride corrosion Al (Ga) As material, wherein fluoride is peeled off GaAs substrate and can be adopted liquid HF solution wet etching Al (Ga) As material, also can adopt the X of gaseous state
2f, realizes substrate desquamation by plasma dry undercutting.In a word, with realize not damaged GaAs surface and substrate peel off completely as benchmark.
Figure 10 is the complete solar cell schematic diagram based on above-mentioned material Structure and energy, and wherein, Reference numeral 14 is top battery ohmic contact layers, and 15 is reduced passivation resisting films of battery Window layer.The ohmic contact layer of evaporation can be the P type metal ohmic contacts such as titanium platinum according to the polarity of top layer GaAs contact layer, and also can be the N-type metal ohmic contacts such as gold germanium nickel, evaporation mode can be magnetron sputtering also can be electron beam evaporation or thermal evaporation.Then this GaInP/GaAs/InGaAsP/InGaAs tetra-junction battery is prepared traditionally.Reduced passivation resisting film can be traditional double layer antireflection film (as SiO2/TiO2 or ZnS/MgF) also can be novel anti-reflection nanostructure as involved in the patent application proposed before this in inventor.
It is emphasized that above explanation and the embodiment shown on drawing, the design philosophy surely of the present invention that is limited can not be resolved.Hold in technical field of the present invention identical know the knowledgeable can by technical thought of the present invention with various form improvement change, such improvement and change are interpreted as belonging in protection scope of the present invention.
Claims (8)
1. a preparation method for inverted-growth wide-spectrum absorption III-V multi-junction cell, is characterized in that, it comprises the steps:
(1) on polishing GaAs substrate surface, Al(Ga is grown successively) As substrate desquamation layer, GaAs contact electrode layer, inversion GaInP/GaAs Stringing cells and GaAs protective layer;
(2) pattern is formed by chemistry and/or physical refining processes, and deposition forms deielectric-coating on described GaAs protective layer, and adopt dry etching and/or wet-etching technology by design transfer on deielectric-coating, realize the patterned process to described deielectric-coating, obtain the nano-scale patterns medium mask structure of smooth densification, and part GaAs protective layer is come out from described nano-scale patterns medium mask structure;
(3) grown InP dislocation inhibition layer, dislocation-free layer and InP polymer layer successively on the GaAs protective layer come out in described nano-scale patterns medium mask structure, until InP material aggregates into certain thickness film completely, subsequently polishing is carried out to described InP film, until obtain the smooth InP film of device level;
(4) on described InP film, be inverted growth form InGaAsP/InGaAs string junction battery structure, then form ohmic contact metal layer at described InGaAsP/InGaAs string junction battery body structure surface, and by described ohmic contact metal layer and translate substrate bonding, obtain complete inversion growth InGaP/GaAs/InGaAsP/InGaAs tetra-junction battery structure;
(5) described GaAs substrate not damaged from aforementioned InGaP/GaAs/InGaAsP/InGaAs tetra-junction battery structure is peeled off, and the device surface formed after peeling off GaAs substrate forms ohmic contact metal layer, and then conventional I II-V race battery process is adopted to obtain target product.
2. the preparation method of inverted-growth wide-spectrum absorption III-V multi-junction cell according to claim 1, it is characterized in that, be inverted GaInP/GaAs Stringing cells described in step (1) and be included in GaInP battery, tunnel junctions and the GaAs battery of substrate first surface being inverted growth.
3. the preparation method of the inverted-growth wide-spectrum absorption III-V multi-junction cell according to any one of claim 1-2, it is characterized in that, described deielectric-coating be selected from SiO2 film, SiN film, Al2O3 film and SiNO film and TiO2 film any one or a few, the formation method of described deielectric-coating be selected from plasma enhanced chemical vapor deposition, thermal evaporation deposition, electron-beam evaporation, magnetron sputtering, ald, inductively coupled plasma enhanced chemical vapor deposition one or more.
4. the preparation method of inverted-growth wide-spectrum absorption III-V multi-junction cell according to claim 1, it is characterized in that, the string of InGaAsP/InGaAs described in step (4) junction battery structure comprises on described InP film, grow formation successively InP resilient coating, inversion InGaAsP battery, tunnel junctions, InGaAs battery and InGaAs contact electrode layer.
5. the preparation method of the inverted-growth wide-spectrum absorption III-V multi-junction cell according to claim 1 or 4, is characterized in that, described in step (4), translate substrate is selected from any one in metal substrate, Semiconductor substrate and insulating material substrate.
6. the preparation method of the inverted-growth wide-spectrum absorption III-V multi-junction cell according to any one of claim 1-2; it is characterized in that; first by described InGaP/GaAs/InGaAsP/InGaAs tetra-junction battery structural entity protection in step (5); but make the Al(Ga near GaAs substrate in this four junction batteries structure) exposure of As substrate desquamation layer; and Al(Ga described in after etching) As substrate desquamation layer, until GaAs substrate is peeled off completely from described four junction battery structures.
7. the preparation method of inverted-growth wide-spectrum absorption III-V multi-junction cell according to claim 6; it is characterized in that; by carrying out Global Macros in described four junction battery body structure surface coating protects material layer to it in step (5); thereafter again so that can Al(Ga be etched) As substrate desquamation layer; but to the undamaged liquid state of protects material layer or gaseous state etachable material removing Al(Ga) As substrate desquamation layer, and then realize the stripping completely of GaAs substrate.
8. the preparation method of inverted-growth wide-spectrum absorption III-V multi-junction cell according to claim 7, it is characterized in that, after forming ohmic contact metal layer in step (5) on the device surface peeling off GaAs substrate, also adopt pervasive iii-v solar cell technique to carry out subsequent treatment to the multijunction solar cell device formed, finally obtain target product.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210213314.0A CN102723404B (en) | 2012-06-26 | 2012-06-26 | Method for preparing inverted-growth wide-spectrum absorption III-V multi-junction cell |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210213314.0A CN102723404B (en) | 2012-06-26 | 2012-06-26 | Method for preparing inverted-growth wide-spectrum absorption III-V multi-junction cell |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102723404A CN102723404A (en) | 2012-10-10 |
| CN102723404B true CN102723404B (en) | 2015-04-01 |
Family
ID=46949117
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210213314.0A Active CN102723404B (en) | 2012-06-26 | 2012-06-26 | Method for preparing inverted-growth wide-spectrum absorption III-V multi-junction cell |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102723404B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105990475B (en) * | 2015-02-11 | 2019-03-08 | 中国科学院苏州纳米技术与纳米仿生研究所 | Opto-electronic device and preparation method thereof |
| CN108520901A (en) * | 2018-04-16 | 2018-09-11 | 江苏宜兴德融科技有限公司 | Thin-film solar cells and its manufacturing method |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101142148A (en) * | 2005-02-18 | 2008-03-12 | 格拉沃贝尔公司 | Process for the selective etching of a glass article surface |
| US20100229926A1 (en) * | 2009-03-10 | 2010-09-16 | Emcore Solar Power, Inc. | Four Junction Inverted Metamorphic Multijunction Solar Cell with a Single Metamorphic Layer |
| CN101230226B (en) * | 2007-01-25 | 2016-03-23 | 新应材股份有限公司 | The composition of a kind of new process of double-faced micro-shadow etching and protective layer thereof |
| WO2009035746A2 (en) * | 2007-09-07 | 2009-03-19 | Amberwave Systems Corporation | Multi-junction solar cells |
| TW201138130A (en) * | 2010-04-23 | 2011-11-01 | Solapoint Corp | Multi-junction solar cell strucrure |
| CN102222734B (en) * | 2011-07-07 | 2012-11-14 | 厦门市三安光电科技有限公司 | Method for manufacturing inverted solar cell |
-
2012
- 2012-06-26 CN CN201210213314.0A patent/CN102723404B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN102723404A (en) | 2012-10-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Wu et al. | Improvement in separation rate of epitaxial lift-off by hydrophilic solvent for GaAs solar cell applications | |
| CN103000759B (en) | Preparation method of gallium arsenide thin-film multijunction stacked solar cells | |
| RU2547004C1 (en) | FABRICATION OF GaAs-BASED PHOTO INVERTER | |
| CN102723405B (en) | Method for preparing double-faced growth efficient wide-spectrum absorption multi-junction solar cell | |
| WO2017084491A1 (en) | Dual-junction thin film solar cell assembly, and manufacturing method thereof | |
| CN104752117A (en) | NEA electron source for vertically emitting AlGaAs/GaAs nanowires | |
| CN101728458B (en) | Preparation method of multi-junction solar cell | |
| CN103594302B (en) | A kind of GaAs nano-wire array photocathode and preparation method thereof | |
| CN109920874A (en) | Four-junction solar cell structure with high anti-irradiation capability and preparation method thereof | |
| CN104347754A (en) | Preparation method of thin-type GaInP/GaAs/Ge solar cell | |
| CN105226502B (en) | A kind of preparation method of narrow vallum type GaAs bases GaInP quantum well structure semiconductor lasers | |
| CN102723404B (en) | Method for preparing inverted-growth wide-spectrum absorption III-V multi-junction cell | |
| CN105161551A (en) | Surface passivation method capable of reducing dark current of InAs/GaSb superlattice long-wave infrared detector | |
| CN104659158A (en) | Inverted multi-junction solar cell and manufacturing method thereof | |
| CN102244151A (en) | Method for manufacturing solar battery | |
| CN110444607B (en) | Large-scale indium gallium arsenic focal plane detector with stress balance layer and preparation method | |
| Cruz-Campa et al. | Back-contacted and small form factor GaAs solar cell | |
| CN103915757A (en) | Method for preparing cavity surface of GaN-based semiconductor laser with sapphire substrate | |
| CN106340564B (en) | A kind of multijunction cell for spectroscopic calibration and preparation method thereof | |
| CN109768111A (en) | A kind of GaAs nano-pillar-graphene schottky junction solar battery and preparation method thereof | |
| TWI685124B (en) | Epitaxial lift-off processed gaas thin-film solar cells integrated with non-tracking mini-compound parabolic concentrators | |
| CN204596812U (en) | A kind of three knot GaAs solar cells with surface coarsening structure | |
| CN114975680A (en) | Gallium arsenide solar cell based on Van der Waals epitaxial lift-off and preparation method thereof | |
| CN113066907A (en) | Preparation method of three-junction gallium arsenide solar cell with nano-mesh surface electrode | |
| CN111403546A (en) | Diffusion method for preparing indium gallium arsenic photoelectric detector chip by predeposition diffusion source |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |