CN102723404A - Method for preparing inverted-growth wide-spectrum absorption III-V multi-junction cell - Google Patents

Method for preparing inverted-growth wide-spectrum absorption III-V multi-junction cell Download PDF

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CN102723404A
CN102723404A CN2012102133140A CN201210213314A CN102723404A CN 102723404 A CN102723404 A CN 102723404A CN 2012102133140 A CN2012102133140 A CN 2012102133140A CN 201210213314 A CN201210213314 A CN 201210213314A CN 102723404 A CN102723404 A CN 102723404A
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substrate
inp
battery
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CN102723404B (en
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张瑞英
董建荣
杨辉
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Suzhou Institute of Nano Tech and Nano Bionics of CAS
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Suzhou Institute of Nano Tech and Nano Bionics of CAS
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Abstract

The invention discloses a method for preparing an inverted-growth wide-spectrum absorption III-V multi-junction cell. Indium phosphide (InP) extension on a gallium arsenide (GaAs) material and monolithic integration of GaAs and InP cells are realized by using a high depth-to-width ratio dislocation capture technology, a GaInP/GaAs/InGaAsP/InGaAs multi-junction cell is prepared on a GaAs substrate by inverted growth, the GaInP/GaAs/InGaAsP/InGaAs multi-junction cell is transferred to a cheap substrate by using a layer transfer technology and a substrate peeling technology, and a high-cost-performance solar cell with high photoelectric conversion efficiency is obtained. The method provided by the invention is easy to implement and low in cost and can be applied to large-scale production of III-V multi-junction solar cells.

Description

Be inverted the preparation method of growth wide range absorption III-V multijunction cell
Technical field
The present invention relates to a kind of preparation technology of photovoltaic device, grow efficient wide range of particularly a kind of inversion absorbs III-V multijunction cell preparation method, belongs to technical field of solar batteries.
Background technology
Solar cell becomes the important development direction of regenerative resource as the typical way that solar energy utilizes, and improving efficiency of solar cell is one of target of solar cell pursuit.The III-V compound semiconductor is because its broad band structure becomes the ideal selection of solar cell material, and GaAs base III-V family multijunction cell has been the efficient record holder and the creator in solar cell field since coming out always.Can be with relation according to sun power spectrum and III-V family; The InGaAsP/InGaAs binode battery of the GaInP/GaAs binode battery of GaAs base lattice match and InP base lattice match can appropriate design, the most solar spectrums of currents match ground covering; Evidence; Adopt one time the beam split means, the battery efficiency of such solar battery system can reach 43%.It is the desirable combination that realizes the wide range efficient solar battery.But because GaAs material and InP material lattice mismatch degree reach 3.8%, conventional method is difficult to extension high-quality InP material on GaAs, therefore; In order to obtain efficient GaInP/GaAs/InGaAsP/InGaAs solar cell, adopt the method for wafer bonding to realize that GaAs is that battery and InP are the integrated of battery at present mostly, yet wafer bonding relate to kinds of processes (comprising that layer shifts and the chip lift-off technology) on the one hand; Make the success rate of chip reduce; On the other hand, GaAs material and InP material Direct Bonding are very high to the cleanliness factor requirement of environment and equipment, and because the difference of thermal expansion coefficients of the two; If the technology or the later stage work temperature difference are bigger behind the bonding; The warpage that all can cause material chip, and the series resistance of bonding between the latter two is bigger, can increase the electrical losses of this four junction battery virtually; In addition, the GaAs substrate is 6 inches, and quality is high and price is low; And the InP substrate is 4 inches, and of poor quality and price is high.These factors have all hindered based on wafer bonding and have realized that GaAs is that battery and InP are that battery monomer is integrated, and therefore only with prior art, still difficulty is accomplished scale production.
Summary of the invention
The objective of the invention is to deficiency of the prior art; A kind of preparation method that the growth wide range absorbs the III-V multijunction cell that is inverted is provided; It utilizes high-aspect-ratio dislocation capture technique to realize InP extension on the GaAs material; Thereby realization GaAs system and InP are that the monolithic of battery is integrated; And be grown on the GaAs substrate through inversion and realize the GaInP/GaAs/InGaAsP/InGaAs multijunction cell, through layer transfer technology and substrate desquamation technology it is transferred to inexpensive substrate more thereafter, obtained to have the high performance-price ratio solar cell of high light photoelectric transformation efficiency; And this preparation method is easy to implement; Can realize the large-scale production of III-V multijunction solar cell, and improve between GaAs material and the InP material lattice effectively and do not match and the unmatched difficult problem of thermal coefficient of expansion, help reliablely and stablely to realize that GaAs and InP are the integrated of battery.
For realizing the foregoing invention purpose, the preparation method that the inversion growth wide range that the present invention adopts absorbs the III-V multijunction cell comprises the steps:
(1) polishing grow successively on the GaAs substrate surface Al (Ga) As substrate desquamation layer, GaAs contact electrode layer, is being inverted GaInP/GaAs serial connection battery and GaAs protective layer;
(2) deposition forms deielectric-coating on said GaAs protective layer, and said deielectric-coating is carried out patterned, obtain nano-scale patterns medium mask structure, and comes out in GaAs protective layer surface that will be corresponding with non-mask regions;
(3) grow successively on the GaAs surface of said nano-scale patterns medium mask structure and form the InP dislocation and suppress layer, dislocation-free layer and film polymer layer, subsequently said InP polymer layer is polished, until obtaining the smooth InP film of device level; Wherein InP dislocation layer and dislocation-free layer growth adopt and select growing technology; Make the InP material be grown on the GaAs protective layer under the medium nanostructure mask; And effectively suppress the threading dislocation between GaAs and the InP material through nanometer dielectric mask structure side wall; Suppress layer thereby form the InP dislocation, suppress selective growth InP dislocation-free layer on the layer in this dislocation then, basic and nanometer dielectric structure height basically identical until the InP layer.In view of the growth of InP selective anisotropic, on this, further to strengthen cross growth and aggregate into film until InP, the material growth finishes.The InP film that then institute's polymerization is formed polishes and (comprises the multiple mode of chemical polishing, mechanical polishing or chemico-mechanical polishing, until obtaining the smooth InP film of device level.
(4) growth forms and is inverted InGaAsP/InGaAs string junction battery structure on the InP film after the said polishing; Then form ohmic contact metal layer at the InGaAsP/InGaAs of said inversion growth string junction battery body structure surface; And, obtain complete inversion growth InGaP/GaAs/InGaAsP/InGaAs four junction battery structures with said ohmic contact metal layer and translate substrate bonding;
(5) said GaAs substrate not damaged from aforementioned InGaP/GaAs/InGaAsP/InGaAs four junction battery structures is peeled off; And form ohmic contact metal layer peeling off on the device surface that forms behind the GaAs substrate; And then adopt conventional I II-V battery process, obtain target product.
Particularly, be inverted GaInP/GaAs serial connection battery described in the step (1) and be included in first GaInP battery, tunnel junctions and GaAs battery of going up the inversion growth of substrate.
Be at first to form pattern in the step (2) through chemistry and/or physical refining processes; Then adopt dry etching and/or wet-etching technology with design transfer to deielectric-coating; Thereby form smooth compact medium film figure, and the GaAs protective layer surface corresponding with non-mask regions exposed fully.
Preferably, said deielectric-coating can be selected from SiO 2Film, SiN film, Al 2O 3In film and the SiNO film any one, but be not limited thereto.
Be meant in the step (3) at the GaAs protective layer surface employing high-aspect-ratio dislocation capture technique corresponding grown InP dislocation successively and suppress layer, dislocation-free layer and InP polymer layer, and then form the InP film with non-mask regions.
The string of InGaAsP/InGaAs described in the step (4) junction battery structure comprises InP resilient coating, inversion InGaAsP battery, tunnel junctions and InGaAs battery and the InGaAs contact electrode layer that growth forms on said InP film successively.
Translate substrate can be selected from any one in metal substrate, Semiconductor substrate and the insulating material substrate described in the step (4), but is not limited thereto.
Be at first with said InGaP/GaAs/InGaAsP/InGaAs four junction battery structural entity protection in the step (5); Al (Ga) the As substrate desquamation layer near the GaAs substrate exposes in this four junction batteries structure but make; And the said Al of after etching (Ga) As substrate desquamation layer, until the GaAs substrate is peeled off from said four junction battery structures fully.
Further; Through applying the protective material layer it is carried out Global Macros in the step (5) at said four junction battery body structure surfaces; Thereafter again with can etching Al (Ga) As substrate desquamation layer; But undamaged liquid state of protective material layer or gaseous state etching material are removed Al (Ga) As substrate desquamation layer, and then realize peeling off fully of GaAs substrate, and the mode of peeling off can be that wet method also can be a dry method.
Further, after forming ohmic contact metal layer on the device surface of peeling off the GaAs substrate, also adopt pervasive III-V II-VI group solar cell technology that the multijunction solar cell device that forms has been carried out subsequent treatment in the step (5), finally obtained target product.
Description of drawings
Fig. 1 is the sketch map that MOCVD or MBE growth AlGaAs peel ply, GaAs contact electrode layer are adopted in growth on the GaAs substrate;
Fig. 2 is a sketch map of being inverted growth GaInP battery, tunnel junctions and GaAs battery;
Fig. 3 is the sketch map of deposition medium film on battery structure shown in Figure 2;
Fig. 4 is for realizing the sketch map of deielectric-coating nano-scale patternsization on battery structure shown in Figure 3 through micro-nano graph preparation technology; Wherein, (4A-1,4A-2: straight flute shape, 4B-1,4B-2: pattern; 4C-1,4C-2: cylindrical, 4D-1,4D-2: taper shape);
Fig. 5 adopts MOCVD or MBE grown InP dislocation to suppress the sketch map of layer, dislocation-free layer and InP film polymer layer on battery structure shown in Figure 4;
Fig. 6 is the sketch map after battery structure shown in Figure 5 carries out chemico-mechanical polishing;
Fig. 7 inserts the sketch map of MOCVD or MBE usable material chamber continued growth InP resilient coating, inversion growth InGaAsP battery, tunnel junctions and InGaAs battery and the InGaAs contact layer of growing at last for battery structure shown in Figure 6;
Fig. 8 is the sketch map that Fig. 7 gained battery structure is bonded to translate substrate;
Fig. 9 is the sketch map of battery structure shown in Figure 8 after realizing the GaAs substrate desquamation;
Figure 10 is the structural representation of the complete solar cell that obtained based on Fig. 1-material structure shown in Figure 9 and technology in the embodiment of the invention.
Embodiment
As previously mentioned, the saying of summary, the present invention be utilize high-aspect-ratio dislocation capture technique realize InP extension on the GaAs material (lattice mismatch of the two reaches 3.81%, and thermal mismatching is less, and is the zincblende cubic structure, wherein, GaAs thermal coefficient of expansion 5.73*10 -6℃ -1, InP thermal coefficient of expansion 4.6*10 -6℃ -1); And GaAs system and InP are that the monolithic of battery is integrated; And be grown on the GaAs substrate through inversion and realize the GaInP/GaAs/InGaAsP/InGaAs multijunction cell, through layer transfer technology and substrate desquamation technology it is transferred to inexpensive substrate more thereafter, obtained to have the high performance-price ratio solar cell of high light photoelectric transformation efficiency; And this preparation method is easy to implement, can realize the large-scale production of III-V multijunction solar cell.
Say that further technical scheme of the present invention is roughly:
1) on the GaAs of single-sided polishing substrate, adopt MOCVD or MBE grow successively Al (Ga) As substrate desquamation layer, GaAs contact electrode layer, be inverted the GaInP battery, be inverted tunnel junctions, be inverted GaAs battery and GaAs protective layer;
2) at the certain thickness deielectric-coating of the GaAs of this structure protective layer surface deposition, and, obtain nano-scale patterns medium mask, and non-mask regions is exposed protective layer GaAs material surface its enforcement nano-scale patternsization;
3) this nano-scale patterns sample is inserted in MOCVD or the MBE equipment again, the grown InP dislocation suppresses layer, dislocation-free layer and InP polymer layer successively, till obtaining this sample surfaces InP film;
4) above-mentioned growth is intact sample surfaces polishes; Obtain the smooth InP film of device level; Then this sample is inserted among the MOCVD (perhaps MBE); Grown InP resilient coating and inversion InGaAsP battery, tunnel junctions and inversion InGaAs battery and InGaAs contact electrode layer obtain complete inversion growth InGaP/GaAs/InGaAsP/InGaAs four junction battery structures thus successively;
5) the vapor deposition ohmic contact metal layer on the said structure surface is bonded to it on corresponding substrate then;
6) total is protected fully, but exposed Al (Ga) As, adopt HF corrosion Al (Ga) As material then, the entire cell structure is peeled off from the GaAs substrate fully near GaAs substrate position;
7) the sample surfaces vapor deposition ohmic contact metal layer after peeling off is prepared this GaInP/GaAs/InGaAsP/InGaAs four junction batteries then traditionally.
In the abovementioned steps 1; Al (Ga) As substrate desquamation layer material component is as long as satisfy: very large selection ratio is arranged during (1) and GaAs lattice match (2) HF corrosion and between the GaAs; The thickness of its grown layer is decided according to the needs of specific big or small substrate desquamation, as long as the device of being grown all can be intactly from the GaAs substrate desquamation.In view of this multijunction cell is the inversion growth structure, therefore, said GaInP battery, tunnel junctions and GaAs battery are all grown according to inverted structure successively, comprise material component and doping type and concentration; The GaAs contact electrode layer is then realized the highly doped of suitable type as far as possible; The GaAs protective layer is then realized opposite doping type as far as possible, and the thickness of GaAs protective layer is decided according to the needs of later stage depth-to-width ratio dislocation capture technique grown InP film.
In the abovementioned steps 2, the deielectric-coating material can be SiO 2, SiN, SiNO, Al 2O 3, the thickness of deielectric-coating is decided according to the needs of GaAs base InP depth-to-width ratio dislocation capture technique grown InP material.The figure generation type can be electron beam exposure, interference lithography, metal self assembly in the nano-scale patterns GaAs surface, in the technology such as ball photoetching, anodised aluminium one or more received are used in combination; The figure transfer mode can be dry etching (like reactive ion etching (RIE), inductively coupled plasma etching (ICP) and Ecr plasma etching (ECR) etc.), wet etching or the two combination; Form the high-aspect-ratio mask pattern of growth needs; This pattern can be the one-dimensional medium zanjon according to the material growth needs; Also can be TWO-DIMENSIONAL CIRCULAR CYLINDER, circular cone and square pattern; Can be periodic structure, also can be aperiodic structure, as long as can form smooth compact medium film figure; And exposed area exposes GaAs protective layer surface fully, and GaAs protective layer surface quality preserves from again and gets final product.
Growth conditions in the abovementioned steps 3 suppresses layer and dislocation-free layer can realize high-quality selective growth InP dislocation, and cross growth realizes the horizontal polymerization of high-quality InP layer.Wherein, InP dislocation layer and dislocation-free layer growth adopt selects growing technology; Make the InP material be grown on the GaAs protective layer under the medium nanostructure mask, and effectively suppress the threading dislocation between GaAs and the InP material, suppress layer thereby form the InP dislocation through nanometer dielectric mask structure side wall; Suppress selective growth InP dislocation-free layer on the layer in this dislocation then, basic and nanometer dielectric structure height basically identical until the InP layer.In view of the growth of InP selective anisotropic, on this, further to strengthen cross growth and aggregate into film until InP, the material growth finishes.The InP film that then institute's polymerization is formed polishes and (comprises the multiple mode of chemical polishing, mechanical polishing or chemico-mechanical polishing, until obtaining the smooth InP film of device level.In this process, in order on the GaAs substrate, to obtain effective high-quality InP thin-film material, the width of the GaAs layer that the height that needs deielectric-coating usually exposes greater than dielectric structure, therefore, this growing technology is referred to as high-aspect-ratio dislocation capture technique.
Surface finish can be adopted multiple modes such as chemico-mechanical polishing, chemical polishing, ion beam polishing in the abovementioned steps 4, as long as can obtain large tracts of land extension level evenness;
The vapor deposition ohmic contact metal layer can adopt equipment such as magnetron sputtering, electron beam evaporation in the abovementioned steps 5; The metal of vapor deposition can be N type metal ohmic contacts such as gold germanium nickel according to the dopant species of InGaAs contact electrode layer, also can be P type metal ohmic contacts such as titanium platinum; The substrate of bonding is metal substrate preferably, with do not increase extra Ohmic resistance (such as: materials such as stainless steel), certainly, according to actual needs, also can be Semiconductor substrate (like the Si material) or insulating material (like glass etc.).The bonding mode is different according to the substrate of institute's bonding, can select multiple modes such as metal bonding, the auxiliary bonding of plasma, anode linkage for use.
The material of protection total can be a metal in the abovementioned steps 6; Also can be organic substance (like materials such as photoresist, polyimides, polystyrene, PDMS); As long as this kind material does not react with fluoride, is easy to apply and remove; The mode of implementing protection is if metal then can adopt the magnetron sputtering mode; If organic substance then can adopt the mode of spin coating to obtain.Adopt fluoride corrosion Al (Ga) As material, wherein fluoride is peeled off the GaAs substrate and can be adopted liquid HF solution wet etching Al (Ga) As material, also can adopt the X of gaseous state 2F realizes substrate desquamation through the plasma dry undercutting.In a word, be benchmark to realize that not damaged GaAs surface and substrate are peeled off fully.
The ohmic contact layer of vapor deposition can be P type metal ohmic contacts such as titanium platinum according to the polarity of top layer GaAs contact layer in the abovementioned steps 7; Also can be N type metal ohmic contacts such as gold germanium nickel, the vapor deposition mode can be that magnetron sputtering also can be electron beam evaporation or thermal evaporation.Prepare this GaInP/GaAs/InGaAsP/InGaAs four junction batteries then traditionally.
Below in conjunction with a preferred embodiment and relevant indicators technical scheme of the present invention is described further:
Consult Fig. 1-Figure 10, the technological process of present embodiment is roughly following:
At first adopt MBE or MOCVD grow successively Al (Ga) As peel ply, GaAs contact electrode layer on GaAs polished substrate surface; As shown in Figure 1; Wherein Reference numeral 0 is the GaAs substrate, and 1 is Al (Ga) As peel ply, and 2 is the GaAs contact layer of high-concentration dopant; This contact layer thickness is 200-1000nm, and doping content is 1x10 18Cm -3-1x10 21Cm -3, doping type is confirmed that by the battery polar of design and preparation dopant material is confirmed according to the equipment sources of MOCVD and MBE.
Continue to utilize MOCVD or MBE to be inverted growth Al (Ga) InP Window layer 31 successively, to be inverted GaInP battery layers 3, to be inverted tunnel junctions 4, to be inverted GaAs battery layers 5 then, as shown in Figure 2.Wherein, Al (Ga) InP Window layer can be AlInP or Al (Ga) InP material with the GaAs lattice match according to the actual battery needs; GaInP battery 3 and GaAs battery 4 comprise the emitter layer (emitter) and a base layer (base layer) and a back of the body material of each battery respectively, and tunnel junctions material and structure can be GaAs/GaAs, GaInP/AlGaAs, also can be that GaAs/AlGaAs makes up according to material growing technology and relevant device; The doping type of above all material, dopant dose and growth thickness and order all need to confirm according to the design of being inverted growth GaInP/GaAs string junction battery.
And then deposition medium film on the growth GaInP/GaAs battery material well, as shown in Figure 3, other each Reference numeral institute's finger and front are similar, 6 deielectric-coating for deposition, and the deielectric-coating material can be SiN, SiO 2, TiO 2Perhaps Al 2O 3Deng, depositional mode can be PECVD, electron beam evaporation, thermal evaporation, thermal oxidation and ald etc., the thickness of deielectric-coating is decided according to the needs of GaAs base InP depth-to-width ratio dislocation capture technique grown InP material.
Fig. 4 provides through micro-nano graph preparation technology and realizes deielectric-coating nano-scale patterns sketch map, and wherein implication indication and the front of Reference numeral 0-6 are identical.The different micro-nano structures of Reference numeral 71-74 on deielectric-coating 6, realizing through the micro-nano graph branch mode; Wherein, the 71st, deielectric-coating is etched into one dimension zanjon shape, the 72nd, deielectric-coating is etched into two-dimentional zanjon shape, the 73rd, deielectric-coating is etched into cylinder pass, the 74th, deielectric-coating is etched into wedge shape.The figure generation type can be electron beam exposure, interference lithography, metal self assembly in the nano-scale patterns GaAs surface, in the technology such as ball photoetching, anodised aluminium one or more received are used in combination; The figure transfer mode can be dry etching (like reactive ion etching (RIE), inductively coupled plasma etching (ICP) and Ecr plasma etching (ECR) etc.), wet etching or the two combination; Form the high-aspect-ratio mask pattern of growth needs; This pattern can be an one-dimensional medium zanjon 71 according to the material growth needs; Also can be TWO-DIMENSIONAL CIRCULAR CYLINDER 73, circular cone 74 and square pattern 72; Can be periodic structure, also can be aperiodic structure, as long as can form smooth compact medium film figure; And exposed area exposes the GaAs surface fully, and the GaAs surface quality preserves from again and gets final product.
Fig. 5 is given in and adopts MOCVD or MBE grown InP dislocation to suppress layer 81, dislocation-free layer 82 and InP film polymer layer 83 sketch mapes on said structure and the figure; Wherein, Each figure is consistent for other digital indication and front; Here, Reference numeral 81,82 and 83 refers in above-mentioned medium micro-nano structure, adopt the dislocation of MOCVD or MBE continued growth to suppress layer, dislocation-free layer and InP film polymer layer respectively successively, wherein; Growth conditions suppresses layer and dislocation-free layer can realize high-quality selective growth InP dislocation, cross growth realization high-quality InP layer laterally be polymerized to target.
Fig. 6 provides the sketch map after sample after the said structure growth carries out chemico-mechanical polishing, and Reference numeral 84 is meant the InP film that surface of polished is smooth, and other digital indication and front are in full accord.Wherein, surface finish can be adopted multiple modes such as chemico-mechanical polishing, chemical polishing, ion beam polishing, as long as can obtain large tracts of land extension level evenness and few defective;
Fig. 7 provides the said structure sample and inserts MOCVD or MBE growth room again, continues the sketch map of grown InP resilient coating, inversion growth InGaAsP battery, tunnel junctions and InGaAs battery and InGaAs contact electrode layer successively; Wherein Reference numeral 84 is the InP resilient coating, and 9 are meant the InGaAsP battery, 10 of being inverted growth for tunnel junctions, 11 is that InGaAs battery, 12 is the InGaAs contact electrode layer, and other each digital indications and front are in full accord.The thickness of doping type, doping content and layers of material of layers of material of wherein growing to confirm according to design fully, and dopant is selected then to confirm according to structure needs and MOCVD and all source materials of MBE equipment.
Fig. 8 provides after the above-mentioned sample grown completion and at surperficial evaporation metal ohmic contact layer, is bonded to the sketch map on other substrates then, and wherein, Reference numeral 13 indications are substrates that bonding needs, and all the other each digital indications are identical with the front.Here; The vapor deposition ohmic contact metal layer can adopt equipment such as magnetron sputtering, electron beam evaporation; The metal of vapor deposition can be N type metal ohmic contacts such as gold germanium nickel according to the dopant species of InGaAs contact electrode layer, also can be P type metal ohmic contacts such as titanium platinum; The substrate of bonding is metal substrate preferably, with do not increase extra Ohmic resistance (such as: materials such as copper and stainless steel), certainly, according to actual needs, also can be Semiconductor substrate (like the Si material) or insulating material (like glass etc.).The bonding mode is different according to the substrate of institute's bonding, can select multiple modes such as metal bonding, the auxiliary bonding of plasma, anode linkage for use.
Fig. 9 provides the sample sketch map after above-mentioned sample is realized the GaAs substrate desquamation; Complete way is that total is protected fully, but exposes Al (Ga) As near GaAs substrate position, adopts fluoride corrosion Al (Ga) As material then, and the entire cell structure is peeled off from the GaAs substrate fully; Wherein, The material of protection total can be a metal; Also can be organic substance (like materials such as photoresist, polyimides, polystyrene, PDMS); As long as this kind material does not react with fluoride, is easy to apply and remove, the mode of implementing protection is if metal then can adopt the magnetron sputtering mode; If organic substance then can adopt the mode of spin coating to obtain.Adopt fluoride corrosion Al (Ga) As material, wherein fluoride is peeled off the GaAs substrate and can be adopted liquid HF solution wet etching Al (Ga) As material, also can adopt the X of gaseous state 2F realizes substrate desquamation through the plasma dry undercutting.In a word, be benchmark to realize that not damaged GaAs surface and substrate are peeled off fully.
Figure 10 is based on the complete solar cell sketch map of above-mentioned material structure and technology, and wherein, Reference numeral 14 is top battery ohmic contact layers, and the 15th, the anti-reflection passivating film of battery Window layer.The ohmic contact layer of vapor deposition can be P type metal ohmic contacts such as titanium platinum according to the polarity of top layer GaAs contact layer, also can be N type metal ohmic contacts such as gold germanium nickel, and the vapor deposition mode can be that magnetron sputtering also can be electron beam evaporation or thermal evaporation.Prepare this GaInP/GaAs/InGaAsP/InGaAs four junction batteries then traditionally.The anti-reflection passivating film can be that traditional double-deck antireflective film (like SiO2/TiO2 or ZnS/MgF) also can be like this case inventor related novel anti-reflection nanostructure in the patent application that proposes before this.
It is emphasized that above explanation and on drawing shown in embodiment, can not resolve the design philosophy of the present invention surely of exceeding.In technical field of the present invention, holding identical knowledge the knowledgeable can be with technical thought of the present invention with various form improvement change, and such improvement and change are interpreted as belonging in protection scope of the present invention.

Claims (10)

1. be inverted the preparation method that the growth wide range absorbs the III-V multijunction cell for one kind, it is characterized in that it comprises the steps:
(1) polishing grow successively on the GaAs substrate surface Al (Ga) As substrate desquamation layer, GaAs contact electrode layer, is being inverted GaInP/GaAs serial connection battery and GaAs protective layer;
(2) deposition forms deielectric-coating on said GaAs protective layer, and said deielectric-coating is carried out patterned, obtain nano-scale patterns medium mask structure, and comes out in GaAs protective layer surface that will be corresponding with non-mask regions;
(3) growth forms the InP film in said nano-scale patterns medium mask structure, subsequently said InP film is polished, until obtaining the smooth InP film of device level;
(4) on said InP film, be inverted growth and form InGaAsP/InGaAs string junction battery structure; Then form ohmic contact metal layer at said InGaAsP/InGaAs string junction battery body structure surface; And, obtain complete inversion growth InGaP/GaAs/InGaAsP/InGaAs four junction battery structures with said ohmic contact metal layer and translate substrate bonding;
(5) said GaAs substrate not damaged from aforementioned InGaP/GaAs/InGaAsP/InGaAs four junction battery structures is peeled off; And form ohmic contact metal layer peeling off on the device surface that forms behind the GaAs substrate, and then adopt conventional I II-V family battery process to obtain target product.
2. inversion growth wide range according to claim 1 absorbs the preparation method of III-V multijunction cell; It is characterized in that, be inverted GaInP/GaAs serial connection battery described in the step (1) and be included in first GaInP battery, tunnel junctions and GaAs battery of going up the inversion growth of substrate.
3. inversion growth wide range according to claim 1 absorbs the preparation method of III-V multijunction cell; It is characterized in that; Be at first to form pattern in the step (2) through chemistry and/or physical refining processes; Then adopt dry etching and/or wet-etching technology with design transfer to deielectric-coating, thereby form smooth compact medium film figure, and the GaAs protective layer surface corresponding with non-mask regions exposed fully.
4. absorb the preparation method of III-V multijunction cell according to each described inversion growth wide range among the claim 1-3, it is characterized in that said deielectric-coating is selected from SiO at least 2Film, SiN film, Al 2O 3Film and SiNO film and TiO 2In the film any one or a few, the formation method of said deielectric-coating is selected from one or more in plasma enhanced chemical vapor deposition, thermal evaporation deposition, electron-beam evaporation, magnetron sputtering, ald, the inductively coupled plasma enhanced chemical vapor deposition.
5. inversion growth wide range according to claim 1 absorbs the preparation method of III-V multijunction cell; It is characterized in that; In said nano-scale patterns medium mask structure, grow in the step (3) and form the InP film; Be meant that on the GaAs protective layer corresponding the grown InP dislocation suppresses layer, dislocation-free layer and InP polymer layer successively, and then form the InP film with non-mask regions.
6. inversion growth wide range according to claim 1 absorbs the preparation method of III-V multijunction cell; It is characterized in that the string of InGaAsP/InGaAs described in the step (4) junction battery structure comprises InP resilient coating, inversion InGaAsP battery, tunnel junctions, InGaAs battery and the InGaAs contact electrode layer that growth forms on said InP film successively.
7. according to the preparation method of claim 1 or 6 described inversion growth wide ranges absorption III-V multijunction cells, it is characterized in that translate substrate is selected from any one in metal substrate, Semiconductor substrate and the insulating material substrate described in the step (4).
8. absorb the preparation method of III-V multijunction cell according to each described inversion growth wide range among the claim 1-3; It is characterized in that; Be at first with said InGaP/GaAs/InGaAsP/InGaAs four junction battery structural entity protection in the step (5); Al (Ga) the As substrate desquamation layer near the GaAs substrate exposes in this four junction batteries structure but make, and the said Al of after etching (Ga) As substrate desquamation layer, until the GaAs substrate is peeled off from said four junction battery structures fully.
9. inversion growth wide range according to claim 8 absorbs the preparation method of III-V multijunction cell; It is characterized in that; Through applying the protective material layer it is carried out Global Macros in the step (5) at said four junction battery body structure surfaces; Again with can etching Al (Ga) As substrate desquamation layer, but undamaged liquid state of protective material layer or gaseous state etching material be removed Al (Ga) As substrate desquamation layer, and then realize peeling off fully of GaAs substrate thereafter.
10. inversion growth wide range according to claim 9 absorbs the preparation method of III-V multijunction cell; It is characterized in that; In the step (5) after forming ohmic contact metal layer on the device surface of peeling off the GaAs substrate; Also adopt pervasive III-V II-VI group solar cell technology that the multijunction solar cell device that forms has been carried out subsequent treatment, finally obtained target product.
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