CN102707227B - Threshold voltage extracting method of FET - Google Patents

Abstract

The invention relates to a threshold voltage extracting method of an FET (field effect transistor), which is especially suitable for a nanometer FinFET. The threshold voltage extracting method comprises the following steps: selecting different drain-source voltages Vds at three points, scanning grid-source voltage Vgs from -0.5V to +1.5V, testing a transfer current characteristic curve Ids-Vgs of the FET, and determining a device to regularly work; selecting different Vgs at three points, scanning the Vds from 0V to +1.5V, and testing an output current characteristic curve Ids-Vds of the FET; carrying out derivation on the Vds by drain-source output current Ids to obtain an output electric conductivity characteristics curve Gout-Vds, and selecting two points in a linear region to obtain the intercept and gradient of a corresponding straight line; and extracting threshold voltage Vth of the FET, Vth=(Vgs1-(etaA/etaB)Vgs2)/(1-etaA/etaB). The threshold voltage extracting method disclosed by the invention is realized simply, is not sensitive to offset fluctuation under low Vds and can suppress a short-channel effect and an ultrathin body effect caused by small devices.

Description

A kind of field-effect transistor threshold voltage extracting method

Technical field

The present invention relates to technical field of integrated circuits, be specifically related to a kind of field-effect transistor threshold voltage extracting method, especially a kind of nanofin formula field-effect transistor (FinFET) field-effect transistor threshold voltage extracting method.

Background technology

Along with integrated circuit technique develops nanoscale rapidly, FinFET field effect transistor becomes one of candidate structure having hope with the structure of its optimization and powerful grid-control ability.And along with integration density and the complexity of integrated circuit are more and more higher, require circuit design precision high, and the cycle is short, and cost is low, and design error is as far as possible few.Threshold voltage vt h is as the key parameter of semiconductor devices, to guaranteeing that the design of integrate circuit function successfully has decisive significance.Threshold voltage had a lot of definition and extracting method, but due to FinFET tagma and extremely short channel length as thin as a wafer, make threshold voltage be subject to the impact of short channel effect and ultra-thin body, cause extracting result very responsive to the fluctuation of bias voltage, the accuracy of result is extracted in impact.

Summary of the invention

The technical issues that need to address of the present invention are, how a kind of field-effect transistor threshold voltage extracting method is provided, and can greatly reduce or get rid of the impact of bias condition and small-size effect.

Technical matters of the present invention solves like this: build a kind of field-effect transistor threshold voltage extracting method, comprise the following steps:

101) select 3 different drain source voltage Vds, by gate source voltage Vgs from-0.5 volt scan+1.5 volts, test out the transfer current family curve Ids-Vgs of FinFET field effect transistor, determine that device normally works;

102) select 3 different gate source voltage Vgs, by Vds from 0 volt scan+1.5 volts, test out the output current characteristic curve Ids-Vds of FinFET field effect transistor; Drain-source output current Ids, to Vds differentiate, is obtained to output conductance family curve Gout-Vds; When Vds hour, Gout and Vds are linear; Utilize linear fit, in linear zone, obtain intercept A1 and the slope B1 of straight line under Vgs=Vgs1 condition, and intercept A2 and the slope B2 of straight line under Vgs=Vgs2 condition, wherein: Vgs1 ≠ Vgs2;

103) utilize the threshold voltage vt h of formula III and formula VI calculating FinFET field effect transistor, and draw the relation curve of Vth-Vds; Wherein:

η _aand η _bbe:

The intercept η of the linear zone extrapolation line of output conductance family curve Gout-Vds _aslope η with the linear zone extrapolation line of output conductance family curve Gout-Vds _b;

Formula III is:

${\mathrm{\η}}_A=\frac{{A_1|}_{V_{\mathrm{gs}1}}}{{A_2|}_{V_{\mathrm{gs}2}}}=\frac{1+\mathrm{\θ}(V_{\mathrm{gs}2}-V_{\mathrm{th}})}{1+\mathrm{\θ}(V_{\mathrm{gs}1}-V_{\mathrm{th}})}\·\frac{(V_{\mathrm{gs}1}-V_{\mathrm{th}})}{(V_{\mathrm{gs}2}-V_{\mathrm{th}})};$

Formula VI is:

${\mathrm{\η}}_B=\frac{B_1}{B_2}=\frac{{\mathrm{WC}}_{\mathrm{ox}}{\mathrm{\μ}}_{\mathrm{eff}1}/L}{{\mathrm{WC}}_{\mathrm{ox}}{\mathrm{\μ}}_{\mathrm{eff}2}/L}=\frac{1+\mathrm{\θ}(V_{{\mathrm{gs}}_2}-V_{\mathrm{th}})}{1+\mathrm{\θ}(V_{{\mathrm{gs}}_1}-V_{\mathrm{th}})}.$

According to extracting method provided by the invention, described 3 different drain source voltage Vds are respectively 0.1V, 0.3V and 0.5V.

According to extracting method provided by the invention, described 3 different gate source voltage Vgs are respectively 0.5V, 1V and 1.5V.

According to extracting method provided by the invention, it is nanometer FinFET field effect transistor that described field effect transistor includes, but are not limited to.

Field-effect transistor threshold voltage extracting method provided by the invention improves on the basis of FinFET field effect transistor output current model, utilizes the extrapolation of output conductance characteristic to extract exactly nanometer FinFET field-effect transistor threshold voltage.The method accuracy is high, simple to operate, affected by bias condition and small-size effect little, is applicable to extract small size device, is particularly useful for the threshold voltage of FinFET field effect transistor.

Accompanying drawing explanation

Below in conjunction with the drawings and specific embodiments, further the present invention is described in detail:

Fig. 1 is nanometer FinFET field-effect transistor structure schematic diagram;

Fig. 2 is the transfer current family curve Ids-Vgs under different grid-drain voltage Vds;

Fig. 3 is output current characteristic curve Ids-Vds and the output conductance family curve Gout-Vds under different gate source voltage Vgs;

Fig. 4 is the comparison of the result that obtains of output conductance the extrapolation method threshold voltage that extracts FinFET field effect transistor and the V_th generation method of having reported.

Embodiment

First, starting point of the present invention and theoretical foundation are described:

201) according to device physics, obtain the linear zone current expression (formula I) of FinFET field effect transistor

$I_{\mathrm{ds}}=\frac{{\mathrm{WC}}_{\mathrm{ox}}{\mathrm{\μ}}_{\mathrm{eff}}}{L}(V_{\mathrm{gs}}-V_{\mathrm{th}}-\frac{V_{\mathrm{ds}}}{2})V_{\mathrm{ds}}=\frac{{\mathrm{WC}}_{\mathrm{ox}}{\mathrm{\μ}}_0}{L[1+\mathrm{\θ}(V_{\mathrm{gs}}-V_{\mathrm{th}})]}(V_{\mathrm{gs}}-V_{\mathrm{th}}-\frac{V_{\mathrm{ds}}}{2})V_{\mathrm{ds}}---\left(I\right)$

In described formula I, W, L and Cox represent respectively effective channel width, length of effective channel, and gate oxide electric capacity.For FinFET device, channel width is W=2Hfin+Wfin (Hfin and Wfin are respectively height and the width of Fin structure here).Vth is threshold voltage, and Vgs is gate source voltage, and Vds is drain source voltage, and μ eff is effective mobility, and μ 0 is low mobility, and θ is effective mobility degeneration factor.

202) basis is to formula I both sides differentiate, and we obtain output conductance (formula II)

$G_{\mathrm{out}}=\frac{{\mathrm{dI}}_{\mathrm{ds}}}{{\mathrm{dV}}_{\mathrm{ds}}}=\frac{{\mathrm{WC}}_{\mathrm{ox}}{\mathrm{\μ}}_{\mathrm{eff}}}{L}[(V_{\mathrm{gs}}-V_{\mathrm{th}})-V_{\mathrm{ds}}]=A-B{V}_{\mathrm{ds}}---\left(\mathrm{II}\right)$

Draw the relation curve of output conductance Gout and Vds, intercept and slope are respectively A=WCox μ 0 (Vgs-Vth)/L and directly data and curves extraction by experiment of B=WCox μ eff/L.

203), at the lower output current curve of measuring of different gate source voltage (Vgs1 and Vgs2), obtain the ratio (A and B) of A and B in formula II, as shown in formula III and IV.

${\mathrm{\η}}_A=\frac{{A_1|}_{V_{\mathrm{gs}1}}}{{A_2|}_{V_{\mathrm{gs}2}}}=\frac{1+\mathrm{\θ}(V_{\mathrm{gs}2}-V_{\mathrm{th}})}{1+\mathrm{\θ}(V_{\mathrm{gs}1}-V_{\mathrm{th}})}\·\frac{(V_{\mathrm{gs}1}-V_{\mathrm{th}})}{(V_{\mathrm{gs}2}-V_{\mathrm{th}})}---\left(\mathrm{III}\right)$

${\mathrm{\η}}_B=\frac{B_1}{B_2}=\frac{{\mathrm{WC}}_{\mathrm{ox}}{\mathrm{\μ}}_{\mathrm{eff}1}/L}{{\mathrm{WC}}_{\mathrm{ox}}{\mathrm{\μ}}_{\mathrm{eff}2}/L}=\frac{1+\mathrm{\θ}(V_{{\mathrm{gs}}_2}-V_{\mathrm{th}})}{1+\mathrm{\θ}(V_{{\mathrm{gs}}_1}-V_{\mathrm{th}})}---\left(\mathrm{IV}\right)$

204) by formula IV substitution III, obtain formula V

η _A＝η _B(V _gs1-V _th)/(V _gs2-V _th) (V)

205) reorganize formula V, obtain threshold voltage (Vth) expression formula (formula VI)

$V_{\mathrm{th}}=\frac{V_{\mathrm{gs}1}-({\mathrm{\η}}_A/{\mathrm{\η}}_B)V_{\mathrm{gs}2}}{(1-{\mathrm{\η}}_A/{\mathrm{\η}}_B)}---\left(\mathrm{VI}\right)$

The second, the invention will be further described in conjunction with specific embodiments, but the present invention includes, is not limited to following examples:

This specific embodiment is used output conductance extrapolation method to extract nanometer FinFET field-effect transistor threshold voltage, and its detailed process comprises:

301) prepare nanometer FinFET field effect transistor to be measured, its concrete test structure as shown in Figure 1, comprises gate voltage 1, underlayer voltage 2, source electrode 3, drain electrode 4, grid 5, oxide layer 6, substrate 7, source voltage 8 and drain voltage 9.

302) as shown in Figure 2, by gate source voltage Vgs, from-scan+1.5V of 0.5V, drain source voltage Vds is respectively 0.1V, 0.3V, 0.5V.Test out the transfer current family curve Ids-Vgs of FinFET field effect transistor, determine that device normally works.

303) as shown in Figure 3, by drain source voltage Vds, from scan+1.5V of 0V, gate source voltage Vgs is respectively 0.5V, 1V, 1.5V.Test out the output current characteristic curve Ids-Vds of FinFET field effect transistor.

Output current (Ids), to drain voltage (Vds) differentiate, is obtained to the relation curve of output conductance Gout and drain source voltage Vds, as shown in square in Fig. 3.When Vds hour, Gout and Vds are linear.Utilize linear fit, obtain intercept and the slope of straight line under different Vgs conditions, be i.e. A and B in formula II.

204) utilize formula III to VI, to calculate the threshold voltage vt h of FinFET field effect transistor, and draw the relation curve of Vth and Vds, as shown in Figure 4.By contrasting with the result of previous " linear complementary divisor difference equation method " extraction threshold voltage of reporting, can find out in low Vds situation, utilize extraction result of the present invention affected by bias condition less, also in zero left and right, be significantly less than the error of the result that the extracting method reported obtains with the deviate of average threshold voltage.

The foregoing is only preferred embodiment of the present invention, all equalizations of doing according to the claims in the present invention scope change and modify, and all should belong to the covering scope of the claims in the present invention.

Claims (4)

1. a field-effect transistor threshold voltage extracting method, is characterized in that, comprises the following steps:

101) select 3 different drain source voltage Vds, under every some Vds by gate source voltage Vgs from-0.5 volt scan+1.5 volts, test out the transfer current family curve Ids-Vgs of FinFET field effect transistor, determine that device normally works;

102) select 3 different gate source voltage Vgs, under every some Vgs by Vds from 0 volt scan+1.5 volts, test out the output current characteristic curve Ids-Vds of FinFET field effect transistor; Drain-source output current Ids, to Vds differentiate, is obtained to output conductance family curve Gout-Vds; When Vds hour, Gout and Vds are linear; Utilize linear fit, in linear zone, obtain intercept A1 and the slope B1 of straight line under Vgs=Vgs1 condition, and intercept A2 and the slope B2 of straight line under Vgs=Vgs2 condition, wherein: Vgs1 ≠ Vgs2;

103) utilize formula III and formula VI to calculate the threshold voltage of FinFET field effect transistor and draw the relation curve of Vth-Vds; Wherein:

η A and η B are:

The slope η B of the linear zone extrapolation intercept η A of line of output conductance family curve Gout-Vds and the linear zone of output conductance family curve Gout-Vds extrapolation line;

Formula III is:

${\mathrm{\η}}_A=\frac{{A_1|}_{V_{\mathrm{gs}1}}}{{A_2|}_{V_{\mathrm{gs}2}}}=\frac{1+\mathrm{\θ}(V_{\mathrm{gs}2}-V_{\mathrm{th}})}{1+\mathrm{\θ}(V_{\mathrm{gs}1}-V_{\mathrm{th}})}\·\frac{(V_{\mathrm{gs}1}-V_{\mathrm{th}})}{(V_{\mathrm{gs}2}-V_{\mathrm{th}})};$

Formula VI is:

${\mathrm{\η}}_B=\frac{B_1}{B_2}=\frac{{\mathrm{WC}}_{\mathrm{ox}}{\mathrm{\μ}}_{\mathrm{eff}1}/L}{{\mathrm{WC}}_{\mathrm{ox}}{\mathrm{\μ}}_{\mathrm{eff}2}/L}=\frac{1+\mathrm{\θ}(V_{{\mathrm{gs}}_2}-V_{\mathrm{th}})}{1+\mathrm{\θ}(V_{{\mathrm{gs}}_1}-V_{\mathrm{th}})}.$

2. field-effect transistor threshold voltage extracting method according to claim 1, is characterized in that, described 3 different drain source voltage Vds are respectively 0.1V, 0.3V and 0.5V.

3. field-effect transistor threshold voltage extracting method according to claim 1, is characterized in that, described 3 different gate source voltage Vgs are respectively 0.5V, 1V and 1.5V.

4. according to field-effect transistor threshold voltage extracting method described in claim 1-3 any one, it is characterized in that, described field effect transistor is nanometer FinFET field effect transistor.