CN102694008B - High voltage component and method for manufacturing the same - Google Patents
High voltage component and method for manufacturing the same Download PDFInfo
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- CN102694008B CN102694008B CN201110072473.9A CN201110072473A CN102694008B CN 102694008 B CN102694008 B CN 102694008B CN 201110072473 A CN201110072473 A CN 201110072473A CN 102694008 B CN102694008 B CN 102694008B
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Abstract
The invention brings forward a high voltage component and a method for manufacturing the same. The high voltage component is formed in a first conductivity type substrate that utilizes an insulation region to define a component region. Besides, the high voltage component comprises a drift region, a grid electrode, a second conductivity type source electrode and a second conductivity type drain electrode. The drift region is located at the component region and is doped with second conductivity type impurities; the drift region is respectively arranged at a transverse direction and a longitudinal direction when viewed in a vertical view; and concentration distribution of the second conductivity type impurities approximately is changed periodically. The grid electrode is arranged on the substrate surface and is also arranged in the component region. And the second conductivity type source electrode and the second conductivity type drain electrode are arranged in the component region and at two sides of the grid electrode.
Description
Technical field
The present invention relates to a kind of high voltage device and manufacture method thereof, refer to a kind of high voltage device and the manufacture method thereof that strengthen crash guard voltage especially.
Prior art
Figure 1A and 1B shows double-diffused drain electrode metal-oxide semiconductor (MOS) (the double diffused drain metal oxide semiconductor of prior art respectively, DDDMOS) element cutaway view and stereogram, as referring to figs. la and 1b, insulation layer 12 is formed in P type substrate 11, to define element region 100, insulation layer 12 is such as shallow trench isolation (shallow trench isolation, STI) structure or zone oxidation (local oxidation of silicon, LOCOS) structure.In element region 100, formed grid 13, drift region 14, drain electrode 15, with source electrode 16.Wherein, drift region 14, drain electrode 15, source electrode 16 are shielding by micro-shadow technology or with part or all of grid 13, insulation layer 12, to define each region, and respectively with ion embedding technology, by N-type impurity, with the form of speeding-up ion, implant in the region of definition.Wherein, drain electrode 15 and source electrode 16 lay respectively at grid 13 down either side, and drift region 14 is positioned at drain electrode 15 side and part is positioned at below grid 13.DDDMOS element is high voltage device, that is its design is under being applied to higher operating voltage, but when DDDMOS element needs with when being generally integrated on same substrate compared with the element of low operating voltage, for coordinating the component technology compared with low operating voltage, need to make DDDMOS element and low voltage component with identical implanted ions parameter, the implanted ions parameter of DDDMOS element is restricted, thus reduces DDDMOS element crash guard voltage, limit the range of application of element.If do not sacrifice DDDMOS element crash guard voltage, then must increase processing step, make DDDMOS element with the step of different ions implantation parameter separately, but will manufacturing cost be improved thus, just can reach desired crash guard voltage.
Fig. 2 A and 2B shows horizontal proliferation (the lateral diffused metal oxidesemiconductor of prior art, LDMOS) element cutaway view and stereogram, compare with the prior art of Figure 1A and 1B, LDMOS element shown by Fig. 2 A and 2B separately has body zone 17, body pole 18, and its grid 13 some be positioned on insulation layer 12.Similarly, when LDMOS element needs with when being generally integrated on same substrate compared with the element of low operating voltage, because being limited to integrated process, and reduce LDMOS element crash guard voltage, limit the range of application of element, if do not sacrifice LDMOS element crash guard voltage, then also must increase processing step, improve manufacturing cost, just can reach desired crash guard voltage.
In view of this, the present invention, namely for above-mentioned the deficiencies in the prior art, proposes a kind of high voltage device and manufacture method thereof, when not increasing processing step, improve the crash guard voltage of element operation, increase the range of application of element, and the technique of low voltage component can be integrated in.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art and defect, proposes a kind of high voltage device and manufacture method thereof.
For reaching above-mentioned purpose, say with regard to one of them viewpoint, the invention provides a kind of high voltage device is formed in one first conduction type substrate, this substrate utilizes insulation layer to define an element region, and this high voltage device comprises: a drift region, is arranged in this element region, it has the second conductive-type impurity doping, and it is looked by vertical view in this drift region, respectively in transverse direction and longitudinal direction, the CONCENTRATION DISTRIBUTION of the second conductive-type impurity roughly has periodic change; Be positioned on this substrate surface, the grid in element region; And be arranged in this element region, the second conductivity type source electrode of these grid both sides, to drain with the second conductivity type.
Wherein in a kind of enforcement kenel, this drift region can comprise the first drift region and the second drift region, respectively between this source electrode and this grid, and between this drain electrode and this grid.
Wherein in the better enforcement kenel of one, can more comprise another element in this substrate, it has the second conductivity type wellblock, and wherein, this drift region utilizes the light shield identical with this second conductivity type wellblock and ion implantation technology step to be formed.
In the better enforcement kenel of another kind, the CONCENTRATION DISTRIBUTION of the second conductive-type impurity of this drift region should be multiple circulation patterns, and the plurality of circulation pattern is roughly around same center, and the corner of circulation pattern is complete or imperfect.
With regard to another viewpoint, present invention provides a kind of high voltage device manufacture method, comprise: a substrate is provided, and in wherein forming the first conductivity type wellblock and insulation layer to define element region; In this element region, form a drift region, it has the second conductive-type impurity doping, and it is looked by vertical view in this drift region, and respectively in transverse direction and longitudinal direction, the CONCENTRATION DISTRIBUTION of the second conductive-type impurity has periodic change; On this substrate surface, in element region, form a grid; And in this element region, these grid both sides, form the second conductivity type source electrode, drain with the second conductivity type, and separate this source electrode and this drain electrode with this drift region.
Wherein in the better enforcement kenel of one, the step forming this drift region should comprise: utilize a light shield, is formed and look it by vertical view on this substrate, roughly has the light resistance structure of mechanical periodicity pattern in transverse direction with longitudinal direction; Utilize ion embedding technology, by the second conductive-type impurity, with speeding-up ion form, implant in this substrate; And utilize thermal diffusion technology, make the second conductive-type impurity diffusion, form this drift region.
Wherein in a kind of enforcement kenel, this light shield should have at least one circulation pattern, and the corner of this circulation pattern can be complete or imperfect.
Illustrate in detail below by specific embodiment, when the effect being easier to understand object of the present invention, technology contents, feature and reach.
Accompanying drawing explanation
Figure 1A shows the DDDMOS element cutaway view of prior art;
Figure 1B shows the DDDMOS element stereogram of prior art;
Fig. 2 A shows the LDMOS element cutaway view of prior art;
Fig. 2 B shows the LDMOS element stereogram of prior art;
Fig. 3 A-3E shows first embodiment of the present invention;
The CONCENTRATION DISTRIBUTION of the second conductive-type impurity in the drift region of Fig. 4 A, 4B, 4C citing signal embodiment of the present invention;
Fig. 5 A-5B shows an alternative embodiment of the invention;
The CONCENTRATION DISTRIBUTION of the second conductive-type impurity in the drift region of Fig. 5 C citing signal embodiment of the present invention;
Fig. 6 A-6B shows an alternative embodiment of the invention.
Symbol description in figure
11 substrates
12 insulation layers
13 grids
14,14a drift region
15 drain electrodes
16 source electrodes
17 body zone
18 body poles
100 element regions
X transverse direction or lengthwise position
Second conductive-type impurity concentration in the 14a of N drift region
Embodiment
Graphic in the present invention all belongs to signal, is mainly intended to represent the orbution up and down between processing step and each layer, as shape, thickness and width then not according to scale.
Refer to Fig. 3 A-3E, show first embodiment of the present invention, Fig. 3 A shows the schematic perspective view that the present invention is applied to DDDMOS element.First need illustrate, be display invention emphasis, grid 13 is separated with substrate 11 and shows, to facilitate understanding.As shown in Figure 3A, in substrate 11, form insulation layer 12 to define element region 100, wherein substrate 11 is such as P type but is not limited to P type (can also be N-type); Insulation layer 12 is such as sti structure or zone oxidation LOCOS structure.In element region 100, formed grid 13, drift region 14a, drain electrode 15, with source electrode 16; Wherein, drain electrode 15 and source electrode 16 are such as N-type but are not limited to N-type (can also be P type).Drift region 14a is the second conductive-type impurity doping, such as be N-type but be not limited to N-type (can also be P type), unlike the prior art, it is looked by vertical view Fig. 3 B, drift region 14a is respectively in transverse direction and longitudinal direction, and the CONCENTRATION DISTRIBUTION of its second conductive-type impurity, roughly has periodic change, as multiple rectangles of drift region 14a in figure circulate with one heart illustrate, during rectangle circulates with one heart, the region that the second conductive-type impurity concentration is higher is illustrated in grid line region; And the interregional gray area of grid line illustrates the region that the second conductive-type impurity concentration is lower.The advantage of this kind of arrangement comprises: on component parameters, can improve the crash guard voltage of DDDMOS element; In technique, when the present embodiment DDDMOS element is integrated in low voltage component technique, a light shield and one group of ion implantation technology can be utilized, be for example and without limitation to the second conductivity type wellblock light shield in low voltage component technique, with the second conductivity type wellblock ion implantation technology, the CONCENTRATION DISTRIBUTION having carried out impurity has periodically variable drift region 14a, and does not need new intensifying hood or processing step in addition, therefore can reduce manufacturing cost.
Please continue to refer to Fig. 3 C, display the present embodiment forms the cross-sectional schematic of drift region 14a, as shown in Figure 3 C, on substrate 11, utilizes one section of lithography process of a light shield, forms light resistance structure 14c, to define the region of implanted ions; This light resistance structure 14c replicates the pattern on light shield haply, looks it by vertical view, and it has rectangle and to circulate with one heart pattern.Utilize ion embedding technology, by the second conductive-type impurity, implant the region defined by light resistance structure 14c with speeding-up ion implantation, anticipate as indicated by a dashed arrow in the figure, make the second conductive-type impurity distributed areas formed in substrate 11 as 14b in figure.After the thermal process of multiple tracks, because of the second conductive-type impurity diffusion in the second conductive-type impurity distributed areas 14b, the scope of its diffusion, as shown in dotted arrow in Fig. 3 D, to form drift region 14a.Because light resistance structure 14c looks it by vertical view, it has the circulation pattern of baked donut shape, therefore in the 14a of drift region, the CONCENTRATION DISTRIBUTION of the second conductive-type impurity, such as shown in Fig. 3 E, in the horizontal with longitudinally upper (transverse axis x represent position, longitudinal axis N represent concentration), all have periodic change.
The CONCENTRATION DISTRIBUTION of the second conductive-type impurity in the 14a of drift region, laterally with longitudinally on, roughly there is periodic change, but be not limited to as multiple rectangles of drift region 14a in figure circulate with one heart illustrate; For example, can also as Fig. 4 A (wherein circulation corner portion imperfect and to have the pattern in complete corner different from Fig. 3 B) or Fig. 4 B roughly around the concentric circulation of circular baked donut shape or the pattern signal person of Fig. 4 C, etc.In a word, only in transverse direction with in longitudinal direction, roughly have and periodically change, and its shape and arrangement mode need can change arbitrarily.
Fig. 5 A-5B shows an alternative embodiment of the invention, and Fig. 5 A shows the schematic perspective view that the present invention is applied to LDMOS element.First need illustrate, be display invention emphasis, grid 13 is separated with substrate 11 and shows, to facilitate understanding.As shown in Figure 5A, in substrate 11, form insulation layer 12 to define element region 100, wherein substrate 11 is such as P type but is not limited to P type; Insulation layer 12 is such as sti structure or zone oxidation LOCOS structure.In element region 100, formed grid 13, drift region 14a, drain electrode 15, source electrode 16, body zone 17, with body pole 18; Wherein, drain electrode 15 and source electrode 16 are such as N-type but are not limited to N-type; And body zone 17 and body pole 18 are such as P type but are not limited to P type.Unlike the prior art, it is looked by vertical view Fig. 5 B, drift region 14a is respectively in transverse direction and longitudinal direction, the CONCENTRATION DISTRIBUTION of its second conductive-type impurity, roughly there is periodic change, as multiple rectangles of drift region 14a in figure circulate with one heart illustrate, during rectangle circulates with one heart, the region that the second conductive-type impurity concentration is higher is illustrated in grid line region; And the interregional gray area of grid line illustrates the region that the second conductive-type impurity concentration is lower.The advantage of this kind of arrangement comprises: on component parameters, can improve the crash guard voltage of LDMOS element; In technique, when the present embodiment LDMOS element is integrated in low voltage component technique, can utilize a light shield with together with ion implantation technology to the CONCENTRATION DISTRIBUTION completing impurity, there is periodically variable drift region 14a, and do not need in addition new intensifying hood or processing step, therefore can manufacturing cost be reduced.
The CONCENTRATION DISTRIBUTION of the second conductive-type impurity in the 14a of drift region, in transverse direction with in longitudinal direction, roughly there is periodic change, but be not limited to as multiple rectangles of drift region 14a in Fig. 5 B circulate with one heart illustrate, can also illustrate by pattern as shown in Figure 5 C, can also be other any regular or irregular spread pattern certainly, as long as in transverse direction with in longitudinal direction, the CONCENTRATION DISTRIBUTION of the second conductive-type impurity, roughly has and periodically changes.
Refer to Fig. 6 A-6B, display an alternative embodiment of the invention, Fig. 6 A shows the schematic perspective view that the present invention is applied to DDDMOS element.With first embodiment unlike, the present embodiment is applied to the DDDMOS of symmetric form.As shown in figure 6 a and 6b, drift region 14a, except being formed at except in the substrate 11 between drain electrode 15 and grid 13, in the substrate 11 between source electrode 16 and grid 13, also can form another drift region 14a.Similarly, this another drift region 14a can also apply concept of the present invention, utilizes with lithography process, in transverse direction with in longitudinal direction, makes the CONCENTRATION DISTRIBUTION of the second conductive-type impurity, roughly has periodic change.
Below for preferred embodiment, the present invention is described, just the above, be only and make those skilled in the art be easy to understand content of the present invention, be not used for limiting interest field of the present invention.Under same spirit of the present invention, those skilled in the art can think and various equivalence change.Such as, not affecting under the main characteristic of element, other processing step or structure can be added, as deep-well district etc.; And for example, micro-shadow technology is not limited to masking techniques, also can comprise e-beam lithography; And for example, what is called periodically changes, and not representing must the ground impurity concentration cyclic variation of infallible difference, and should be considered as tolerable and have departing from a little; For another example, circulation pattern, except rectangle, circle, also can be other shape as hexagon, octangle etc.Scope of the present invention should contain above-mentioned and other all equivalence change.
Claims (9)
1. a high voltage device, it is formed in one first conduction type substrate, and this substrate utilizes insulation layer to define an element region, it is characterized in that, this high voltage device comprises:
One drift region, be arranged in this element region, it has the second conductive-type impurity doping, and it is looked by vertical view in this drift region, the CONCENTRATION DISTRIBUTION of the second conductive-type impurity is multiple circulation patterns, the plurality of circulation pattern is roughly around same center, make the CONCENTRATION DISTRIBUTION of this second conductive-type impurity by the second conductive-type impurity relative concentration lower one first circulation with the second conductive-type impurity relative concentration higher one second circulate interlock arranged adjacent formed, make respectively in transverse direction and longitudinal direction, the CONCENTRATION DISTRIBUTION of the second conductive-type impurity has periodic change;
Be positioned on this substrate surface, the grid in element region; And
Be arranged in this element region, this grid this transversely both sides the second conductivity type source electrode, drain with the second conductivity type;
Wherein, this drift region at this transversely, between this second conductivity type source electrode and this second conductivity type drain.
2. high voltage device as claimed in claim 1, wherein, this drift region comprises the first drift region and the second drift region, respectively between this source electrode and this grid, and between this drain electrode and this grid.
3. high voltage device as claimed in claim 1, wherein, also comprise another element in this substrate, it has the second conductivity type wellblock, and wherein, this drift region utilizes the light shield identical with this second conductivity type wellblock and ion implantation technology step to be formed.
4. high voltage device as claimed in claim 1, wherein, the corner of the plurality of circulation pattern is imperfect.
5. a high voltage device manufacture method, is characterized in that, comprises:
One substrate is provided, and in wherein forming the first conductivity type wellblock and insulation layer to define element region;
A drift region is formed in this element region, it has the second conductive-type impurity doping, and it is looked by vertical view in this drift region, the CONCENTRATION DISTRIBUTION of the second conductive-type impurity is multiple circulation patterns, the plurality of circulation pattern is roughly around same center, make the CONCENTRATION DISTRIBUTION of this second conductive-type impurity by the second conductive-type impurity relative concentration lower one first circulation with the second conductive-type impurity relative concentration higher one second circulate interlock arranged adjacent formed, make respectively in transverse direction and longitudinal direction, the CONCENTRATION DISTRIBUTION of the second conductive-type impurity has periodic change;
On this substrate surface, in element region, form a grid; And
In this element region, this grid, in these transversely both sides, forms the second conductivity type source electrode, drains with the second conductivity type, and separate this source electrode and this drain electrode with this drift region;
Wherein, this drift region at this transversely, between this second conductivity type source electrode and this second conductivity type drain.
6. high voltage device manufacture method as claimed in claim 5, wherein, this drift region comprises the first drift region and the second drift region, respectively between this source electrode and this grid, and between this drain electrode and this grid.
7. high voltage device manufacture method as claimed in claim 5, wherein, also comprise another element in this substrate, it has the second conductivity type wellblock, wherein, the step forming this drift region utilizes the light shield identical with this second conductivity type wellblock and ion implantation technology step to be formed.
8. high voltage device manufacture method as claimed in claim 5, wherein, the step of this this drift region of formation comprises:
Utilize a light shield, on this substrate, form a light resistance structure, and this light resistance structure by vertical view depending on there is the plurality of circulation pattern;
Utilize ion embedding technology, by the second conductive-type impurity, with speeding-up ion form, implant in this substrate; And
Utilize thermal diffusion technology, make the second conductive-type impurity diffusion, this first circulation forming staggered arranged adjacent second to circulate with this.
9. high voltage device manufacture method as claimed in claim 8, wherein, the corner of this circulation pattern is imperfect.
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| US7960786B2 (en) * | 2008-07-09 | 2011-06-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Breakdown voltages of ultra-high voltage devices by forming tunnels |
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