CN102655393B - ASK (Amplitude Shift Keying) modulator with self-calibration function - Google Patents
ASK (Amplitude Shift Keying) modulator with self-calibration function Download PDFInfo
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Abstract
The invention discloses an ASK (Amplitude Shift Keying) modulator with a self-calibration function. An ASK modulation circuit output end signal is used as an input end signal of an amplitude detection circuit; an output signal of the amplitude detection circuit is connected with the input end of a logic control circuit; under the action of a clock signal CLK (clock), the logic control circuit generates multi-bit output; the output signal serves as gain control signal to regulate the gain of an ASK modulation circuit; the amplitude detection circuit and the logic control circuit form a self-calibration feedback loop; a self-calibration trigger signal is simultaneously used as an input control signal for the amplitude detection circuit and the logic control circuit and can be used for triggering a circuit to work by a rising edge signal; the logic control circuit outputs a self-calibration end mark signal after the self-calibration operation is finished; the self-calibration end mark signal serves as a control signal for the amplitude detection circuit and the logic control circuit; the circuit is shut down to eliminate the influence by factors, such as temperature drift, process variation and the like; and the signals output after modulation have the advantages of stability and consistency.
Description
Technical field
The present invention relates to wireless communication technology field and integrated circuit (IC) design field, particularly, relate to a kind of ASK modulator with self-calibration function.
Background technology
Wireless communication technology develops rapidly to obtain apply very widely along with personal consumption class mobile terminal market.In order to reliable and effective transmission information, need to modulate initial data, in wireless communication technology, for the transmission of digital signal, ASK is a kind of simple and widely used modulation system, and ASK modulator is generally applied in reflector and transponder chip.ASK modulation is modulated in carrier amplitude by binary message, and wherein OOK is the simplest and modal a kind of form of ASK.
In transceiver or emitter structures, digital baseband processes transmitting data, by ASK modulator, amplitude keying modulation is carried out to the radio-frequency carrier signal that VCO or frequency divider produce, signal after modulation is launched through antenna outside power amplifier output chip, completes the wireless transmission of digital signal.
ASK modulator has two kinds of implementations, and one is converted to analog-modulated, and one is digital directly modulation.
The mode being converted to analog-modulated is applied comparatively extensive in traditional reflector or Transceiver Transmit link structure.Transmitting data is converted to analog signal form through digital to analog converter (DAC) by digital baseband signal, by AM modulator by itself and carrier signal modulation, thus obtains ASK modulation signal.This class formation, owing to modulating analog signal, therefore proposes restriction to modulator input signal dynamic range, DC operation point range etc., also has corresponding requirement to the parameter index such as signal to noise ratio, static characteristic of DAC module simultaneously.
Numeral directly modulation regulates modulator gain stage quantity etc. to change modulator gain as control signal digital baseband signal, thus realize amplitude modulation(PAM).In paper, all have employed this class formation.This mode is compared with first kind of way, decrease analog to digital converter and the requirement to performances such as the analog signal dynamic ranges be cascaded on modulator, but meanwhile because input gain level number is more, therefore differential pair parasitic capacitance is larger, decay is produced to carrier signal, and can larger area be expended.
In integrated circuit design, the factors such as process deviation, voltage fluctuation, ambient temperature (PVT) can affect greatly circuit performance and consistency, therefore need circuit to have stronger robustness and suppress the correcting circuit of the factor impacts such as PVT.ASK modulator has two functions, and one is realize ASK modulation, and another realizes amplifying the first order of modulation signal, modulates and signal after amplifying is transmitted by antenna transmission through PA amplification again.The input carrier signal amplitude of ASK modulator and modulator own gain are all subject to the impact of the factor such as temperature drift, process deviation, and therefore, signal amplitude shows larger unsteadiness and poor consistency.
Summary of the invention
The object of the invention is to, for the problems referred to above, propose a kind of ASK modulator with self-calibration function, to realize the impact eliminating the factor such as temperature drift, process deviation, the signal that modulation is exported has stability and conforming advantage.
For achieving the above object, the technical solution used in the present invention is:
There is an ASK modulator for self-calibration function, comprise ASK modulation circuit, amplitude detection circuit and logic control circuit,
Described ASK modulation circuit output end signal is as the input end signal of amplitude detection circuit, the output signal of described amplitude detection circuit is connected to the input of logic control circuit, described logic control circuit is under clock signal clk effect, generation multidigit exports, and this output signal regulates the gain of ASK modulation circuit as gain control signal;
Described amplitude detection circuit and logic control circuit form self calibration feedback loop, and self calibration triggering signal as the input control signal of amplitude detection circuit and logic control circuit, is worked by rising edge signal circuits for triggering simultaneously;
Described logic control circuit after self calibration has operated output from calibration end mark signal, as the control signal of amplitude detection circuit and logic control circuit, by circuit shut-down.
According to a preferred embodiment of the invention, described ASK modulation circuit: comprise coupling capacitance, difference channel, current steer array and encoder;
Carrier signal is input to difference channel by coupling capacitance C6 and coupling capacitance C7, and described first current steer array and the second current steer array in parallel are at the common source end of difference channel, and the drain electrode end of described difference channel connects load circuit;
The TX data of binary-coded decimal form and the gain control word of binary-coded decimal form are converted to Data Control first current steer array and the second current steer array of thermometer-code form by described first encoder and the second encoder respectively.
According to a preferred embodiment of the invention, described load circuit is on-chip inductor L1, on-chip inductor L2 and the capacitance tuning array of series connection.
According to a preferred embodiment of the invention, described capacitance tuning array, comprise N number of capacitance tuning unit, described capacitance tuning unit comprises switching tube, high value resistor R1, high value resistor R2, tuning capacitance C1, tuning capacitance C2, inverter X1 and inverter X2, described switching tube is transistor NM1 and transistor NM2, the source electrode of this transistor NM1 is connected with the source electrode of transistor NM2, the drain electrode of this transistor NM1 is connected with the drain electrode of transistor NM2, the grid of this switching tube is connected on AFC regulating circuit by inverter X1, its source electrode and drain electrode be series connection high value resistor R1 and high value resistor R2 respectively, described high value resistor R1 and high value resistor R2 is connected in parallel on the output of inverter X2, the input of inverter X2 is connected on the output of inverter X1, the source electrode of described switching tube and tuning capacitance C1 are connected on voltage VON, drain electrode and the tuning capacitance C2 of described switching tube are connected on voltage VOP.
According to a preferred embodiment of the invention, described current steer array is made up of N-type reference current source array and P type reference current source array, the reference current of current source is equivalence, the control word odd bits of thermometer-code form is connected on the control switch of P type current source, even bit is connected on the control switch of N-type current source, and the common input end of N-type current source array and the common output end of P type current source array are connected respectively to the common source end of two differential pairs of ASK modulation circuit.
According to a preferred embodiment of the invention, described amplitude detection circuit comprises coupling capacitance C3, coupling capacitance C4, difference channel source resistance R, charging capacitor C5, current source IB, comparator U1, comparator U2, transistor NM5, transistor NM6, biasing resistor RB1, biasing resistor RB2, biasing resistor RB3, biasing resistor RB4, buffer U3 and buffer U4, and described difference channel is made up of transistor NM3 and transistor NM4;
The radio-frequency component that modulation circuit outputs signal is transferred to difference channel by coupling capacitance C1 and coupling capacitance C2, difference channel changes this radio-frequency component into current signal, by the topological structure of source resistance R, charging capacitor C5 and current source IB composition, above-mentioned current signal is converted to DC level signal;
Biasing resistor RB1, biasing resistor RB2, biasing resistor RB3 and biasing resistor RB4 are connected on the grid of transistor NM3, transistor NM4, transistor NM5 and transistor NM6 respectively, and are connected on bias voltage VB, bias voltage VBN and bias voltage VBP that divider resistance string provides;
The positive plate voltage of charging capacitor C5 is connected to the positive input terminal of comparator U1 and comparator U2, and the negative input end of comparator U1 connects voltage VREFN, its output and buffer U3 cascade, and the output signal of buffer U3 exports DO0 as low level; The negative input end of comparator U2 connects voltage VREFP, its output and digit buffer U4 cascade, and buffer U4 outputs signal as high-order output signal DO1.
According to a preferred embodiment of the invention, described logic control circuit comprises XOR gate, NOR gate, counter 1, counter 2, reset circuit, clocking latches, register U5 and latch U6;
The comparative result that above-mentioned amplitude detection circuit exports, through XOR gate enter counter 1, when after counter 1 resets, continuous 4 periodical inputs remain logical one, counter 1 overflows and exports high level; After after counter 2 resets, continuous counter arrives set point, counter 2 overflows and exports high level; The output of counter 1 sum counter 2 is connected to the Enable Pin ENB of register U5, latch U6 and clocking latches through NOR gate.
Technical scheme of the present invention, by the negative feedback loop that amplitude detection circuit and logic control circuit are formed, work in self-calibration cycle, realize self calibration operation, reach the impact eliminating the factor such as temperature drift, process deviation, the signal that modulation is exported has stability and conforming object.CMOS technology element is adopted further to reduce the impact of the factors such as temperature drift, process deviation and PVT in circuit.
Other features and advantages of the present invention will be set forth in the following description, and, partly become apparent from specification, or understand by implementing the present invention.Object of the present invention and other advantages realize by structure specifically noted in write specification, claims and accompanying drawing and obtain.
Below by drawings and Examples, technical scheme of the present invention is described in further detail.
Accompanying drawing explanation
Accompanying drawing is used to provide a further understanding of the present invention, and forms a part for specification, together with embodiments of the present invention for explaining the present invention, is not construed as limiting the invention.In the accompanying drawings:
Fig. 1 is the reflector or the Transceiver Transmit link structure block diagram that adopt ASK modulator;
Fig. 2 is a kind of structured flowchart with the ASK modulator of self-calibration function of the present invention;
Fig. 3 a is the electrical circuit diagram of the ASK modulation described in the embodiment of the present invention;
Fig. 3 b is the electrical circuit diagram of capacitance tuning array in the ASK modulation circuit described in the embodiment of the present invention;
Fig. 3 c is the electric circuit of current steer array in the ASK modulation circuit described in the embodiment of the present invention;
Fig. 4 is the electrical circuit diagram of the amplitude detection described in the embodiment of the present invention;
Fig. 5 is the electrical circuit diagram of the logic control described in the embodiment of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the preferred embodiments of the present invention are described, should be appreciated that preferred embodiment described herein is only for instruction and explanation of the present invention, is not intended to limit the present invention.
As shown in Figure 2, there is the ASK modulator of self-calibration function, comprise ASK modulation circuit, amplitude detection circuit and logic control circuit; ASK modulation circuit output end signal is as the input end signal of amplitude detection circuit, the output signal of amplitude detection circuit is connected to the input of logic control circuit, logic control circuit is under clock signal clk effect, generation multidigit exports, and this output signal regulates the gain of ASK modulation circuit as gain control signal; Amplitude detection circuit and logic control circuit form self calibration feedback loop, and self calibration triggering signal as the input control signal of amplitude detection circuit and logic control circuit, is worked by rising edge signal circuits for triggering simultaneously; Logic control circuit after self calibration has operated output from calibration end mark signal, as the control signal of amplitude detection circuit and logic control circuit, by circuit shut-down.
As shown in Figure 3 a, ASK modulation circuit: comprise coupling capacitance, difference channel, current steer array and encoder; Carrier signal is input to difference channel by coupling capacitance C6 and coupling capacitance C7, and the first current steer array and the second current steer array in parallel are at the common source end of difference channel, and the drain electrode end of difference channel connects load circuit; The TX data of binary-coded decimal form and the gain control word of binary-coded decimal form are converted to Data Control first current steer array and the second current steer array of thermometer-code form by the first encoder and the second encoder respectively.
As shown in Figure 3 b, load circuit is on-chip inductor L1, on-chip inductor L2 and the capacitance tuning array of series connection.Capacitance tuning array, comprise N number of capacitance tuning unit, capacitance tuning unit comprises switching tube, high value resistor R1, high value resistor R2, tuning capacitance C1, tuning capacitance C2, inverter X1 and inverter X2, switching tube is transistor NM1 and transistor NM2, the source electrode of this transistor NM1 is connected with the source electrode of transistor NM2, the drain electrode of this transistor NM1 is connected with the drain electrode of transistor NM2, the grid of this switching tube is connected on AFC regulating circuit by inverter X1, its source electrode and drain electrode be series connection high value resistor R1 and high value resistor R2 respectively, high value resistor R1 and high value resistor R2 is connected in parallel on the output of inverter X2, the input of inverter X2 is connected on the output of inverter X1, the source electrode of switching tube and tuning capacitance C1 are connected on voltage VON, drain electrode and the tuning capacitance C2 of switching tube are connected on voltage VOP.
As shown in Figure 3 c, current steer array is made up of N-type reference current source array and P type reference current source array, the reference current of current source is equivalence, the control word odd bits of thermometer-code form is connected on the control switch of P type current source, even bit is connected on the control switch of N-type current source, and the common input end of N-type current source array and the common output end of P type current source array are connected respectively to the common source end of two differential pairs of ASK modulation circuit.
As shown in Figure 4, amplitude detection circuit comprises coupling capacitance C3, coupling capacitance C4, difference channel source resistance R, charging capacitor C5, current source IB, comparator U1, comparator U2, transistor NM5, transistor NM6, biasing resistor RB1, biasing resistor RB2, biasing resistor RB3, biasing resistor RB4, buffer U3 and buffer U4, and difference channel is made up of transistor NM3 and transistor NM4; The radio-frequency component that modulation circuit outputs signal is transferred to difference channel by coupling capacitance C1 and coupling capacitance C2, difference channel changes this radio-frequency component into current signal, by the topological structure of source resistance R, charging capacitor C5 and current source IB composition, above-mentioned current signal is converted to DC level signal; Biasing resistor RB1, biasing resistor RB2, biasing resistor RB3 and biasing resistor RB4 are connected on the grid of transistor NM3, transistor NM4, transistor NM5 and transistor NM6 respectively, and are connected on bias voltage VB, bias voltage VBN and bias voltage VBP that divider resistance string provides; The positive plate voltage of charging capacitor C5 is connected to the positive input terminal of comparator U1 and comparator U2, and the negative input end of comparator U1 connects voltage VREFN, its output and buffer U3 cascade, and the output signal of buffer U3 exports DO0 as low level; The negative input end of comparator U2 connects voltage VREFP, its output and digit buffer U4 cascade, and buffer U4 outputs signal as high-order output signal DO1.
As shown in Figure 5, logic control circuit comprises XOR gate, NOR gate, counter 1, counter 2, reset circuit, clocking latches, register U5 and latch U6; The comparative result that amplitude detection circuit exports, through XOR gate enter counter 1, when after counter 1 resets, continuous 4 periodical inputs remain logical one, counter 1 overflows and exports high level; After after counter 2 resets, continuous counter arrives set point, counter 2 overflows and exports high level; The output of counter 1 sum counter 2 is connected to the Enable Pin ENB of register U5, latch U6 and clocking latches through NOR gate.
Its operation principle is: ASK modulation circuit output end signal is as the input end signal of amplitude detection circuit, the 2bit output signal of amplitude detection circuit is connected to the input of logic control circuit, under clock signal clk effect, generation multidigit exports, and regulates the gain of ASK modulation circuit as gain control signal.Amplitude detection circuit and logic control circuit form self calibration feedback loop.Self calibration triggering signal as the input control signal of amplitude detection circuit and logic control circuit, is worked by rising edge signal circuits for triggering simultaneously.Logic control circuit after self calibration has operated output from calibration end mark signal, as amplitude detection circuit and logic control circuit control signal, by circuit shut-down.
Transistor NM7 to transistor NM710 connects into carrier signal input difference circuit, and electric capacity C6 and electric capacity C7 is carrier signal input coupling capacitance, and resistance RB5 and resistance RB6 is direct current biasing resistance, is connected with DC offset voltage VB.On-chip inductor L1 and on-chip inductor L2 and capacitance tuning array form output loading LC network, Id0, Id1 is differential pair fixed bias current, first current steer array is connected the common source end of two pairs of differential pairs with the second current steer array simultaneously, the TX data of binary-coded decimal form and the gain control word of binary-coded decimal form are Data Control first current steer array and the second current steer array of thermometer-code form respectively through the first encoder and the second coder transitions, wherein, first encoder only realizes the translation function of binary-coded decimal to thermometer-code, second encoder also realizes the recompile function of transmitting data simultaneously.
Transistor NM1 and transistor NM2 is switching tube, break-make controls by the AFC conditioning signal Df from frequency synthesizer, and R1, R2 are high value resistor, when switching tube conducting, tuning capacitance C1, C2 are as capacitive load work, and tuning capacitance C1, C2 are added to the total capacitance of capacitance tuning array; When switching tube disconnects, tuning capacitance C1, C2 connect with high value resistor R1, R2 respectively, and due to the high resistant characteristic of high value resistor R1, R2, this capacitance tuning unit disconnects in fact and do not participate in LC resonant network, and tuning capacitance C1, C2 are not added to total capacitance value.
The radio-frequency component that modulation circuit outputs signal is transferred to differential pair NM3 and NM4 by coupling capacitance C1, C2, change current signal into, by the topological structure of source resistance R, charging capacitor C5 and current source IB composition, current signal is converted to DC level signal, electric capacity (2C) top crown stablize after voltage be semaphore positively related with radiofrequency signal amplitude, achieve the extraction of range signal.
Two reference amplitude corresponding two direct voltage VREFN and VREFP respectively up and down set in design, these two generating circuit from reference voltage structures are identical with above-mentioned radio frequency amplitude-DC level switching circuit, transistor NM5, NM6 size is identical with transistor NM3, NM4, source resistance is R, current source is IB, and charging capacitor is C5.
The pole biasing resistor of transistor NM3 to grid NM6 is respectively resistance RB1 to RB4, and resistance RB1 to RB4 is connected on bias voltage VB, VBN, VBP that divider resistance string provides, and dividing ratios is adjustable by the resistance changing divider resistance.Due to VBP and VBN corresponding be the bound amplitude of reference range, therefore, regulate divider resistance string namely to achieve the adjustment of reference amplitude scope.Regulable control word is Dr, is usually produced by SPI.
The output of radio frequency amplitude-DC level switching circuit and the top crown voltage of charging capacitor C5 connect the positive input terminal of two comparators, wherein the negative input end of comparator U1 connects voltage VREFN, output and digit buffer U3 cascade, digit buffer U3 outputs signal and exports DO0 as low level; The negative input end of comparator U2 connects voltage VREFP, output and digit buffer U4 cascade, and digit buffer U4 outputs signal as high-order output signal DO1.This two digits signal is input to logic control circuit as comparative result.
D0 and D1 is the 2bit comparative result that above-mentioned amplitude detection circuit exports, and through XOR enter counter 1, after resetting, continuous 4 periodical inputs remain logical one hour counter 1 spilling and export high level; After after counter 2 resets, continuous counter arrives set point, counter overflow exports high level; The output of counter 1 sum counter 2 is connected to the Enable Pin ENB of successive approximation register U5, buffering/latch U6 and clocking latches through NOR gate.When meeting any one counting overflow condition, or door output low level, clock signal turns off by clocking latches, and successive approximation register turns off, and buffering/latch enters latch mode by buffer status, exports data and keeps.Or door output signal END turns back to transceiver or reflector main control unit as self calibration end mark signal.
When being in self calibration state and counter does not all overflow, successive approximation register U5 is D0 according to comparative result DIN and successively determines each bit value from high to low; D0 and D1 is connected to the HLD input of successive approximation register U5 after XOR gate, and when XOR gate exports as logical one, successive approximation register U5 numerical value remains unchanged.Under self calibration operating state, buffering/latch U6 is operated in buffer mode.The output Dg of buffering/latch U6 is the gain-adjusted control signal of ASK modulation circuit 21.
In sum, technical solution of the present invention has the following advantages:
1, ASK modulation circuit directly modulation digital baseband signal, compared to traditional AM modulation system to analog signal, eliminates DAC, simplifies design, reduce power consumption and area; Compared to the mode of the direct ride gain number of stages of digital signal, this circuit adopts Digital Signals tail current to realize ASK modulation, reduces ghost effect and the impact on front stage circuits thereof, simplifies design.
2, ASK modulation circuit has the point self-adapted regulatory function of load resonant, because LC network in carrier sheet has identical process deviation trend with VCO load LC network, therefore the AFC control signal provided according to frequency synthesizer can regulate resonance point, makes it roughly overlap with working frequency range center position.
3, radiofrequency signal amplitude transition is DC level signal by amplitude detection circuit, and the DC level corresponding with reference amplitude compares, and owing to adopting relative value, therefore has good robustness, little by process deviation influence.
4, the negative feedback loop be made up of amplitude detection circuit and logic control circuit can complete the automatic adjustment to exporting modulation signal amplitude in self-calibration cycle, amplitude output signal is made to be stabilized in setting range by the gain of adjustment modulation circuit, and not by the impact of the factors such as process deviation, temperature drift or power-supply fluctuation, for next stage power amplifier circuit provides fixing input reference signal, simplify design complexities.
5, the ASK modulator with self-calibration function that the present invention proposes is applicable to Radio-Frequency Wireless Communication transceiver or reflector, is applicable to CMOS technology.
Last it is noted that the foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, although with reference to previous embodiment to invention has been detailed description, for a person skilled in the art, it still can be modified to the technical scheme described in foregoing embodiments, or carries out equivalent replacement to wherein portion of techniques feature.Within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (7)
1. there is an ASK modulator for self-calibration function, comprise ASK modulation circuit, amplitude detection circuit and logic control circuit, it is characterized in that,
Described ASK modulation circuit output end signal is as the input end signal of amplitude detection circuit, the output signal of described amplitude detection circuit is connected to the input of logic control circuit, described logic control circuit is under clock signal clk effect, generation multidigit exports, and this output signal regulates the gain of ASK modulation circuit as gain control signal;
Described amplitude detection circuit and logic control circuit form self calibration feedback loop, self calibration triggering signal simultaneously as the input control signal of amplitude detection circuit and logic control circuit, triggers amplitude detection circuit and logic control circuit work by rising edge signal;
Amplitude detection circuit and logic control circuit output from calibration end mark signal, as the control signal of amplitude detection circuit and logic control circuit, turn off by described logic control circuit after self calibration has operated.
2. the ASK modulator with self-calibration function according to claim 1, is characterized in that, described ASK modulation circuit: comprise coupling capacitance, difference channel, current steer array and encoder;
Carrier signal is input to difference channel by coupling capacitance C6 and coupling capacitance C7, and the first current steer array and the second current steer array in parallel are at the common source end of difference channel, and the drain electrode end of described difference channel connects load circuit;
The gain control word of the transmitting data of binary-coded decimal form and binary-coded decimal form is converted to Data Control first current steer array and the second current steer array of thermometer-code form by the first encoder and the second encoder respectively.
3. the ASK modulator with self-calibration function according to claim 2, is characterized in that, described load circuit is on-chip inductor L1, on-chip inductor L2 and the capacitance tuning array of series connection.
4. the ASK modulator with self-calibration function according to claim 3, it is characterized in that, described capacitance tuning array, comprise N number of capacitance tuning unit, described capacitance tuning unit comprises switching tube, high value resistor R1, high value resistor R2, tuning capacitance C1, tuning capacitance C2, inverter X1 and inverter X2, described switching tube is transistor NM1 and transistor NM2, the source electrode of this transistor NM1 is connected with the source electrode of transistor NM2, the drain electrode of this transistor NM1 is connected with the drain electrode of transistor NM2, the grid of this transistor NM1 and transistor NM2 is connected on AFC regulating circuit by inverter X1, the source series high value resistor R1 of transistor NM1 and transistor NM2 and the drain series high value resistor R2 of transistor NM1 and transistor NM2, described high value resistor R1 and high value resistor R2 is connected in parallel on the output of inverter X2, the input of inverter X2 is connected on the output of inverter X1, the source electrode of described switching tube and tuning capacitance C1 are connected on voltage VON, drain electrode and the tuning capacitance C2 of described switching tube are connected on voltage VOP.
5. the ASK modulator with self-calibration function according to claim 2, it is characterized in that, described current steer array is made up of N-type reference current source array and P type reference current source array, the reference current of current source is equivalence, the control word odd bits of thermometer-code form is connected on the control switch of P type current source, even bit is connected on the control switch of N-type current source, and the common input end of N-type current source array and the common output end of P type current source array are connected respectively to the common source end of two differential pairs of ASK modulation circuit.
6. the ASK modulator with self-calibration function according to claim 1, it is characterized in that, described amplitude detection circuit comprises coupling capacitance C3, coupling capacitance C4, difference channel source resistance R, charging capacitor C5, current source IB, comparator U1, comparator U2, transistor NM5, transistor NM6, biasing resistor RB1, biasing resistor RB2, biasing resistor RB3, biasing resistor RB4, buffer U3 and buffer U4, and described difference channel is made up of transistor NM3 and transistor NM4;
The radio-frequency component that modulation circuit outputs signal is transferred to difference channel by coupling capacitance C1 and coupling capacitance C2, difference channel changes this radio-frequency component into current signal, by the topological structure of source resistance R, charging capacitor C5 and current source IB composition, above-mentioned current signal is converted to DC level signal;
Biasing resistor RB1 is connected on the grid of transistor NM3, biasing resistor RB2 is connected on the grid of transistor NM4, biasing resistor RB3 is connected on the grid of transistor NM6, biasing resistor RB4 is connected on the grid of transistor NM5, biasing resistor RB1 and biasing resistor RB2 is connected on the bias voltage VB that divider resistance string provides, biasing resistor RB3 is connected on the bias voltage VBP that divider resistance string provides, and biasing resistor RB4 is connected on the bias voltage VBN that divider resistance string provides;
The positive plate voltage of charging capacitor C5 is connected to the positive input terminal of comparator U1 and comparator U2, and the negative input end of comparator U1 connects voltage VREFN, its output and buffer U3 cascade, and the output signal of buffer U3 exports DO0 as low level; The negative input end of comparator U2 connects voltage VREFP, its output and digit buffer U4 cascade, and buffer U4 outputs signal as high-order output signal DO1.
7. the ASK modulator with self-calibration function according to claim 1 or 6, is characterized in that, described logic control circuit comprises XOR gate, NOR gate, counter 1, counter 2, reset circuit, clocking latches, register U5 and latch U6;
The comparative result that above-mentioned amplitude detection circuit exports, through XOR gate enter counter 1, when after counter 1 resets, continuous 4 periodical inputs remain logical one, counter 1 overflows and exports high level; After after counter 2 resets, continuous counter arrives set point, counter 2 overflows and exports high level; The output of counter 1 sum counter 2 is connected to the Enable Pin ENB of register U5, latch U6 and clocking latches through NOR gate.
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| CN110277966B (en) * | 2019-05-09 | 2023-03-14 | 上海类比半导体技术有限公司 | Self-calibration circuit and calibration method |
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| CN113411085B (en) * | 2021-06-29 | 2023-11-10 | 成都信息工程大学 | Successive approximation type capacitance detection circuit |
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| CN101867545A (en) * | 2010-05-31 | 2010-10-20 | 西安交通大学 | Frequency synthesizer of full-frequency range multi-band orthogonal frequency division multiplexing ultra-wideband radio frequency transceiver |
| CN102170289A (en) * | 2011-05-28 | 2011-08-31 | 西安电子科技大学 | Low-power-consumption orthogonality LC (inductance/capacitance) voltage controlled oscillator base on current multiplex |
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| CN101561889A (en) * | 2008-04-18 | 2009-10-21 | 上海坤锐电子科技有限公司 | SIM card chip with radio frequency identification function |
| CN101867545A (en) * | 2010-05-31 | 2010-10-20 | 西安交通大学 | Frequency synthesizer of full-frequency range multi-band orthogonal frequency division multiplexing ultra-wideband radio frequency transceiver |
| CN102170289A (en) * | 2011-05-28 | 2011-08-31 | 西安电子科技大学 | Low-power-consumption orthogonality LC (inductance/capacitance) voltage controlled oscillator base on current multiplex |
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Address after: 214135 5th floor, block C1, Weina garden, 200 Linghu Avenue, Xinwu District, Wuxi City, Jiangsu Province Patentee after: WUXI ZHONGKE MICROELECTRONIC INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE Co.,Ltd. Address before: 9F, Block C, China Sensor Network International Innovation Park, No. 200, Linghu Avenue, New District, Wuxi City, Jiangsu Province, 214000 Patentee before: WUXI ZHONGKE MICROELECTRONIC INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE Co.,Ltd. |