CN102651391A - High junction temperature semiconductor controllable silicon - Google Patents

High junction temperature semiconductor controllable silicon Download PDF

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Publication number
CN102651391A
CN102651391A CN2011100454941A CN201110045494A CN102651391A CN 102651391 A CN102651391 A CN 102651391A CN 2011100454941 A CN2011100454941 A CN 2011100454941A CN 201110045494 A CN201110045494 A CN 201110045494A CN 102651391 A CN102651391 A CN 102651391A
Authority
CN
China
Prior art keywords
junction temperature
controllable silicon
silicon
electrode base
copper electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2011100454941A
Other languages
Chinese (zh)
Inventor
伍林
潘建英
左亚兵
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
YIXING HUANZHOU MICRO-ELECTRONICS Co Ltd
Original Assignee
YIXING HUANZHOU MICRO-ELECTRONICS Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by YIXING HUANZHOU MICRO-ELECTRONICS Co Ltd filed Critical YIXING HUANZHOU MICRO-ELECTRONICS Co Ltd
Priority to CN2011100454941A priority Critical patent/CN102651391A/en
Publication of CN102651391A publication Critical patent/CN102651391A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301Thyristor

Abstract

The invention discloses a high junction temperature semiconductor controllable silicon, particularly relates to a high junction temperature semiconductor controllable silicon BTB16, which includes a copper electrode base, two copper pins arranged on the copper electrode base, a high junction temperature controllable silicon chip welded on the copper electrode base, and plastic sealed material welded on the copper electrode base, wherein a gate pole and a negative pole of the high junction temperature controllable silicon chip can be welded on the two copper pin through ultrasonic welding via metal wires; and the entire high junction temperature controllable silicon chip is encapsulated on the copper electrode base through the plastic sealed material, so as to form a complete high junction temperature BTB16 controllable silicon. The maximum temperature of a PN junction of the semiconductor controllable silicon at home is 110 DEG C, and the maximum junction temperature of the improved semiconductor controllable silicon provided by the invention is up to more than 140 DEG C, so that the high junction temperature semiconductor controllable silicon is applicable to wider fields and meets standards with higher requirements.

Description

A kind of high junction temperature semiconductor controllable silicon
Technical field
The present invention relates to a kind of high junction temperature semiconductor controllable silicon, be specifically related to the high junction temperature semiconductor controllable silicon BTB16 that a kind of control or Switching Power Supply are used.
Background technology
At present, common controllable silicon be widely used in Switching Power Supply with or pressure regulation with on the equipment, as be widely used in speed governing, pressure regulation, on the light modulation power supply, but the junction temperature of common silicon controlled PN junction of the prior art is 110 ℃.Therefore, present common controllable silicon BTB16 of the prior art can not satisfy the standard of high request.
Summary of the invention
Goal of the invention: the objective of the invention is in order to overcome the deficiency of prior art, provide a kind of PN junction maximum junction temperature to reach the high junction temperature semiconductor controllable silicon BTB16 more than 140 ℃.
Technical scheme: in order to realize above purpose; The present invention has adopted a kind of so high junction temperature semiconductor controllable silicon; It comprises copper electrode sheet base, be arranged on two pins on the copper electrode sheet base, be welded on the high test by method of controllable junction temperature silicon on the copper electrode sheet base; Through on welded wire to two pin, plastic packaging material is encapsulated in whole controlled silicon chip on the copper electrode base, forms a complete high test by method of controllable junction temperature silicon BTB16 respectively for the gate pole of described controlled silicon chip and negative electrode.
Described high junction temperature semiconductor controllable silicon BTB16, the wherein said controlled silicon chip that is welded on the base is high test by method of controllable junction temperature silicon, the high test by method of controllable junction temperature silicon chip area that wherein adopts is any chip area and each shape.
Described high junction temperature semiconductor controllable silicon BTB16, wherein base is a copper electrode, this copper electrode base can adopt difformity, the copper electrode sheet than large tracts of land or thickness that also can adopt.
Described high junction temperature semiconductor controllable silicon, wherein plastic packaging material is encapsulated in whole high test by method of controllable junction temperature silicon on the copper electrode base, forms the controllable silicon of a complete Plastic Package.
Beneficial effect: high junction temperature semiconductor controllable silicon maximum junction temperature of the present invention can reach more than 140 ℃; And general semiconductor controllable silicon BTB16 maximum junction temperature of the prior art can reach 110 ℃, in actual application, has improved product reliability in use greatly.
Description of drawings
Fig. 1 is a high junction temperature semiconductor silicon controlled structural representation of the present invention.
Fig. 2 is the sectional structure sketch map of Fig. 1 along the A-A direction.
Specific embodiment
Like Fig. 1, shown in Figure 2; A kind of high junction temperature semiconductor controllable silicon; Be specially improvement semiconductor controllable silicon BTB16; It comprises copper electrode base 1, be arranged on two copper pins 2 on the copper electrode base 1, be welded on high test by method of controllable junction temperature silicon 3 on the copper electrode base 1, stick in the plastic packaging material 4 on the copper electrode base 1, and the gate pole 7 and the negative electrode 6 of wherein high test by method of controllable junction temperature silicon 3 are ultrasonically bonded on two copper pins 2 through wire 5 usefulness respectively, and wherein plastic packaging material 4 is encapsulated in whole controlled silicon chip 3 on the copper electrode base 1; The area of the high test by method of controllable junction temperature silicon 3 that wherein adopts is any chip area and each shape, forms a complete high test by method of controllable junction temperature silicon 8.

Claims (3)

1. one kind high junction temperature semiconductor controllable silicon; It is characterized in that: it comprises copper electrode base (1), be arranged on two copper pins (2) on this copper electrode base (1), be welded on high test by method of controllable junction temperature silicon (3) on the said copper electrode base (1), the gate pole (7) of this high test by method of controllable junction temperature silicon (3) and negative electrode (6) respectively through wire (5) with being ultrasonically bonded on two copper pins (2); Plastic packaging material (4) is encapsulated in whole high test by method of controllable junction temperature silicon (3) on the copper electrode base (1), forms a complete high test by method of controllable junction temperature silicon (8) thus.
2. high junction temperature semiconductor controllable silicon according to claim 1 is characterized in that: said high test by method of controllable junction temperature silicon (8) maximum junction temperature reaches more than 140 ℃.
3. high junction temperature semiconductor controllable silicon according to claim 1 is characterized in that: said high test by method of controllable junction temperature silicon (3) be shaped as any geometry.
CN2011100454941A 2011-02-25 2011-02-25 High junction temperature semiconductor controllable silicon Pending CN102651391A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2011100454941A CN102651391A (en) 2011-02-25 2011-02-25 High junction temperature semiconductor controllable silicon

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2011100454941A CN102651391A (en) 2011-02-25 2011-02-25 High junction temperature semiconductor controllable silicon

Publications (1)

Publication Number Publication Date
CN102651391A true CN102651391A (en) 2012-08-29

Family

ID=46693352

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2011100454941A Pending CN102651391A (en) 2011-02-25 2011-02-25 High junction temperature semiconductor controllable silicon

Country Status (1)

Country Link
CN (1) CN102651391A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1047939A (en) * 1989-03-14 1990-12-19 莫托罗拉公司 The reinforced plastics capsule is to the method for the adhesive force of copper containing leadframe
CN1830080A (en) * 2003-07-30 2006-09-06 关西电力株式会社 High-heat-resistant semiconductor device
CN202003999U (en) * 2011-02-25 2011-10-05 宜兴市环洲微电子有限公司 High junction temperature semiconductor controlled silicon

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1047939A (en) * 1989-03-14 1990-12-19 莫托罗拉公司 The reinforced plastics capsule is to the method for the adhesive force of copper containing leadframe
CN1830080A (en) * 2003-07-30 2006-09-06 关西电力株式会社 High-heat-resistant semiconductor device
CN202003999U (en) * 2011-02-25 2011-10-05 宜兴市环洲微电子有限公司 High junction temperature semiconductor controlled silicon

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Application publication date: 20120829