CN102629237B - 非易失性半导体存储器及搜索最后写入地址的方法 - Google Patents
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Abstract
本发明涉及非易失性半导体存储器的多个器件的并行搜索。公开了一种非易失性半导体存储器，其包括N个存储器器件，每个存储器器件包括多个块，其中每个块包括通过地址访问的多个存储器段。通过为N个存储器器件的每个发出读取命令来进行搜索，其中每个读取命令的地址间隔的距离是响应于地址的搜索范围和N确定的距离；地址的搜索范围大于N。从至少一个存储器器件读取的数据被评估以确定搜索是否完成。
Description
技术领域
本公开总体涉及非易失性半导体存储器的多个器件的并行搜索。
背景技术
非易失性半导体存储器(NVSM)可以被用作计算机系统(例如，桌上型计算机、膝上型计算机、便携式计算机等)或者消费类设备(例如，音乐播放器、手机、相机等)或者其它合适应用的大容量存储器。NVSM可以包括一个或更多个存储器器件(诸如闪存存储器)和用于存取/访问每个存储器器件的控制电路。每个存储器器件被耦合到I/O总线以及多个接口控制线。当向存储器器件发出编程命令或者擦除命令时，控制电路经由I/O总线传递地址和命令数据(以及用于编程操作的写入数据)。当发出读取命令时，控制电路经由I/O总线传递地址和命令数据，然后经由I/O总线接收读取数据。
每个存储器器件通常包括以段编程的一个或更多个存储器阵列，这些段被称为“页”。多个页被分组为“块”，其中通过擦除整块的页来擦除页。因此，在擦除周期期间擦除块之前，单个块的不同页(或者部分页)可以在多个编程周期上被编程。
通常保持写日志，该写日志包括地址映射(逻辑块地址到物理块地址)以及最后写入的页。将写日志周期性地写到NVSM从而使其跨过加电周期被保存。然而，当发生电力故障时可能不能保存写日志，因此当NVSM被加电时不能从写日志确定最后写入的块。相反，通常搜索NVSM以定位最后写入的页，例如通过搜索标识最后写入页的地址的特定模式。
发明内容
根据本公开的一个实施例，一种非易失性半导体存储器，其包括N个存储器器件和控制电路，其中每个存储器器件包括多个块，其中多个块中的每个块包括通过地址访问的多个存储器段，控制电路可操作用于通过以下操作在地址的搜索范围内通过进行搜索来定位最后写入的地址：为N个存储器器件的每个发出读取命令，其中每个读取命令的地址间隔一距离，该距离是基于地址的搜索范 围和N确定的；并且地址的搜索范围大于N；以及评估从至少一个存储器器件中读取的数据以确定搜索是否完成。
根据本公开的另一个实施例，一种搜索非易失性半导体存储器中的最后写入的地址的方法，该非易失性半导体存储器包括N个存储器器件，每个存储器器件包括多个块，其中多个块中的每个块包括通过地址访问的多个存储器段，该方法包括：为N个存储器器件的每个发出读取命令，其中每个读取命令的地址间隔一距离，该距离是基于非易失性半导体存储器的地址的搜索范围和N确定的；并且地址的搜索范围大于N；以及评估从至少一个存储器器件读取的数据以确定搜索是否完成。
附图说明
图1A示出根据本发明实施例包括N个存储器器件的非易失性半导体存储器。
图1B示出根据本发明实施例的流程图，其中通过向N个存储器器件的每个发出读取命令来进行搜索，其中每个读取命令的地址间隔的距离是由搜索范围和N确定的距离。
图1C图示说明示例性实施例，其中存在3个存储器器件，搜索范围是27个地址，并且读取命令的地址之间的距离是9。
图2A图示说明示例性实施例，其中存在4个存储器器件，初始搜索范围是81个地址，并且读取命令的地址之间的初始距离是20。
图2B图示说明示例性实施例，其中在第一搜索迭代之后，搜索范围更新为20，并且读取命令的地址之间的距离更新为5。
图2C图示说明示例性实施例，其中调整读取命令的地址从而使得地址对N取模的结果是唯一的(从而读取命令被发送到N个存储器器件的每个)。
图2D图示说明第三和最后搜索迭代的示例性实施例，其中发出读取命令的连继的地址，每个地址针对N个存储器器件的每个。
图3是根据本发明实施例的流程图，其中在每次搜索迭代之后更新搜索范围和读取命令的地址之间的距离。
图4A-图4C示出替代实施例，其中调整读取命令的地址从而使得地址对N取模的结果是唯一的(从而读取命令被发送到N个存储器器件的每个)。
具体实施方式
图1A示出根据本发明实施例的非易失性半导体存储器2，其包括N个存储器器件41-4N，每个存储器器件包括多个块，其中每个块包括通过地址访问的多个存储器段。非易失性半导体存储器2还包括控制电路6，控制电路6可操作用于执行图1B的流程图，其中通过对N个存储器器件的每个发出读取命令来执行搜索，并且每个读取命令的地址间隔一定的距离，该距离是响应于地址的搜索范围和N确定的，并且该地址的搜索范围大于N(步骤8)。从至少一个存储器器件读取的数据被评估以确定搜索是否完成(步骤10)。
非易失性半导体存储器2可以包括控制电路6和存储器器件41-4N的任意适当配置。在一个实施例中，每个存储器器件41-4N包括适当的闪存存储器(例如，NAND或者NOR闪存)，并且控制电路6包括适当的闪存控制器。在一个实施例中，控制电路6通过对磁盘驱动器进行仿真来实现固态驱动器(SSD)，该磁盘驱动器可由主机系统使用标准磁盘驱动器通信协议(例如，ATA协议)访问。在图1A的实施例中，每个存储器器件包括多个块，并且每个块包括多个被称为页的存储器段。在读/写命令期间访问的存储器段可以包括任意适当大小，诸如一块页中的完整页或者部分页。在本发明的实施例中，例如，当尝试找到电力故障期间最后写入的页时，可以搜索分配给存储器器件的存储器段的地址范围。
图1C示出示例性实施例，其中非易失性半导体存储器2包括能够并行处理读/写命令的3个存储器器件(N＝3)。例如，当处理写命令时，数据可以并行地作为“超级块”写入到三个连继地址(例如，A1、A2和A3)，每个地址被分配到3个存储器器件的每个中的块的相应存储器段。接着可以通过读取三个连继地址的超级块即并行地从每个存储器器件读取相应存储器段来处理读取操作。
在一个实施例中，为了加速搜索存储器器件(例如，找到电力故障期间最后写入的存储器段)，读取命令并行发出到N个存储器器件的每个，其中读取地址间隔的距离是由搜索范围和存储器器件的数量N确定的距离。在图1C的示例中，读取命令的地址之间的距离是9(搜索范围除以N)。如以下更详细描述，然后评估从存储器器件读取的数据，以便更新地址的搜索范围和读取地址之间的距离，因而通过减少搜索迭代次数来加速搜索操作。
图2A-图2D图示说明搜索一定范围的地址以确定电力故障期间的最后写入页的本发明的实施例。在图2A的示例中，非易失性半导体存储器包括4个存储器器件(N＝4)，并且在电力故障期间最后写入的地址是A47。因此，在从A1到A80的地址搜索范围内进行搜索，以找到最后写入的地址A47，其中从A1到A80 的初始搜索范围表示在保存写日志之前写入的地址块。
在图2A-图2D基础上参照图3的流程图来理解根据本发明的实施例的迭代搜索步骤。通过用N＝4整除初始搜索范围(81)，确定读取地址之间的初始距离等于20(步骤12)。起始地址被初始化(步骤14)，诸如通过将读取距离除以2并且将得到的地址调整到第一存储器器件。然后当前地址被分配到起始地址(步骤16)，并且通过将读取距离与当前地址相加来确定下一个地址(步骤18)。然后当前地址被分配到下一地址(步骤20)，并且重复该过程直到为N个存储器器件的每个产生了读取地址(步骤22)。因此，在图2A的示例中，在第一搜索迭代期间，发出4个读取命令(分别对应N个存储器器件的每个)，其中读取命令的地址间隔距离为20。
在产生读取命令之后，如果必要则调整读取地址(步骤24)从而使得每个地址除以N的模是唯一值(从而读取命令被发送到N个存储器器件的每个)。接着向N个存储器器件的每个发出读取命令(步骤26)，并且从存储器器件读取的数据被评估以确定搜索是否完成(步骤28)。如果搜索未完成，则更新搜索范围(步骤30)并且从步骤12开始执行另一个迭代。
例如，可以相对于与写入的存储器段对应的最后读取地址和与未写入的存储器段对应的第一读取地址，更新搜索范围(图3的步骤30)。参照图2A的示例，地址A30对应于先前写入的最后读取存储器段，并且地址A51对应于未写入的第一读取存储器段。因此，搜索范围被更新为A50减去A31加1(20)。接着读取命令之间的距离被更新(步骤12)为20除以4等于5。接着通过将更新距离(5)加到每个随后的地址，从起始地址(例如，A31)确定读取命令的地址，如图2B所例示。然而，当除以N取模后，得到的地址将不是唯一的(即，多个读取地址分配到同一存储器器件)。因此，调整读取地址(步骤24)从而使得地址除以N取模后是唯一的(从而读取命令被发送到N个存储器器件的每个)。图2C示出调整的读取地址的示例，其中最后两个地址递增1。
如图2C所示，在并行执行读取命令之后，读取地址被评估以找到最后写入地址(A44)和第一个未写入地址(A50)。接着更新搜索范围并且执行最后一次搜索迭代，如图2D所示。如图2D所示，在执行读取命令之后，最后写入地址(A47)与第一个未写入地址(A48)相邻，因此最后写入地址(A47)被定位并且搜索结束。
任意适当技术可以被用来标识写入的存储器段和未写入的存储器段。例 如，在一个实施例中，块中的每个存储器段可以包括扩展数据(例如，标记)，该扩展数据标识存储器段为已写入或者未写入。因此，在本实施例中，从每个存储器段读取的数据可以与目标数据(例如，标记)相比较以确定存储器段是已写入还是未写入。在另一个实施例中，从每个存储器段读取的数据可以被处理以产生校验值(例如，错误校正值)，该校验值标识存储器段为已写入或者未写入。此处描述的搜索技术还可以被用来找到存储在存储器段中的其它类型的数据或者存储器段的其它状态(不同于最后写入的存储器段)。
在图3的步骤24，可以使用任意适当技术来调整地址，从而使得地址除以N取模后是唯一值(从而读取命令被发送到N个存储器器件的每个)。图4A是根据用于调整地址的实施例的流程图，其中计数器被初始化为零(步骤32)，接着为N个地址的每个产生调整值(步骤34)。以对应的调整值调整每个地址(步骤36)，并且重复该过程直至N个地址的每个已经被调整(步骤38)。
图4B是示出替代实施例的流程图，其用于调整地址从而使得地址除以N取模(即地址MOD N)是唯一值。计数器被初始化为零(步骤40)，并且为N个地址的每个产生调整值(步骤42)。以对应的调整值调整每个地址(步骤44)，并且重复该过程直至N个地址的每个已经被调整(步骤46)。
图4C是示出替代实施例的流程图，其用于调整地址从而使得地址除以N取模是唯一值。计数器被初始化为零(步骤48)，并且产生偏移量(步骤50)。使用该偏移量为N个地址的每个产生调整值(步骤42)。以对应的调整值调整每个地址(步骤54)，并且重复该过程直至N个地址的每个已经被调整(步骤56)。
非易失性半导体存储器中的控制电路6(图1A)可以包括任意适当电路，诸如一个或更多个集成电路。在一个实施例中，控制电路6包括微处理器，该微处理器执行用于实现上述流程图的控制程序的代码段。可替换地或者除了微处理器之外，控制电路6还可以包括实现为专用集成电路的状态机电路。
Claims (14)
1.一种非易失性半导体存储器，其包括N个存储器器件和控制电路，其中每个存储器器件包括多个块，其中所述多个块中的每个块包括通过地址访问的多个存储器段，所述控制电路可操作用于通过以下操作在地址的搜索范围内通过进行搜索来定位最后写入的地址：
为所述N个存储器器件的每个发出读取命令，其中：
每个读取命令的地址间隔一定的距离，所述距离是基于所述地址的所述搜索范围和N确定的；并且
所述地址的所述搜索范围大于N；以及
评估从至少一个所述存储器器件中读取的数据以确定搜索是否完成。
2.根据权利要求1所述的非易失性半导体存储器，其中所述N个存储器器件可操作用于并行地处理各个读取命令。
3.根据权利要求1所述的非易失性半导体存储器，其中所述控制电路可操作用于通过将所述地址的所述搜索范围除以N来确定所述距离。
4.根据权利要求1所述的非易失性半导体存储器，其中所述控制电路可操作用于响应于评估从所述至少一个所述存储器器件中读取的数据来更新所述搜索范围。
5.根据权利要求4所述的非易失性半导体存储器，其中所述控制电路可操作用于响应于评估从所述至少一个所述存储器器件中读取的数据来减小所述搜索范围。
6.根据权利要求5所述的非易失性半导体存储器，其中所述控制电路可操作用于至少部分基于与写入的存储器段对应的最后读取地址和与未写入的存储器段对应的第一读取地址减小所述搜索范围。
7.根据权利要求1所述的非易失性半导体存储器，其中所述控制电路可操作用于响应于第一地址除以N的模来调整第一读取命令的所述第一地址。
8.一种搜索非易失性半导体存储器中的最后写入的地址的方法，所述非易失性半导体存储器包括N个存储器器件，每个存储器器件包括多个块，其中所述多个块中的每个块包括通过地址访问的多个存储器段，所述方法包括：
为所述N个存储器器件的每个发出读取命令，其中：
每个读取命令的地址间隔一定的距离，所述距离是基于所述非易失性半导体存储器的地址的搜索范围和N确定的；并且
所述地址的所述搜索范围大于N；以及
评估从至少一个所述存储器器件读取的数据以确定搜索是否完成。
9.根据权利要求8所述的方法，其中所述N个存储器器件可操作用于并行地处理各个读取命令。
10.根据权利要求8所述的方法，所述方法还包括通过将所述地址的所述搜索范围除以N来确定所述距离。
11.根据权利要求8所述的方法，所述方法还包括响应于评估从所述至少一个所述存储器器件中读取的数据来更新所述搜索范围。
12.根据权利要求11所述的方法，所述方法还包括响应于评估从所述至少一个所述存储器器件中读取的数据来减小所述搜索范围。
13.根据权利要求12所述的方法，所述方法还包括至少部分基于与写入的存储器段对应的最后读取地址和与未写入的存储器段对应的第一读取地址减小所述搜索范围。
14.根据权利要求8所述的方法，所述方法还包括响应于第一地址除以N的模来调整第一读取命令的所述第一地址。
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| US13/021,456 US8683113B2 (en) | 2011-02-04 | 2011-02-04 | Concurrently searching multiple devices of a non-volatile semiconductor memory |
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