CN102539831A - Signal conversion device for accelerometer in strapdown inertial navigation system - Google Patents

Signal conversion device for accelerometer in strapdown inertial navigation system Download PDF

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CN102539831A
CN102539831A CN2012100363364A CN201210036336A CN102539831A CN 102539831 A CN102539831 A CN 102539831A CN 2012100363364 A CN2012100363364 A CN 2012100363364A CN 201210036336 A CN201210036336 A CN 201210036336A CN 102539831 A CN102539831 A CN 102539831A
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signal
output
voltage
accelerometer
pulse
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CN102539831B (en
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周璐
齐建宇
刘晴晴
谭新洪
王浩
路静
钟颖
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China Academy of Launch Vehicle Technology CALT
Beijing Aerospace Automatic Control Research Institute
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China Academy of Launch Vehicle Technology CALT
Beijing Aerospace Automatic Control Research Institute
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Abstract

The invention discloses a signal conversion device for an accelerometer in a strapdown inertial navigation system. An analog current signal output by the accelerometer is converted into an analog voltage signal; the analog voltage signal is subjected to integration by a voltage-to-frequency (V/F) conversion module; one path of analog voltage subjected to integration is output to a pre-amplification circuit, and the other path of analog voltage subjected to integration is converted into a pulse signal and the pulse signal is output to a field programmable gate array (FPGA) processing module; the pre-amplification circuit matches a range of the input analog voltage with an input voltage range of an analog-to-digital (A/D) conversion module; the A/D conversion module converts the analog voltage into a digital value signal and outputs the digital value signal to the FPGA processing module; the FPGA processing module acquires number of pulses output by the V/F conversion module in unit time, the number of the pulses is used as an integer part for calculating the number of pulses, the acquired number of pulses and the digital value signal input by the A/D conversion module are stored in fixed time, and a decimal value of the number of pulses in an acquisition period corresponding to the digital value signal is calculated; and a digital value corresponding to the analog current signal output by the accelerometer is determined according to the integer part and the decimal value of the number of pulses, so that the signal of the accelerometer is converted.

Description

Accelerometer signal conversion equipment in a kind of SINS
Technical field
The present invention relates to a kind of signals collecting, measurement and treatment technology that is applicable to accelerometer in the SINS.
Background technology
SINS is that the inertia device (accelerometer, gyroscope) that a kind of dependence connects firmly on carrier obtains absolute acceleration; Obtain the position of carrier in a relative coordinate system through twice integration then, thereby reach a kind of " the self-aid navigation system " of navigation purpose.In SINS, accelerometer is used to measure the linear acceleration of carrier along a certain direction, through necessary integral operation and coordinate transform, confirms instantaneous velocity and the position of carrier with respect to the frame of reference.When the acceleration parameter of carrier changed, accelerometer will detect this variable quantity, and changed accordingly.Accelerometer is as the core devices of SINS, and its precision height and performance quality have directly determined the performance of SINS.The precision of accelerometer not only comprises the precision of accelerometer device itself, also comprises the precision of its chromacoder.
In recent years, the precision and the performance of homemade accelerometer instrument improve constantly, and measurement range can reach ± and more than the 20g, threshold value can reach 10 -5~10 -6G, however the precision of domestic accelerometer signal conversion equipment is but well below the precision of accelerometer device itself.For the high-resolution acceleration signal of acquisition that can be real-time, very high requirement has been proposed all for precision, measurement range and the real-time of accelerometer signal conversion equipment.Mostly the output of high-precision quartz flexure accelerometers is analog current signal, and the function of accelerometer signal conversion equipment is exactly to convert analog current signal into can supply DSP to use digital signal.Usually, adopt the current signal of high-precision resistance degree of will speed up meter output to become voltage signal, carry out analog to digital conversion with the accelerometer signal conversion equipment again.Its conversion has two kinds of methods: pass through voltage-frequency (V/F) converter again and convert voltage signal to pulse signal, thereby obtain the corresponding digital amount through the pulse number of counter records in the unit interval; Perhaps directly convert the voltage signal of output to DSP accessible digital signal through modulus (A/D) converter.
Adopt the advantage of V/F switch technology to be, it adopts integral form charge balance equation conversion principle, can carry out continuous coverage to input signal, does not have the problem of drop-out; In addition, its conversion process is exactly the continuous integration to voltage, can or change very fast input signal to noise and carry out smoothly having good interference free performance, and not take computer resource.But, adopt the V/F converter, along with the also increase accordingly of increase linear error of clock frequency; And after reducing clock frequency, if the magnitude of voltage of input is too small, electric charge need be accumulated and just can produce a count pulse for a long time, is the sampling blind area during this period of time, will have no signal output.Therefore, adopt the V/F conversion merely, slewing rate is slow, and signal resolution is low, and is not high in the sampled point precision.For A/D converter, the stability of its scaling ratio depends on the stability of used reference voltage, and the drift stabilization property of A/D conversion chip itself is depended in its zero point drift, receives WV, clock frequency, the Influence of Temperature of A/D conversion chip usually.Compared with V/F conversion, the advantage of A/D conversion is, has that precision height, slewing rate are fast, circuit structure simply, does not need advantages such as stabilization time during the multiple signals input.But the shortcoming of A/D sampling is that sampled signal does not have integral characteristic, thus suppress the noise ability a little less than, dynamic range can not satisfy system requirements sometimes.
Strapdown inertial navigation system is as the Real-time and Dynamic navigational system in addition, and the collection of its angle speed signal and linear velocity signal and system information are handled all has very strong real-time, and the information processing rate of system is had very high requirement.DSP also need gather other signals and carry out navigation calculation except gathering accelerometer signal; Therefore; When gathering accelerometer signal, should adopt peripheral logical circuit to accomplish as far as possible, let DSP have more time to be used to control the transmitting-receiving of various amounts and resolving of system.
Domestic research situation about the accelerometer signal switch technology is following:
The V/F conversion adopts the VFC chip to accomplish the AD650 that AD company is arranged, AD652 and AD7742 commonly used mostly; The LMx31 series of National Semiconductor; The VFC62 of TI company, VFC110 etc.The development of A/D conversion is to be the basis with succeeding in developing of A-∑ type high-precision adc.Delta sigma type A/D is applied to accelerometer output signal measurement, can solves the problem of " small size, dynamically big " through novel digital to analog converter and digital signal processing theory.The A/D transducer that uses in the past mainly contains integral form, relatively three kinds of type and parallel connection types one by one.Integral form is mainly used in digital multimeter, precision height but speed is low, and this is not a kind ofly can satisfy the method for Technical Development Requirement in the future.For parallel connection type, establishing resolution is n bit, use 2n comparer, can fast input voltage be transformed into corresponding numerical code like this.Though this method speed is exceedingly fast, resolution realizes relatively difficulty when 10bit is above, and hardware size is too big, and cost is difficult to descend.Relatively there is a D/A transducer type inside one by one, asks a numerical code through two fens exploratory methods, makes its corresponding voltage approach input voltage most, and this method is during with the MOS integrated circuit, and the D/A conversion is that manufacturing process is difficult to realization with a large amount of electric capacity formations.
The V/F change-over circuit of the Meng Junfang of Aviation Industry Corporation proposition in 1998; Each research unit selects for use various external Imported High-performance A/D chips to realize the V/F conversion afterwards, depends on the state of development of external chip entirely.Ten thousand talentes of No.24 Inst., Ministry of Electronics Industry used the AD high precision V/F converter AD650 at that time of company in 1999, and the full scale scale reaches 1MHz, and nonlinearity is less than 0.07%; People such as Jia Ping proposed the thought that I/F combines with A/D in 2003; People such as ox petrel proposed to adopt V/F converter AD652 in 2005; With the TMS320C6711DSP device is core; Count with 8253 pairs of AD652 output pulse strings of counter chip, the highest output frequency of AD652 reaches 2MHz, and nonlinearity erron is 0.01%; Have high resolving power, high stable time property and best transition time, main performance index all is superior to other.Along with the development of delta sigma type high precision converter, in February, 2006, persons such as Niu Qinghong replace traditional VFC circuit with 24 delta sigma cake cores, have reached range ± 25g, measuring accuracy 0.0001, the target of 40000 data of per second output.People such as summer in October had designed the sampling module based on AD976 and PC104 in 2006, and effective accuracy can reach 15.
It seems that by above-mentioned present situation the method that the accelerometer signal conversion is adopted is transformed into single A/D conversion by single V/F, progressively to high precision, digitizing, integrated, miniaturization development.The analog signal conversion of degree of will speed up meter adopts PFGA to substitute collection and processing that DSP accomplishes data after becoming digital signal; Simplified the system design difficulty; Make DSP read in data time and workload has been reduced to minimum limit, for the fast processing of system information is laid a good foundation.
Summary of the invention
Technology of the present invention is dealt with problems and is: overcome the deficiency of prior art, a kind of accelerometer signal conversion equipment that is applicable to SINS of optimization is provided.
Technical scheme of the present invention is: accelerometer signal conversion equipment in a kind of SINS comprises V/F modular converter, pre-amplification circuit, A/D modular converter, FPGA processing module;
The analog current signal of accelerometer output at first carries out integration through the V/F modular converter after converting analog voltage signal to; Aanalogvoltage one tunnel behind the integration exports pre-amplification circuit to; Another road is converted into pulse signal, and this pulse signal exports the FPGA processing module to; Pre-amplification circuit is complementary scope and the input voltage range of A/D modular converter of the aanalogvoltage of input, and as the input voltage of A/D modular converter; The A/D modular converter converts the aanalogvoltage of input to digital quantity signal, exports the FPGA processing module to; The umber of pulse of V/F modular converter output in the FPGA processing module acquisition units time; As the integral part of calculating umber of pulse; The digital quantity signal of umber of pulse of gathering and the input of A/D modular converter is carried out the timing storage, calculate the fractional value of umber of pulse in the corresponding collection period of digital quantity signal; According to the corresponding digital quantity of analog current signal that the integral part and the fractional value of umber of pulse are confirmed accelerometer output, accomplish the conversion of accelerometer signal.
Described V/F modular converter comprises integrator, comparer, logical triggering device, logic switch, constant current source and monostable circuit; Integrator N1 carries out integration to the analog voltage signal of input; And the voltage behind the integration exported to comparer N2; Comparer N2 compares the magnitude of voltage and the threshold voltage that receive, and when the magnitude of voltage that receives was lower than threshold voltage, comparer N2 exported high level; Otherwise comparer N2 output low level is accomplished analog voltage signal and is converted pulse signal to; The logical triggering device is according to the switching of the height steering logic switch of comparer N2 output level, and when output low level, logic switch switching controls constant current source makes integrator N1 get into integration period; When the output high level, logic switch switching controls constant current source makes integrator N1 get into the reset cycle; Monostable circuit is controlled the width of the pulse signal that is transmitted by the logical triggering device and pulse signal is exported.
The present invention's beneficial effect compared with prior art is:
(1) the present invention has designed a kind of new accelerometer signal collection and treating apparatus; Compare with traditional simple employing V/F conversion or A/D conversion, this method combines two kinds of conversion regimes, and it is wide both to have had a V/F conversion input range; Good in anti-interference performance; The advantage that reliability is high has overcome again that single employing V/F slewing rate is slow, signal resolution is low, in the not high shortcoming of sampled point precision, and single employing A/D conversion is influenced by environmental temperature; A little less than the antijamming capability, the shortcoming that dynamic range is little.Have the characteristics that range of dynamic measurement is wide, precision is high, real-time to accelerometer signal in the strapdown system and proposed a kind of effective solution.
(2) the present invention is on the basis of traditional V/F conversion; Be used in combination the A/D conversion behind the integrator: in a count cycle, an integer pulse value of V/F conversion is gathered; In time between two pulses the A/D conversion is carried out in the output of integrator; Calculate fraction part in real time with FPGA in a certain moment input respective pulses value between these two pulses; The integral part of pulse value and fraction part are carried out system as the digital quantity after the conversion together resolve, thereby improve sampling resolution and sampling precision.
(3) for charge balance equation VFC, switch and integrating circuit built-in problem that constant current source switches cause nonlinearity to increase with the clock frequency.Improve resolution and must improve clock frequency, and the increase of clock frequency causes nonlinearity to increase.The present invention assigns to improve resolution according to the fractional part that increases pulse value under the certain situation of clock frequency, guaranteed the nonlinearity of conversion like this.
(4) umber of pulse after the present invention adopts the high speed fpga chip to the acceleration signal conversion is handled; Replacement DSP realizes the collection of accelerometer data and reads; Make DSP that more time is used for resolving of system and error compensation calculating; The integrated level and the stability of system have been improved, for the fast processing of system information is laid a good foundation.
(5) speed and the precision of raising accelerometer signal conversion equipment can improve the precision of accelerometer signal conversion, thereby are that the precision that improves inertial equipment creates conditions.
(6) the present invention can be widely used in the signals collecting of inertia devices such as various accelerometers, gyro and other sensors; Also can be applicable to other and require in the high-precision sensor interface of the wide dynamic range system, the design philosophy that this many acquisition modes merge also has important value to other design of signal processing.
Description of drawings
Fig. 1 is conversion device structure figure of the present invention;
Fig. 2 is a signal conversion process schematic diagram of the present invention;
Fig. 3 is a conversion equipment circuit diagram of the present invention;
Fig. 4 is a mode of operation sequential chart of the present invention.
Embodiment
To combine accompanying drawing that the present invention is done further detailed description below.
In the SINS; Measure the acceleration on inertial navigation system X, Y, Z three direction of principal axis respectively by three accelerometers; The current signal that output is directly proportional with acceleration; The function of accelerometer signal conversion equipment is that the analog current signal of degree of will speed up meter output converts digital signal into, offers DSP and carries out navigation calculation.
As shown in Figure 1, SINS accelerometer signal conversion equipment comprises voltage-frequency (V/F) modular converter, pre-amplification circuit, A/D modular converter, FPGA processing module.
What accelerometer was exported is analog current signal, adopts high-accuracy resistance to convert thereof into analog voltage signal.Analog voltage signal at first passes through the V/F modular converter.The V/F modular converter adopts integration type charge balance switch technology, converts analog voltage signal to pulse signal.Its ultimate principle is: analog voltage signal inputs to integrator; In the set time, adding constant current source at input end then discharges to integrating capacitor; The output terminal that then constant current source is switched to integrator makes integrating capacitor begin charging, and the integrating capacitor charging is equal with discharge charge during stable state.Calculating can get the size of input voltage and the time of discharging and recharging of integrating capacitor is inversely proportional to, and promptly is directly proportional with discharging and recharging frequency, thereby realizes the V/F conversion.
As shown in Figure 2, the V/F modular converter comprises integrator, comparer, logical triggering device, logic switch, constant current source, monostable circuit.
(1) integrator N1: little by high input impedance operational amplifier and leakage current, the integrating capacitor C that absorption effect is little forms.Input voltage is carried out integration, output voltage is defeated by comparer N2.
(2) comparer: the output voltage of N1 is compared with threshold voltage, and when the output voltage of N1 was lower than threshold voltage, comparer N2 exported high level; When the output voltage of N1 is higher than threshold voltage, comparer N2 output low level.Threshold voltage is got the maximum of integrator output and a certain magnitude of voltage between the minimum value.
(3) logical triggering device: comprise and door, a d type flip flop and a latch.Comparer N2 output high-low level is given logical triggering device, the switching of steering logic switch.
(4) logic switch: when the Q of latch end was output as low level, logic switch switched to the L end, and capacitor C begins charging, and integrator gets into integration period.When the Q of latch end was output as high level, logic switch switched to the H end, and capacitor C begins discharge, and integrator gets into the reset cycle.
(5) constant current source: should have long-time stability, higher output impedance and good dynamic response.
(6) monostable circuit: only be used for confirming the width of output pulse, irrelevant with the voltage-frequency transformational relation.
Like Fig. 3 and shown in Figure 4, what integrator was exported is a sawtooth wave, and when the Q of latch end was output as low level, the switch of constant current source switched to the L end, and integrator gets into integration period, the linear decline of integrator output voltage.When integrator output voltage was reduced to the threshold voltage of comparer, the output switching activity of voltage comparator was a high level, also uprised with door AN D output.Externally the negative edge d type flip flop of clock CLOCK output is reversed to high level, again through half clock period, exports to the Q end of the rising edge latch of CLOCK and to uprise.At this time of day, the reference current switch switches to the H end, and integrator gets into the reset cycle, and integrator output voltage is linear to rise.At this moment, with door AND output step-down, through half clock period; The negative edge d type flip flop output switching activity of CLOCK is a low level; Through half clock period, arrive the Q end output step-down of the rising edge latch of CLOCK again, the constant current source switch switches to the L end; Reset cycle finishes, and integrator gets into integration period once more.In this course of work, the output of latch triggers monostable circuit simultaneously, makes negative pulse of frequency output terminal output.Follow the tracks of the pulse number of output with a counter, so count value just with the unit interval in pulse number be directly proportional.
Between two output pulses, after the integrating capacitor of V/F modular converter, be used in combination the A/D conversion, as shown in Figure 1.Amplify with the output voltage signal of pre-amplification circuit, export to the A/D modular converter and sample integrator.
Pre-amplification circuit: as shown in Figure 3, select for use the high precision integrated transporting discharging as analogue amplifier, its bandwidth and precision need be superior to selected A/D converter.For degree of stability and the precision that improves the ratio amplifying circuit, R 1, R 2, R fThe value of three resistance should suitably obtain littler.Input voltage U oAnd output voltage U 1Relation be: U o = - R f R 1 U 1 .
In the process of voltage integrating meter; By the A/D modular converter will adopt in real time the corresponding digital quantity of magnitude of voltage input to fpga chip and carry out division and handle; The output voltage values of calculating sampling moment integrator is positioned at the position of sawtooth wave; Be the fraction part of pulse number, the integer pulse number that the counter that provides with FPGA then writes down the V/F modular converter carries out system and resolves together as the sampling pulse number of system.
As shown in Figure 2, the A/D conversion comprises sampling holder, A/D converter and impact damper.
(1) sampling holder: do not have the A/D converter of sampling holder for itself, it is necessary before analog input end, adding sampling holder.Select the little sampling holder of capture time for use, promptly the needed minimum time of sample phase will be lacked, otherwise actual effectively switching rate will be affected.As shown in Figure 3, select for use the A/D converter that has sampling holder to simplify the realization of circuit.
(2) A/D converter: the resolution of selecting for use need not be too high, and general 8 get final product, but switching rate is had requirement.If increase by a bit resolution, promptly the fraction part of counter increases by one, then discharges and recharges in the cycle of V/F conversion and can realize at least 100 times sampling.Select parallel relatively type or classification type high-speed a/d conversion chip for use.
(3) impact damper: adopt the d type flip flop of triple gate, be used for controlling the output of A/D converter.
The A/D transfer process is exactly to gather the analog voltage amount of integrator output in the V/F conversion, through amplifying, converts digital quantity to and exports to FPGA then.Under the very little situation of the output current of accelerometer, the integrating capacitor duration of charging is very long, no pulse output this moment, actual suitable pulse output valve during employing A/D changes calculated product to divide.When acceleration was exported in respect of large-signal, integral time was short, and interlude is short between the output pulse, even do not carry out the A/D conversion, also can reach higher precision.Like this, the resolution of conversion of signals can reach the resolution of A/D conversion chip.In a count cycle, the V/F modular converter provides the integral part of pulse, and the output valve of A/D modular converter acquired integrated device is exported to PFGA and calculated this fraction part of corresponding pulse value constantly simultaneously.The fraction part that increases pulse has been equivalent to improve the resolution of conversion.
As shown in Figure 3, FPGA with the umber of pulse of a counter records V/F conversion, stored the digital quantity of A/D conversion simultaneously, and compares, does division arithmetic in the unit interval, did additive operation with the output umber of pulse of the V/F that stores then.These computings of Rapid Realization have requirement to the execution speed of FPGA, select the high-speed programmable logical device for use.
As shown in Figure 4, integrator is output as sawtooth wave, and during the integrator charging, output voltage reduces.When output voltage drops to threshold voltage U oThe time, after the rising edge of a clock, integrator gets into discharge regime, exports a pulse signal this moment.Along with output voltage increases, elapsed time t OsAfter, change-over switch is to the charging stage, output voltage begins to descend, this moment, A/D converter began sampling, adopt input voltage be maximal value U mWhen output voltage drops to threshold voltage U cAfter, again through a rising edge clock, change-over switch is exported a pulse signal simultaneously to discharge regime once more.Between two pulses of output, integrator is accomplished and is is once discharged and recharged, and is exactly the time of the sampling of A/D converter between charge period.
A/D converter output parallel data is given the register of FPGA, and FPGA judges the maximal value and the minimum value of sawtooth wave.If t aThe input value of FPGA is U constantly a, t bBe U constantly b, t cBe U constantly c, if U a<U bAnd U b>U c, U then bThis discharges and recharges the maximal value U in the cycle to be considered to sawtooth wave mIf U a>U bAnd U b<U c, U then bBe considered to the minimum value U in this cycle of sawtooth wave 0When judging, FPGA is input as U 0The time, with register D1 record U 0Value.When judging, FPGA is input as U mThe time, with register D2 record U mValue, simultaneously FPGA begins counting.
As shown in Figure 4, establish t NThe magnitude of voltage of integrator output constantly reaches a minimum value U who discharges and recharges in the cycle O1, t mVoltage reaches a maximal value U who discharges and recharges in the cycle constantly M1, t N+1Voltage reaches minimum value U again constantly 02, t NWith t N+1Between a certain moment t 1The magnitude of voltage of the output sawtooth wave that collects is U 1, FPGA stores with register D3.This moment, the value of register D2 was U M1, the value of register D1 storage is U O1Owing to t discharge time OsBe an external clock cycle, very short, ignore during calculating.U then 1Between the sawtooth wave decrement phase (charge period), corresponding to U M1To U 02The position do
Figure BSA00000671606700091
Also just be similar to two fraction part n between the pulse 1
For two adjacent cycles, think U 02≈ U O1, promptly
n 1 = U m 1 - U 1 U m 1 - U o 1
Suppose that the count cycle is T, during the umber of pulse of counter records be N, FPGA is through addition and division arithmetic, at t 1Constantly resolving the corresponding digital quantity of analog current signal that obtains accelerometer output is:
f 1 = T N + n 1 = T N + U m 1 - U 1 U m 1 - U o 1
Like this, conversion, collection and the processing procedure of having accomplished the high-precision accelerometer signal through the method and the device of above introduction.Whole design proves that through actual motion it has certain practical value.
The unspecified part of the present invention belongs to general knowledge as well known to those skilled in the art.

Claims (2)

1. accelerometer signal conversion equipment in the SINS is characterized in that: comprise V/F modular converter, pre-amplification circuit, A/D modular converter, FPGA processing module;
The analog current signal of accelerometer output at first carries out integration through the V/F modular converter after converting analog voltage signal to; Aanalogvoltage one tunnel behind the integration exports pre-amplification circuit to; Another road is converted into pulse signal, and this pulse signal exports the FPGA processing module to; Pre-amplification circuit is complementary scope and the input voltage range of A/D modular converter of the aanalogvoltage of input, and as the input voltage of A/D modular converter; The A/D modular converter converts the aanalogvoltage of input to digital quantity signal, exports the FPGA processing module to; The umber of pulse of V/F modular converter output in the FPGA processing module acquisition units time; As the integral part of calculating umber of pulse; The digital quantity signal of umber of pulse of gathering and the input of A/D modular converter is carried out the timing storage, calculate the fractional value of umber of pulse in the corresponding collection period of digital quantity signal; According to the corresponding digital quantity of analog current signal that the integral part and the fractional value of umber of pulse are confirmed accelerometer output, accomplish the conversion of accelerometer signal.
2. accelerometer signal conversion equipment in a kind of SINS according to claim 1 is characterized in that: described V/F modular converter comprises integrator, comparer, logical triggering device, logic switch, constant current source and monostable circuit;
Integrator N1 carries out integration to the analog voltage signal of input; And the voltage behind the integration exported to comparer N2; Comparer N2 compares the magnitude of voltage and the threshold voltage that receive, and when the magnitude of voltage that receives was lower than threshold voltage, comparer N2 exported high level; Otherwise comparer N2 output low level is accomplished analog voltage signal and is converted pulse signal to; The logical triggering device is according to the switching of the height steering logic switch of comparer N2 output level, and when output low level, logic switch switching controls constant current source makes integrator N1 get into integration period; When the output high level, logic switch switching controls constant current source makes integrator N1 get into the reset cycle; Monostable circuit is controlled the width of the pulse signal that is transmitted by the logical triggering device and pulse signal is exported.
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