CN103338042A - Analog-digital conversion circuit for dynamically tuned gyroscope - Google Patents
Analog-digital conversion circuit for dynamically tuned gyroscope Download PDFInfo
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- CN103338042A CN103338042A CN2013102514486A CN201310251448A CN103338042A CN 103338042 A CN103338042 A CN 103338042A CN 2013102514486 A CN2013102514486 A CN 2013102514486A CN 201310251448 A CN201310251448 A CN 201310251448A CN 103338042 A CN103338042 A CN 103338042A
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Abstract
The invention discloses an analog-digital conversion circuit for a dynamically tuned gyroscope, which comprises a divided circuit, an integrating circuit, a logic control circuit, a switching circuit, a shaping circuit, a constant-current source circuit and an output circuit. The analog-digital conversion circuit has the following advantages: (1) as the resistance-type divided circuit is adopted, an integrator can work in a few milliampere state, and the integral accuracy is improved; (2) the ternary widening logic is utilized for replacing the dual logic, the absolute value of the zero position of a ternary logic convertor is small, and the variation of the zero position is also small; (3) the measuring range of the analog-digital conversion circuit disclosed by the invention meets the great dynamic requirement of -600 degrees/s to 600 degrees/s, the clock signal is increased from 128 KHz to 256 KHz to ensure the resolution ratio of angular velocity measurement, and the degree of linearity in the temperature field of [-40 DEG C, +60 DEG C] is less than 8*10<-4>, so the degree of linearity in the entire temperature field range is ensured, and the accuracy of analog-digital conversion is improved.
Description
Technical field
The present invention relates to a kind of analog to digital conversion circuit, relate in particular to big dynamic, high accuracy dynamically tuned gyro, DTG analog to digital conversion circuit in a kind of strap-down inertial guidance system, belong to the circuit design technique field.
Background technology
Strap-down inertial guidance system has the gyroscope of three passages and accelerometer to be directly installed on the carrier, and sensitivity goes out the information such as angle, angular speed and acceleration of motion of carrier on each passage.Above-mentioned information is sent into the control computer, make conversion process after, handle mechanism voluntarily automatically, arrive at the destination according to predetermined rule and route control, guiding carrier.Dynamically tuned gyro, DTG is to utilize the flexible coupling support rotor and utilize the dynamic tuning principle to carry out tuning rate gyroscope.Analog to digital conversion circuit refers to the analog electrical parameter change to be the circuit of digital quantity.In analog to digital converter, integration type and comparison expression two big classes are arranged.Two kinds of voltage time conversion and electric voltage frequency conversions are arranged in the integration type analog to digital converter, two kinds of reaction type and no reaction types are arranged in the comparison expression A/D converter.Guidance And Navigation System requires inertia type instrument not only will provide the digital information that is directly proportional with input variable, and to provide the digital information that is directly proportional with the input variable integrated value, in above-mentioned several A/D converters, have only the charge balance equation transducer in the integration type voltage to frequency converter just to be applicable to Guidance And Navigation System.
The charge balance equation voltage to frequency converter not only can continuously be changed, and also has following advantage: the precision of integrating capacitor does not influence the output umber of pulse; The analog-to-digital conversion time is irrelevant with the input size; The short term variations of clock frequency can not produce error; Concerning certain clock frequency, increase and measure and gate time, and not require the dynamic range of widening integrator; Be difficult for to produce dead zone (dead band), even when input voltage is very little, higher conversion accuracy is arranged also.The control logic of charge balance equation voltage to frequency converter has very big influence to conversion accuracy.Control logic can be binary, also can be ternary.Though the binary logic circuit is simple, be conducive to the raising of miniaturization and reliability, its fatal weakness is that zero-bit output is big, and is not easy control.For example when interrogation frequency was 256KHz, the feedback width was 4uS, if feedback pulse current waveform change width 0.04ns, then zero-bit output changes 1.28 pulse/S, and the absolute value of triologic transducer zero-bit is little, and the variable quantity of zero-bit is also little, so should adopt the ternary control logic.According to above-mentioned situation, the General layout Plan of large range high precision mould/number conversion circuit should be charge balance equation ternary control logic mould/number conversion circuit.
At present, because the angular velocity measurement scope of flexible strapdown system is ± 300 °/s, the existing analog to digital conversion circuit clock signal of dynamically tuned gyro, DTG is 128KHz, can satisfy the requirement of resolution.But, along with measuring range bring up to ± during 600 °/s, resolution will reduce by one times, is difficult to satisfy instructions for use.
Summary of the invention
Technology of the present invention is dealt with problems and is: overcome the deficiencies in the prior art, a kind of dynamically tuned gyro, DTG analog to digital conversion circuit is provided, this circuit has improved analog-to-digital precision.
Technical solution of the present invention is: a kind of dynamically tuned gyro, DTG analog to digital conversion circuit, comprise shunt circuit, integrating circuit, logic control circuit, switching circuit, shaping circuit, constant-current source circuit and output circuit, shunt circuit is shunted the analog current signal Ii1 that imports and is obtained analog current signal Li2, analog current signal Ii2 after the shunting becomes analog voltage signal Uj through integrating circuit, shaping circuit provides clock signal for logic control circuit and output circuit, logic control circuit produces two path control signal according to the polarity of analog voltage signal Uj, wherein one tunnel control signal is used for the control switch circuit as feedback control signal, another road control signal is used for the control output circuit as the output control signal, constant-current source circuit provides current source for switching circuit, switching circuit is according to feedback control signal output positive feedback or the negative feedback current of logic control circuit output, and output circuit is according to the output control signal output frequency signal of logic control circuit output.
Described shunt circuit is by seven resistance R 01, R02, R03, R04, R05, R13 and R14, diode V11, V12, V13 and V14 form, resistance R 01, R02, R03, an end ground connection after the R04 parallel connection, the end of other end connecting resistance R05 also meets input analog current signal Ii1, the positive pole of diode V11 links to each other with the negative pole of V12, the plus earth of V12, the negative pole of diode V13 links to each other with the positive pole of V14, the minus earth of diode V14, the negative pole of diode V11, the other end of the anodal connecting resistance R05 of V13, analog current signal Ii2 behind the other end output steering of resistance R 05, one termination power negative pole of resistance R 13, the other end is connected on diode V11, between the V12, one termination power positive pole of resistance R 14, the other end is connected on diode V13, between the V14.
Described integrating circuit is by operational amplifier N5, capacitor C 1, resistance R 15 and R16, triode V15 and V16 form, the inverting input of operational amplifier N5 meets analog current signal Ii2, the in-phase input end ground connection of operational amplifier N5, the end of the output connecting resistance R15 of operational amplifier N5, another termination triode V15 of resistance R 15, the base stage of V16, triode V15, the base stage of V16 and triode V15, be connected by resistance R 16 between the emitter of V16, triode V15, the collector electrode of V16 connects positive pole and the negative pole of power supply respectively, triode V15, the emitter of V16 is as the output output analog voltage signal Uj of integrating circuit, and capacitor C 1 is connected between operational amplifier N5 inverting input and the integrating circuit output.
Described logic control circuit is by resistance R 107, R108, R109, R110 and two double trigger D101 and D102 form, resistance R 107, R108, R109, after connecting successively, R110 is connected between the 15V power supply, the analog voltage signal Uj of integrating circuit output is connected between resistance R 108 and the R109, the input of D1 is connected between resistance R 107 and the R108 among the double trigger D101, the input of D2 is connected between resistance R 109 and the R110 among the double trigger D101, the input end of clock of double trigger D101 meets clock signal fcp1, the input end of clock of double trigger D102 meets clock signal fcp2, the in-phase output end of D1 connects the input of D1 among the double trigger D102 among the double trigger D101, the in-phase output end of D2 connects the input of D2 among the double trigger D102 among the double trigger D101, two reversed-phase outputs output feedback control signals are used for the control switch circuit among the double trigger D102, among the double trigger D102 among the in-phase output end of D1 and the double trigger D102 reversed-phase output of D2 produce the output control signal and be used for the control output circuit.
Described shaping circuit is made up of NAND gate D7 and D8, the clock signal fcp that crystal oscillator produces becomes clock signal fcp1 through the first NAND gate D7 paraphase, clock signal fcp1 is clock signal fcp2 through the second NAND gate D8 paraphase, and clock signal fcp1 and fcp2 are as the output signal of shaping circuit.
Described switching circuit is by seven diode V19, V20, V21, V22, V23, V24, V25, resistance R 22, R23, R24, R25, R26, two triode V17 and V18 form, in the positive pole of diode V23 and the logic control circuit among the double trigger D102 inverse output terminal of D1 be connected, the negative pole of diode V23 links to each other with an end of resistance R 24, the base stage of another termination triode V17 of resistance R 24, in the positive pole of diode V25 and the logic control circuit among the double trigger D102 inverse output terminal of D2 link to each other, the negative pole of diode V25 links to each other with the positive pole of diode V24, the negative pole of diode V24 connects the base stage of triode V18, be connected between the base stage of triode V17 and V18 after resistance R 25 and the R26 series connection, connect the negative pole of 5V power supply between resistance R 25 and the R26, the grounded emitter of triode V17 and V18, diode V19, V20, V21, the V22 series connection, the positive pole of diode V19 connects the collector electrode of triode V17, the negative pole of diode V22 connects the collector electrode of triode V18, one end of resistance R 22 is connected with-15V power supply, the other end is connected on diode V19, between the V20, one end of resistance R 23 is connected with+15V power supply, the other end is connected on diode V21, between the V22, connect the positive current output of constant-current source circuit between the collector electrode of triode V17 and the diode V19 positive pole, connect the negative current output of constant-current source circuit between the collector electrode of triode V18 and the diode V22 negative pole, diode V20, between the V21 as the output of switching circuit.
Described constant-current source circuit comprises positive constant-current source and negative constant-current source, positive constant-current source is by triode V4, V5, operational amplifier N2 and resistance R 6 are formed, negative constant-current source is by triode V9, V10, operational amplifier N4 and resistance R 12 are formed, triode V4 and V5 are cascaded as the PNP Darlington transistor, the base stage of PNP Darlington transistor connects the output of operational amplifier N2, the emitter of PNP Darlington transistor connects the inverting input of amplifier N2, one termination of resistance R 6 reaches the emitter of PNP Islington pipe, the power pins of another termination operational amplifier N2, the in-phase input end of operational amplifier N2 connects positive reference voltage, and the collector electrode of PNP Darlington transistor is as positive constant-current source output; Triode V9 and V10 are cascaded as the NPN Darlington transistor, the base stage of NPN Darlington transistor connects the output of operational amplifier N4, the emitter of NPN Darlington transistor connects the inverting input of operational amplifier N4, the emitter of one termination NPN Darlington transistor of resistance R 12, the power pins of another termination operational amplifier N4, the in-phase input end of operational amplifier N4 connects negative reference voltage, and the collector electrode of NPN Darlington transistor is as negative constant-current source output.
Described output circuit is made up of NAND gate D9 and D10, positive output signal by the homophase output signal of D1 among clock signal and the double D trigger D102 mutually " with " form, negative road output signal by the reversed-phase output signal of D2 among clock signal and the double D trigger D102 mutually " with " form.
Operation principle of the present invention is: when Ii1=0, and Ii2=0, the output voltage U j of integrating circuit remains near the 0V, and logic control circuit makes+I by switching circuit
HWith-I
HGet back to ground, no If flows to integrating circuit, and output voltage U j still remains unchanged.Meanwhile, among the double trigger D102 among the in-phase output end of D1 and the double trigger D102 reversed-phase output of D2 produce the output control signal and be used for the control output circuit, make fcp1 can't pass through output circuit, the right way was exported and was born road output and all remains on the high level this moment, and namely output frequency is zero.When Ii1＜0, the output voltage U j of integrating circuit rises gradually, when Uj surpasses threshold voltage, logic control circuit by switching circuit make+IH is input to integrator, the electric current that flows to integrator is called as If, the direction of If is opposite with the direction of Ii, and when design guarantees that the absolute value of If is greater than the absolute value of Ii, the output Uj of integrating circuit descends gradually, as Uj during less than threshold voltage, logic control circuit by switching circuit make+IH flow into ground, makes If=0, logic control circuit passes through output circuit by fcp1 when having only If non-vanishing, and is proportional to the frequency of Ii1 in the negative passage output of output circuit.As Ii1〉0 the time, the output Uj of integrating circuit descends gradually, when Uj surpasses threshold voltage, logic control circuit by switching circuit make-IH is input to integrator, the electric current that flows to integrator is called as If, the direction of If is opposite with the direction of Ii, and when design guarantee the absolute value of If greater than the absolute value of Ii, the output Uj of integrating circuit rises gradually, as Uj during less than threshold voltage, logic control circuit by switching circuit make-IH flow into ground, makes If=0.Logic control circuit passes through output circuit by fcp1 when having only If non-vanishing, and is proportional to the frequency of Ii1 in the positive passage output of output circuit.In sum, when Ii1＜0, negative passage has output, as Ii〉0 the time, positive passage has output.When Ii=0, no-output, transducer is in " making zero " state.
The present invention's beneficial effect compared with prior art is:
(1) the present invention be different from the past use the time cut apart shunt method, in time, cut apart shunting and average current can be reduced, but the maximum instantaneous electric current is still very big, maximum can reach 900m A, the integrator power burden is strengthened, and integral accuracy reduces, and the present invention adopts the resistance-type shunt circuit, can make integrator work in several milliamperes state, improve integral accuracy.
(2) the present invention utilizes the ternary logic that broadens to replace binary logic, though the binary logic circuit is simple, be conducive to the raising of miniaturization and reliability, but its fatal weakness is that zero-bit output is big, and be not easy to control, and the absolute value of triologic transducer zero-bit is little, and the variable quantity of zero-bit is also little.
(3) analog to digital conversion circuit measuring range of the present invention reaches ± the big dynamic requirements of 600 °/s, and clock signal improves 256KHz to guarantee the resolution of angular velocity measurement by 128KHz; Satisfy the linearity in the temperature field [40 ° ,+60 °] less than 8 * 10
-4, guaranteed the linearity in the scope of total temperature territory, improved analog-to-digital precision.
Description of drawings
Fig. 1 is theory of constitution figure of the present invention;
Fig. 2 is the theory of constitution figure of shunt circuit;
Fig. 3 is the theory of constitution figure of integrating circuit;
Fig. 4 is the theory of constitution figure of logic control circuit;
Fig. 5 is the theory of constitution figure of switching circuit;
Fig. 6 is the theory of constitution figure of constant-current source circuit;
Fig. 7 is the theory of constitution figure of shaping circuit;
Fig. 8 is the theory of constitution figure of output circuit.
Embodiment
As shown in Figure 1, the present invention includes shunt circuit, integrating circuit, logic control circuit, switching circuit, shaping circuit, constant-current source circuit and output circuit, shunt circuit is shunted the analog current signal Ii1 that imports and is obtained analog current signal Li2, analog current signal Ii2 after the shunting becomes analog voltage signal Uj through integrating circuit, shaping circuit provides clock signal for logic control circuit and output circuit, logic control circuit produces two path control signal according to the polarity of analog voltage signal Uj, wherein one tunnel control signal is used for the control switch circuit as feedback control signal, another road control signal is used for the control output circuit as the output control signal, constant-current source circuit provides current source for switching circuit, switching circuit is according to feedback control signal output positive feedback or the negative feedback current of logic control circuit output, and output circuit is according to the output control signal output frequency signal of logic control circuit output.
As shown in Figure 2, shunt circuit is by seven resistance R 01, R02, R03, R04, R05, R13 and R14, diode V11, V12, V13 and V14 form, resistance R 01, R02, R03, an end ground connection after the R04 parallel connection, the end of other end connecting resistance R05 also meets input analog current signal Ii1, the positive pole of diode V11 links to each other with the negative pole of V12, the plus earth of V12, the negative pole of diode V13 links to each other with the positive pole of V14, the minus earth of diode V14, the negative pole of diode V11, the other end of the anodal connecting resistance R05 of V13, analog current signal Ii2 behind the other end output steering of resistance R 05, one termination power negative pole of resistance R 13, the other end is connected on diode V11, between the V12, a termination power positive pole of resistance R 14, the other end is connected on diode V13, between the V14.
Input end of analog signal will increase protective circuit; when the inverting input voltage of the operational amplifier N5 in the integrating circuit is higher than 1.4V; diode V13, V14 conducting; electric current flows into ground wire; when the inverting input voltage of operational amplifier N5 be lower than-during 1.4V; triode V11, V12 conducting, electric current flows into ground wire.Triode V12 and V14 forward conduction make triode V11 and V13 be in cut-off state under the normal condition.
As shown in Figure 3, integrating circuit is by operational amplifier N5, capacitor C 1, resistance R 15 and R16, triode V15 and V16 form, the inverting input of operational amplifier N5 meets analog current signal Ii2, the in-phase input end ground connection of operational amplifier N5, the end of the output connecting resistance R15 of operational amplifier N5, another termination triode V15 of resistance R 15, the base stage of V16, triode V15, the base stage of V16 and triode V15, be connected by resistance R 16 between the emitter of V16, triode V15, the collector electrode of V16 connects positive pole and the negative pole of power supply respectively, triode V15, the emitter of V16 is as the output output analog voltage signal Uj of integrating circuit, and capacitor C 1 is connected between operational amplifier N5 inverting input and the integrating circuit output.Wherein R15 is 10 Ω, and R16 is 1K Ω, and C1 is 0.047uF.
As shown in Figure 4, logic control circuit is by resistance R 107, R108, R109, R110 and two double trigger D101 and D102 form, resistance R 107, R108, R109, after connecting successively, R110 is connected between the 15V power supply, the analog voltage signal Uj of integrating circuit output is connected between resistance R 108 and the R109, the input of D1 is connected between resistance R 107 and the R108 among the double trigger D101, the input of D2 is connected between resistance R 109 and the R110 among the double trigger D101, the input end of clock of double trigger D101 meets clock signal fcp1, the input end of clock of double trigger D102 meets clock signal fcp2, the in-phase output end of D1 connects the input of D1 among the double trigger D102 among the double trigger D101, the in-phase output end of D2 connects the input of D2 among the double trigger D102 among the double trigger D101, two reversed-phase outputs output feedback control signals are used for the control switch circuit among the double trigger D102, among the double trigger D102 among the in-phase output end of D1 and the double trigger D102 reversed-phase output of D2 produce the output control signal and be used for the control output circuit.Wherein R107 is 36K Ω, and R108 is 3.3K Ω, and R109 is 3K Ω, and R110 is 4.7K Ω, and R144 and R145 are 5.1K Ω.Fcp1, fcp2 are 256KHZ.
In the time of near Uj remains on 0V, the homophase output signal of D1 is low among the double D trigger D101, the homophase output signal of D2 is high, the reversed-phase output signal of D1 is high among the double D trigger D102, the homophase output signal is low, and the reversed-phase output signal of D2 is low, three output of this of D102 control signal control switch circuit, make+IH and-IH8 gets back to ground, makes fcp1 can't pass through output circuit simultaneously.When Uj surpasses positive threshold voltage, the homophase output signal of D1 is high among the D101, and the reversed-phase output signal of D1 is low among the D102, logic control circuit by switching circuit make+IH is input to integrator, the homophase output signal of D1 is high among the D102, allows fcp1 pass through the output circuit right way.When Uj surpassed negative threshold voltage, the homophase output signal of D2 was low among the D101, and the reversed-phase output signal of D2 be high among the D102, logic control circuit by switching circuit make-IH is input to integrator, allows fcp1 bear the road by output circuit.
As shown in Figure 5, switching circuit is by seven diode V19, V20, V21, V22, V23, V24, V25, resistance R 22, R23, R24, R25, R26, two triode V17 and V18 form, in the positive pole of diode V23 and the logic control circuit among the double trigger D102 inverse output terminal of D1 be connected, the negative pole of diode V23 links to each other with an end of resistance R 24, the base stage of another termination triode V17 of resistance R 24, in the positive pole of diode V25 and the logic control circuit among the double trigger D102 inverse output terminal of D2 link to each other, the negative pole of diode V25 links to each other with the positive pole of diode V24, the negative pole of diode V24 connects the base stage of triode V18, be connected between the base stage of triode V17 and V18 after resistance R 25 and the R26 series connection, connect the negative pole of 5V power supply between resistance R 25 and the R26, the grounded emitter of triode V17 and V18, diode V19, V20, V21, the V22 series connection, the positive pole of diode V19 connects the collector electrode of triode V17, the negative pole of diode V22 connects the collector electrode of triode V18, one end of resistance R 22 is connected with-15V power supply, the other end is connected on diode V19, between the V20, one end of resistance R 23 is connected with+15V power supply, the other end is connected on diode V21, between the V22, connect the positive current output of crossing current source circuit between the collector electrode of triode V17 and the diode V19 positive pole, connect the negative current output of crossing current source circuit between the collector electrode of triode V18 and the diode V22 negative pole, diode V20, between the V21 as the output of switching circuit.The function of switching circuit is by logical circuit control, in good time control switch saturation conduction and by feeding back.Wherein R24 is 1K Ω, and R26 is 8K Ω, and R22 and R23 are 1M Ω.
Triode V17 and V18 under the control of logical signal during saturation conduction, electric current+IH and-IH is back to ground, resistance R 22, R23 provide the operating current of triode V19 and V22, make triode V20, V21 reverse bias, no current is fed back into integrator.Triode V17 and V18 under the control of logical signal by the time, electric current+IH and-IH flows to integrator by switching diode.When being in the output of zero-bit no pulse, triode V17 and V18 be saturation conduction simultaneously, works as I
Go intoBe timing, triode V18 ends, and the right way has pulse, works as I
Go intoWhen negative, triode V17 ends, and there is pulse output on negative road.
As shown in Figure 6, constant-current source circuit comprises positive constant-current source and negative constant-current source, positive constant-current source is by triode V4, V5, operational amplifier N2 and resistance R 6 are formed, negative constant-current source is by triode V9, V10, operational amplifier N4 and resistance R 12 are formed, triode V4 and V5 are cascaded as the PNP Darlington transistor, the base stage of PNP Darlington transistor connects the output of operational amplifier N2, the emitter of PNP Darlington transistor connects the inverting input of amplifier N2, one termination of resistance R 6 reaches the emitter of PNP Islington pipe, the power pins of another termination operational amplifier N2, the in-phase input end of operational amplifier N2 connects positive reference voltage, and the collector electrode of PNP Darlington transistor is as positive constant-current source output; Triode V9 and V10 are cascaded as the NPN Darlington transistor, the base stage of NPN Darlington transistor connects the output of operational amplifier N4, the emitter of NPN Darlington transistor connects the inverting input of operational amplifier N4, the emitter of one termination NPN Darlington transistor of resistance R 12, the power pins of another termination operational amplifier N4, the in-phase input end of operational amplifier N4 connects negative reference voltage, and the collector electrode of NPN Darlington transistor is as negative constant-current source output.+ IH ,-IH links to each other with switching circuit, and amplifier N2, N4 are used for relatively amplifying, and triode V4, V5, V9, V10 are for adjusting pipe, and resistance R 6, R12 are sampling resistor.The positive supply power supply is adopted in the design of positive constant-current source, uses the PNP triode to adjust, and the negative supply power supply is adopted in the design of negative constant-current source, uses the NPN triode to adjust.R6 is 1.28K Ω, and R12 is 1.28K Ω.
As shown in Figure 7, shaping circuit is made up of NAND gate D7 and D8, the clock signal fcp that crystal oscillator produces becomes clock signal fcp1 through the first NAND gate D7 paraphase, and clock signal fcp1 is clock signal fcp2 through the second NAND gate D8 paraphase, and clock signal fcp1 and fcp2 are as the output signal of shaping circuit.
As shown in Figure 8, output circuit is made up of NAND gate D9 and D10, positive output signal by the homophase output signal of D1 among clock signal fcp1 and the double D trigger D102 mutually " with " form, negative road output signal by the reversed-phase output signal of D2 among clock signal fcp1 and the double D trigger D102 mutually " with " form.
Reach ± 600 °/s for satisfying the gyroscope survey scope, the clock signal fcp of shaping circuit is 256KHz, for satisfying the linearity in the temperature field [40 ° ,+60 °] less than 8 * 10
-4, triode V17 and V18 in the switching circuit are operated in dark saturation condition, are critical saturated 8 times, and the forward voltage drop of diode V19 and V22 is operated in [0.4V, 0.5V].
The present invention not detailed description is technology as well known to those skilled in the art.
Claims (8)
1. dynamically tuned gyro, DTG analog to digital conversion circuit, it is characterized in that comprising: shunt circuit, integrating circuit, logic control circuit, switching circuit, shaping circuit, constant-current source circuit and output circuit, shunt circuit is shunted the analog current signal Ii1 that imports and is obtained analog current signal Li2, analog current signal Ii2 after the shunting becomes analog voltage signal Uj through integrating circuit, shaping circuit provides clock signal for logic control circuit and output circuit, logic control circuit produces two path control signal according to the polarity of analog voltage signal Uj, wherein one tunnel control signal is used for the control switch circuit as feedback control signal, another road control signal is used for the control output circuit as the output control signal, constant-current source circuit provides current source for switching circuit, switching circuit is according to feedback control signal output positive feedback or the negative feedback current of logic control circuit output, and output circuit is according to the output control signal output frequency signal of logic control circuit output.
2. a kind of dynamically tuned gyro, DTG analog to digital conversion circuit according to claim 1, it is characterized in that: described shunt circuit is by seven resistance R 01, R02, R03, R04, R05, R13 and R14, diode V11, V12, V13 and V14 form, resistance R 01, R02, R03, an end ground connection after the R04 parallel connection, the end of other end connecting resistance R05 also meets input analog current signal Ii1, the positive pole of diode V11 links to each other with the negative pole of V12, the plus earth of V12, the negative pole of diode V13 links to each other with the positive pole of V14, the minus earth of diode V14, the negative pole of diode V11, the other end of the anodal connecting resistance R05 of V13, analog current signal Ii2 behind the other end output steering of resistance R 05, one termination power negative pole of resistance R 13, the other end is connected on diode V11, between the V12, one termination power positive pole of resistance R 14, the other end is connected on diode V13, between the V14.
3. a kind of dynamically tuned gyro, DTG analog to digital conversion circuit according to claim 1, it is characterized in that: described integrating circuit is by operational amplifier N5, capacitor C 1, resistance R 15 and R16, triode V15 and V16 form, the inverting input of operational amplifier N5 meets analog current signal Ii2, the in-phase input end ground connection of operational amplifier N5, the end of the output connecting resistance R15 of operational amplifier N5, another termination triode V15 of resistance R 15, the base stage of V16, triode V15, the base stage of V16 and triode V15, be connected by resistance R 16 between the emitter of V16, triode V15, the collector electrode of V16 connects positive pole and the negative pole of power supply respectively, triode V15, the emitter of V16 is as the output output analog voltage signal Uj of integrating circuit, and capacitor C 1 is connected between operational amplifier N5 inverting input and the integrating circuit output.
4. a kind of dynamically tuned gyro, DTG analog to digital conversion circuit according to claim 1, it is characterized in that: described logic control circuit is by resistance R 107, R108, R109, R110 and two double trigger D101 and D102 form, resistance R 107, R108, R109, after connecting successively, R110 is connected between the 15V power supply, the analog voltage signal Uj of integrating circuit output is connected between resistance R 108 and the R109, the input of D1 is connected between resistance R 107 and the R108 among the double trigger D101, the input of D2 is connected between resistance R 109 and the R110 among the double trigger D101, the input end of clock of double trigger D101 meets clock signal fcp1, the input end of clock of double trigger D102 meets clock signal fcp2, the in-phase output end of D1 connects the input of D1 among the double trigger D102 among the double trigger D101, the in-phase output end of D2 connects the input of D2 among the double trigger D102 among the double trigger D101, two reversed-phase outputs output feedback control signals are used for the control switch circuit among the double trigger D102, among the double trigger D102 among the in-phase output end of D1 and the double trigger D102 reversed-phase output of D2 produce the output control signal and be used for the control output circuit.
5. a kind of dynamically tuned gyro, DTG analog to digital conversion circuit according to claim 1, it is characterized in that: described shaping circuit is made up of NAND gate D7 and D8, the clock signal fcp that crystal oscillator produces becomes clock signal fcp1 through the first NAND gate D7 paraphase, clock signal fcp1 is clock signal fcp2 through the second NAND gate D8 paraphase, and clock signal fcp1 and fcp2 are as the output signal of shaping circuit.
6. a kind of dynamically tuned gyro, DTG analog to digital conversion circuit according to claim 1, it is characterized in that: described switching circuit is by seven diode V19, V20, V21, V22, V23, V24, V25, resistance R 22, R23, R24, R25, R26, two triode V17 and V18 form, in the positive pole of diode V23 and the logic control circuit among the double trigger D102 inverse output terminal of D1 be connected, the negative pole of diode V23 links to each other with an end of resistance R 24, the base stage of another termination triode V17 of resistance R 24, in the positive pole of diode V25 and the logic control circuit among the double trigger D102 inverse output terminal of D2 link to each other, the negative pole of diode V25 links to each other with the positive pole of diode V24, the negative pole of diode V24 connects the base stage of triode V18, be connected between the base stage of triode V17 and V18 after resistance R 25 and the R26 series connection, connect the negative pole of 5V power supply between resistance R 25 and the R26, the grounded emitter of triode V17 and V18, diode V19, V20, V21, the V22 series connection, the positive pole of diode V19 connects the collector electrode of triode V17, the negative pole of diode V22 connects the collector electrode of triode V18, one end of resistance R 22 is connected with-15V power supply, the other end is connected on diode V19, between the V20, one end of resistance R 23 is connected with+15V power supply, the other end is connected on diode V21, between the V22, connect the positive current output of constant-current source circuit between the collector electrode of triode V17 and the diode V19 positive pole, connect the negative current output of constant-current source circuit between the collector electrode of triode V18 and the diode V22 negative pole, diode V20, between the V21 as the output of switching circuit.
7. a kind of dynamically tuned gyro, DTG analog to digital conversion circuit according to claim 1, it is characterized in that: described constant-current source circuit comprises positive constant-current source and negative constant-current source, positive constant-current source is by triode V4, V5, operational amplifier N2 and resistance R 6 are formed, negative constant-current source is by triode V9, V10, operational amplifier N4 and resistance R 12 are formed, triode V4 and V5 are cascaded as the PNP Darlington transistor, the base stage of PNP Darlington transistor connects the output of operational amplifier N2, the emitter of PNP Darlington transistor connects the inverting input of amplifier N2, one termination of resistance R 6 reaches the emitter of PNP Islington pipe, the power pins of another termination operational amplifier N2, the in-phase input end of operational amplifier N2 connects positive reference voltage, and the collector electrode of PNP Darlington transistor is as positive constant-current source output; Triode V9 and V10 are cascaded as the NPN Darlington transistor, the base stage of NPN Darlington transistor connects the output of operational amplifier N4, the emitter of NPN Darlington transistor connects the inverting input of operational amplifier N4, the emitter of one termination NPN Darlington transistor of resistance R 12, the power pins of another termination operational amplifier N4, the in-phase input end of operational amplifier N4 connects negative reference voltage, and the collector electrode of NPN Darlington transistor is as negative constant-current source output.
8. a kind of dynamically tuned gyro, DTG analog to digital conversion circuit according to claim 4, it is characterized in that: described output circuit is made up of NAND gate D9 and D10, positive output signal by the homophase output signal of D1 among clock signal and the double D trigger D102 mutually " with " form, negative road output signal by the reversed-phase output signal of D2 among clock signal and the double D trigger D102 mutually " with " form.
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