CN113721039A - High-precision I/F conversion circuit - Google Patents
High-precision I/F conversion circuit Download PDFInfo
- Publication number
- CN113721039A CN113721039A CN202110895386.7A CN202110895386A CN113721039A CN 113721039 A CN113721039 A CN 113721039A CN 202110895386 A CN202110895386 A CN 202110895386A CN 113721039 A CN113721039 A CN 113721039A
- Authority
- CN
- China
- Prior art keywords
- circuit
- conversion
- polarity switch
- electrically connected
- current source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
- G01P15/00—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
- G01P15/02—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses
- G01P15/08—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/05—Digital input using the sampling of an analogue quantity at regular intervals of time, input from a/d converter or output to d/a converter
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- General Engineering & Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
The invention provides a high-precision I/F conversion circuit, comprising: the device comprises an integrator circuit, a conversion sampling integrated circuit, an FPGA logic control circuit, a positive polarity switch, a positive constant current source, a reverse polarity switch and a negative constant current source; the integrator circuit, the conversion sampling integrated circuit and the FPGA logic control circuit are electrically connected in sequence; the positive polarity switch is electrically connected with the positive constant current source, and the negative polarity switch is electrically connected with the negative constant current source; the acceleration circuit comprises a silicon diode and a ceramic dielectric capacitor, and the ceramic dielectric capacitor is connected with the silicon diode in parallel; the FPGA logic control circuit is electrically connected with the forward polarity switch and the reverse polarity switch through an accelerating circuit respectively. According to the invention, the silicon diode is arranged to prevent reverse current from interfering the control signal, and the ceramic dielectric capacitors connected in parallel are arranged to accelerate the response process, so that the conversion precision of the I/F conversion circuit is improved finally.
Description
Technical Field
The invention relates to the technical field of electronic circuit design, in particular to a high-precision I/F conversion circuit.
Background
An accelerometer is an inertial measurement device used in inertial navigation systems. In the strap-down inertial navigation system, the acceleration sensor is directly arranged on a carrier and used for sensing and measuring the acceleration of the carrier motion, and the position and the speed required by navigation can be obtained through integration. The signals output from the accelerometer are usually analog quantities with low amplitude, and need to be converted into digital signals through an I/F conversion circuit so as to be output to a digital signal processor or a computer for calculation and processing.
The traditional current integration type I/F conversion circuit converts current into a sawtooth voltage signal through a current integrator, compares the sawtooth voltage signal with a threshold voltage, generates a signal to control a polarity switch to be switched on and switched off, controls the feedback of a constant current source to clear the voltage of the integrator, and has the advantages of high stability, strong anti-interference capability and the like. However, the conversion accuracy, integration level, and energy conversion efficiency of the system are still to be improved.
Disclosure of Invention
The present invention addresses at least one of the deficiencies in the art or the need for improvement in the art by providing a high precision I/F conversion circuit.
The invention provides a high-precision I/F conversion circuit, comprising: the device comprises an integrator circuit, a conversion sampling integrated circuit, an FPGA logic control circuit, a positive polarity switch, a positive constant current source, a reverse polarity switch and a negative constant current source;
the integrator circuit, the conversion sampling integrated circuit and the FPGA logic control circuit are electrically connected in sequence; the positive polarity switch is electrically connected with the positive constant current source, and the negative polarity switch is electrically connected with the negative constant current source;
the high-precision I/F conversion circuit also comprises an accelerating circuit, wherein the accelerating circuit comprises a silicon diode and a ceramic dielectric capacitor, and the ceramic dielectric capacitor is connected with the silicon diode in parallel; the FPGA logic control circuit is electrically connected with the forward polarity switch and the reverse polarity switch through the accelerating circuit respectively.
According to the high-precision I/F conversion circuit provided by the invention, the accelerating circuit further comprises a thick film resistor, and the whole body formed by connecting the thick film resistor and the silicon diode in series is connected with the ceramic dielectric capacitor in parallel.
According to the high-precision I/F conversion circuit provided by the invention, the integrator circuit comprises an operational amplifier and a pair of transistors, wherein the operational amplifier and the pair of transistors are electrically connected in series.
According to the high-precision I/F conversion circuit provided by the invention, the conversion sampling integrated circuit comprises an AD conversion module for AD conversion and an integration threshold sampling module for integration threshold sampling, and the AD conversion module is electrically connected with the integration threshold sampling module.
According to the high-precision I/F conversion circuit provided by the invention, the AD conversion module and the integration threshold sampling module are integrated in the conversion sampling integrated circuit in an integrated mode.
The high-precision I/F conversion circuit provided by the invention has the beneficial effects that:
1) the silicon diode is used for isolating and preventing reverse current from interfering a control signal, the thick film resistor is used for eliminating possible ringing, and the ceramic dielectric capacitors connected in parallel are used for accelerating the response process, so that the conversion precision of the I/F conversion circuit is improved finally.
2) The operational amplifier part of the integrator circuit is realized by connecting the operational amplifier with the pair transistor in series, after the pair transistor is connected in series, in the process of current conversion of the circuit, the NPN part of the pair transistor is responsible for the positive half cycle of the sawtooth wave, the PNP part is responsible for the negative half cycle of the sawtooth wave, and the two transistors in the pair transistor are matched with each other, so that the efficiency is greatly improved, and signals are output in high fidelity.
3) The conversion sampling integrated circuit integrates an AD conversion module for AD conversion and an integral threshold sampling module for integral threshold sampling, so that the proportion of an analog circuit part in the circuit is reduced, the number of devices and the connection complexity of the circuit are reduced, and the anti-interference performance is improved.
Drawings
In order to more clearly illustrate the technical solutions of the present invention or the prior art, the following will briefly introduce some drawings needed to be used in the description of the embodiments or the prior art, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic diagram of a high-precision I/F conversion circuit according to the present invention;
FIG. 2 is a timing diagram of the operation of the high precision I/F conversion circuit of the present invention;
FIG. 3 is a schematic diagram of the constant current source and polarity switch of the present invention;
FIG. 4 is a schematic diagram of an integrator circuit of the present invention;
fig. 5 is a schematic diagram of a transition sampling integrated circuit of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1, the present invention provides a high-precision I/F conversion circuit, including: the device comprises an integrator circuit, a conversion sampling integrated circuit, an FPGA logic control circuit, a positive polarity switch, a positive constant current source, a reverse polarity switch and a negative constant current source; the integrator circuit, the conversion sampling integrated circuit and the FPGA logic control circuit are electrically connected in sequence; the positive polarity switch is electrically connected with the positive constant current source, and the negative polarity switch is electrically connected with the negative constant current source; the high-precision I/F conversion circuit also comprises an accelerating circuit, wherein the accelerating circuit comprises a silicon diode and a ceramic dielectric capacitor, and the ceramic dielectric capacitor is connected with the silicon diode in parallel; the FPGA logic control circuit is electrically connected with the forward polarity switch and the reverse polarity switch through the accelerating circuit respectively.
Preferably, the accelerating circuit further comprises a thick film resistor, and the whole body formed by connecting the thick film resistor and the silicon diode in series is connected with the ceramic dielectric capacitor in parallel.
The integrating circuit integrates the input current, when the integrated voltage reaches a preset value, the current of the negative constant current source is fed back to the input end to enable the integrated voltage to start to fall below the preset value, the conversion sampling integrated circuit triggers a monostable circuit in the conversion sampling integrated circuit to output a pulse to feed back the working condition of the integrating circuit to the FPGA logic control circuit, the FPGA logic control circuit receives the pulse feedback and outputs a high level through an I/O port, the high level controls the forward polarity switch to be opened after level conversion, the positive constant current source is bypassed at the moment, the reverse polarity switch is in a cut-off state, the negative constant current source continuously feeds back the current to the input end of the integrating circuit to enable the integrated voltage to fall, when the integrated voltage falls below the reverse preset value, the forward polarity switch is controlled to be cut off, the positive constant current source works and the integrating process is restarted, the operation sequence is shown in fig. 2.
The forward and reverse polarity switches are generally implemented by using semiconductor transistors, as shown in fig. 3 as A3V1 and A3V4, the emitters are grounded, high and low level signals are output from the I/O ports of the FPGA logic control circuit, and the on/off of the transistors is controlled by controlling the base current through level conversion, so as to control the current flow direction of the constant current source. As shown in FIG. 3, a silicon diode A2V11 is connected in series at the input end of the base logic level for isolation to prevent reverse current from disturbing the control signal, a thick film resistor A3R14 is connected in series to eliminate possible ringing, and a ceramic dielectric capacitor A3C10 is connected in parallel for accelerating the response process. Two sets of accelerating circuits with thick film resistors can be selected to be respectively connected with the forward polarity switch and the reverse polarity switch; of course, one accelerating circuit with a thick film resistor and the other accelerating circuit without the thick film resistor can be selected to be respectively connected with the forward polarity switch and the reverse polarity switch; or two sets of accelerating circuits without thick film resistors can be selected to be respectively connected with the forward polarity switch and the reverse polarity switch. When the design parameters of the circuit are reasonable, the ringing phenomenon does not exist in the circuit, and the thick film resistor has little meaning and can not be set; however, when the design parameters of the circuit are not reasonable, ringing is likely to occur in the circuit, and at this time, a thick film resistor needs to be additionally arranged on the accelerating circuit to eliminate the ringing.
The base logic level is a square wave or rectangular wave signal, for example, a positive constant current source polarity switch, when the input logic level jumps to a high level, the voltage applied to the base of the transistor is a sharp-top pulse because the voltage at two ends of the capacitor cannot suddenly change, the base current rapidly increases and enters saturation conduction, and the conduction time is shortened; the charging of the capacitor is quickly finished after the capacitor is conducted, and then the voltage of the input logic level is added to the base electrode to be relatively small, so that the conducting state of the transistor is maintained; when an input signal jumps from a high level to a low level, the voltage applied to the base electrode is a negative sharp-top pulse due to the relation of the original voltage polarity during charging on the capacitor, the process of charge extraction of the base region of the transistor is accelerated due to the negative voltage of the base electrode, the process of switching the transistor from on to off is accelerated, the switching time is shortened, and the response speed of the polarity switch can be improved by connecting the ceramic dielectric capacitor in parallel at the input end of the base electrode, so that the switching precision of the circuit is improved. In the circuit design process, the capacity of a ceramic dielectric capacitor can be set according to the power of a polarity switch, a small power tube generally selects the ceramic dielectric capacitor of 100-1000 pF, a large power tube can select the ceramic dielectric capacitor of 100-1000 nF in consideration, then the waveform of a transistor is electrified and measured, the capacitance value of the ceramic dielectric capacitor is adjusted according to the measured waveform, and meanwhile, a thick film resistor connected with the ceramic dielectric capacitor in parallel is added according to the output waveform of the polarity switch in the debugging process for eliminating possible parasitic capacitance in the circuit and oscillation caused in the level mutation process, namely eliminating possible ringing.
The working process of the polarity switch is as follows: when the polarity of the integrated current is positive, the positive polarity switch is switched on, the reverse polarity switch is switched off, the positive constant current source is bypassed, the negative constant current source works, and the integrated capacitor discharges; the positive polarity switch is cut off, the reverse polarity switch is cut off, and the integrating capacitor is charged; when the polarity of the integrated current is negative, the reverse polarity switch is switched on, the positive polarity switch is switched off, the negative constant current source is bypassed, the positive constant current source works, and the integrated capacitor discharges; the reverse polarity switch is cut off, the forward polarity switch is cut off, the positive constant current source works, and the integrating capacitor is charged.
Preferably, the integrator circuit comprises an operational amplifier and a pair of transistors, the operational amplifier and the pair of transistors being electrically connected in series.
As shown in fig. 4, the integrator circuit integrates the input accelerometer current to convert it into a sawtooth voltage signal with a certain amplitude, and mainly comprises an input resistor, an operational amplifier, and a pair of transistors, where the input resistor is used to adjust the amplitude of the integrated voltage and the pair of transistors stabilize the output current. The core device of the integrator circuit is an operational amplifier, and the operational amplifier with high input impedance, low offset voltage and automatic zero calibration function is selected as much as possible according to actual requirements so as to reduce the influence of zero drift and offset voltage on precision. According to the integrator base equation:
assume the initial voltage of the capacitor is U0When the input current is integrated with the capacitor after operation, the voltage at two ends of the integrator changes into
The change of the voltage at two ends of the capacitor is the integral of the input current to the time, under the condition that the input current is determined, only the size of the capacitor and the voltage threshold value influence the integral time, and meanwhile, the integral capacitor ensures that the leakage resistance is as large as possible so as to reduce the influence of leakage current on the circuit precision.
The operational amplifier part of the integrator circuit is realized by connecting the operational amplifier in series with the geminate transistor, because the polarity of the input current is positive or negative, and the circuit needs to continuously perform charging and discharging processes, the efficiency of the traditional integrator circuit is lower in the process of energy conversion, after the geminate transistor is connected in series, in the process of current conversion of the circuit, the NPN part of the geminate transistor is responsible for the positive half cycle of the sawtooth wave, the PNP part of the geminate transistor is responsible for the negative half cycle of the sawtooth wave, and the two transistors in the geminate transistor are matched with each other to greatly improve the efficiency, so that the signal can be output in high fidelity.
Preferably, the conversion sampling integrated circuit comprises an AD conversion module for AD conversion and an integration threshold sampling module for integration threshold sampling, and the AD conversion module is electrically connected to the integration threshold sampling module. The AD conversion module and the integration threshold sampling module are integrated in the conversion sampling integrated circuit in an integrated mode.
The traditional AD conversion part needs to carry out logic operation on the amplitude of output voltage through a bidirectional voltage comparator, when the amplitude of the output voltage reaches a reference voltage value, a logic signal is output to the input end of a JK trigger or a D trigger to enable the JK trigger or the D trigger to output a pulse signal with a certain frequency to a digital processing circuit, and meanwhile, the trigger or the comparator needs to output a path of level to a polarity switch to control the flow direction of a constant current source and discharge an integral capacitor so as to start a new integration process. The invention adopts a conversion sampling integrated circuit which integrates an AD conversion module for AD conversion and an integral threshold sampling module for integral threshold sampling. The AD conversion module is positioned at the rear end of an integrator circuit in the circuit, the front end of an FPGA logic control circuit is mainly used for converting sawtooth waves output by the integrator circuit into digital signals with certain frequency through logic operation so as to be convenient for a digital signal processor to calculate, meanwhile, an integration threshold sampling module can sample integration voltage and has a monostable circuit triggered by pulses, integration threshold information is fed back to the FPGA logic control circuit, the FPGA logic control circuit controls an I/O port to output control signals to control the work of a polarity switch and a constant current source through the fed-back integration threshold information so as to control the normal charging and discharging working process of the integrator circuit, and meanwhile, the conversion sampling integrated circuit is provided with a power-on reset, a trigger reset, an enable interface and a clock interface. The conversion sampling integrated circuit is selected, the proportion of an analog circuit part in the circuit is reduced, the number of devices and the connection complexity of the circuit are reduced, and the anti-interference performance is improved. A schematic diagram of a transition sampling integrated circuit is shown in fig. 5.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (5)
1. A high-precision I/F conversion circuit comprising: the device comprises an integrator circuit, a conversion sampling integrated circuit, an FPGA logic control circuit, a positive polarity switch, a positive constant current source, a reverse polarity switch and a negative constant current source;
the integrator circuit, the conversion sampling integrated circuit and the FPGA logic control circuit are electrically connected in sequence; the positive polarity switch is electrically connected with the positive constant current source, and the negative polarity switch is electrically connected with the negative constant current source;
the circuit is characterized by further comprising an accelerating circuit, wherein the accelerating circuit comprises a silicon diode and a ceramic dielectric capacitor, and the ceramic dielectric capacitor is connected with the silicon diode in parallel; the FPGA logic control circuit is electrically connected with the forward polarity switch and the reverse polarity switch through the accelerating circuit respectively.
2. A high precision I/F converter circuit according to claim 1, wherein said accelerating circuit further comprises a thick film resistor, and the whole of said thick film resistor connected in series with said silicon diode is connected in parallel with said ceramic dielectric capacitor.
3. A high accuracy I/F conversion circuit as claimed in claim 1 wherein said integrator circuit comprises an operational amplifier and a pair of transistors, said operational amplifier and said pair of transistors being electrically connected in series.
4. A high precision I/F conversion circuit according to claim 1, wherein said conversion sampling integrated circuit includes an AD conversion module for AD conversion and an integration threshold sampling module for integration threshold sampling, said AD conversion module is electrically connected to said integration threshold sampling module.
5. A high-precision I/F conversion circuit according to claim 4, wherein said AD conversion module and said integration threshold sampling module are integrated in said conversion sampling integrated circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110895386.7A CN113721039A (en) | 2021-08-05 | 2021-08-05 | High-precision I/F conversion circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110895386.7A CN113721039A (en) | 2021-08-05 | 2021-08-05 | High-precision I/F conversion circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113721039A true CN113721039A (en) | 2021-11-30 |
Family
ID=78674875
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110895386.7A Pending CN113721039A (en) | 2021-08-05 | 2021-08-05 | High-precision I/F conversion circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113721039A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116068699A (en) * | 2023-03-07 | 2023-05-05 | 南京迪威普光电技术股份有限公司 | Annular high-voltage arc generator with controllable strength and generation method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103338042A (en) * | 2013-06-24 | 2013-10-02 | 北京航天控制仪器研究所 | Analog-digital conversion circuit for dynamically tuned gyroscope |
| CN109067209A (en) * | 2018-09-30 | 2018-12-21 | 严添明 | A kind of high-power wide scope adjustable DC linear stabilized power supply |
| CN111174810A (en) * | 2019-12-31 | 2020-05-19 | 中国船舶重工集团公司第七一七研究所 | High-precision IF conversion module applied to inertial navigation system |
| CN211263520U (en) * | 2019-12-27 | 2020-08-14 | 陕西航天时代导航设备有限公司 | IF conversion circuit based on FPGA |
-
2021
- 2021-08-05 CN CN202110895386.7A patent/CN113721039A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103338042A (en) * | 2013-06-24 | 2013-10-02 | 北京航天控制仪器研究所 | Analog-digital conversion circuit for dynamically tuned gyroscope |
| CN109067209A (en) * | 2018-09-30 | 2018-12-21 | 严添明 | A kind of high-power wide scope adjustable DC linear stabilized power supply |
| CN211263520U (en) * | 2019-12-27 | 2020-08-14 | 陕西航天时代导航设备有限公司 | IF conversion circuit based on FPGA |
| CN111174810A (en) * | 2019-12-31 | 2020-05-19 | 中国船舶重工集团公司第七一七研究所 | High-precision IF conversion module applied to inertial navigation system |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116068699A (en) * | 2023-03-07 | 2023-05-05 | 南京迪威普光电技术股份有限公司 | Annular high-voltage arc generator with controllable strength and generation method |
| CN116068699B (en) * | 2023-03-07 | 2023-08-29 | 南京迪威普光电技术股份有限公司 | Annular high-voltage arc generator with controllable strength and generation method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0695741B2 (en) | Automatic gain control circuit | |
| CN113721039A (en) | High-precision I/F conversion circuit | |
| US4054804A (en) | Bipolar charging and discharging circuit | |
| WO2023006007A1 (en) | Transient process time information detection apparatus for power electronic device | |
| CN208818364U (en) | Temperature measuring circuit | |
| US4031417A (en) | Apparatus for coupling a digital data generator to a digital data readout device with electrical isolation therebetween | |
| CN110739937B (en) | Switch type square wave generator adopting parallel reference voltage source | |
| US3219838A (en) | Pulse-width discriminator | |
| US3411018A (en) | Pulse amplitude difference integrator | |
| EP0020717B1 (en) | Interval timer circuit | |
| CN112398473A (en) | Current frequency conversion circuit with self-adaptive multi-threshold comparison function | |
| CN217931906U (en) | Voltage peak value holding circuit of lightning protection element | |
| CN110739940B (en) | Sample hold circuit | |
| US4042834A (en) | Frequency doubler circuit | |
| US3286100A (en) | Voltage integrator circuit | |
| SU464970A1 (en) | Dc to pulse frequency converter | |
| CN218570208U (en) | Peak detector and differential peak detector | |
| SU792580A1 (en) | Device for restoring pulse signal constant component | |
| SU938371A1 (en) | One-shot multivibrator | |
| SU1298842A1 (en) | Synchronous detector | |
| JPS5820939Y2 (en) | Potential fluctuation detection circuit | |
| SU1170619A1 (en) | Function voltage-to-frequency converter | |
| US3193700A (en) | Ramp generator circuit employing two capacitors, one including means for rapid discharging thereof | |
| SU1531114A1 (en) | Current integrator | |
| SU1132349A1 (en) | Adjustable triangular voltage generator |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |