CN102511008A - Test apparatus with electrostatic discharge capability - Google Patents
Test apparatus with electrostatic discharge capability Download PDFInfo
- Publication number
- CN102511008A CN102511008A CN2009801597093A CN200980159709A CN102511008A CN 102511008 A CN102511008 A CN 102511008A CN 2009801597093 A CN2009801597093 A CN 2009801597093A CN 200980159709 A CN200980159709 A CN 200980159709A CN 102511008 A CN102511008 A CN 102511008A
- Authority
- CN
- China
- Prior art keywords
- test
- module
- proving installation
- electrostatic dissipation
- clamper
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2886—Features relating to contacting the IC under test, e.g. probe heads; chucks
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/06711—Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/18—Screening arrangements against electric or magnetic fields, e.g. against earth's field
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
- G01R31/2806—Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
- G01R31/2808—Holding, conveying or contacting devices, e.g. test adapters, edge connectors, extender boards
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/06711—Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
- G01R1/06716—Elastic
- G01R1/06722—Spring-loaded
Abstract
A test apparatus for eliminating electrostatic discharge (microspark) damage while testing a module (10), said test apparatus comprises a socket holder (12) positioned relative to said module (10) at a test point (conductor) (11) of said module (10) to be tested, and at least one test member (14) partially positioned within said socket holder (12) for electrically engaging said test point (11) when said test point and test member (14) are brought together, said test member (14) includes a static dissipative rod (15) slidably engaging into a hollow cylindrical test pin (16) and a biasing means (17) for biasing said static dissipative rod (15) protruded substantially from the tip of said hollow cylindrical test pin (16).
Description
Technical field
The present invention relates in IC chip testing process, eliminate the control method of a kind of novelty of Electrostatic Discharge.
Background technology
Electrostatic Discharge is the major reason of many microchip faults in the current microelectronic.Current microchip geometric configuration forces numerous microchip manufacturers a large amount of safeguard procedures to be set to block the equipment failure that these cause owing to static discharge with big or small reducing.
Static discharge causes that a key area of big problem is IC chip testing.Typically, in test process, the IC chip is transported to test cell, is inserted in the socket to contact with the conductive test pin.If the lead-in wire or the soldered ball of IC chip do not have static charge, this pin engaged test method can lesion element.But in the environment of reality, the IC chip carries residual static charge.In the manufacture process of reality, when the IC chip contacted with another kind of material or separates (friction), because electrification by friction, static charge always was present on the matrix (insulator) of IC chip.Therefore, the static charge that rests on the IC chip basal body has gathered certain level in the process the more morning before test.The typical problem that static charge is hidden on the IC chip and the later stage discharges is as shown in Figure 1.
Same, in the test of the combined printed circuit board (PCB) of reality and wafer nude film, before testing, will there be the static charge of certain level to stay on the matrix (insulated part) of element/nude film.For describing, Fig. 6 a and 6b illustrate the sectional view of combination PCB and wafer nude film respectively.For simplicity of the present invention and definition are described, only IC test processes (handler) is carried out complete description, but the spirit and scope of the present invention can be applied to make up the test of PCB and wafer nude film equally.
Because market is to the faster higher requirement of output, manufacturing speed rises thereupon, and the IC chip can reach the electrostatic level of a high-risk.In the microchip test processes of high-speed high output, static discharge is question of common concern of microelectronic industry.
In order to overcome the problems referred to above, negative ion is used for offsetting and possibly before test process or in the test process, stays the static charge on the chip.Concrete, this technology of this area will the critical positions around the scene of IC test processes be provided with more strong anion generator to attempt to eliminate this ESD threat.But the maintenance cost when this penalty method will bring negative ion to produce expensive, the needs of daily servicing of equipment, mandatory periodic calibration and fault etc. will cause the high manufacturing cost in today intense market competition.Even be provided with more strong anion generator, the waste product that produces owing to damage of electrostatic discharge still " has come and walked ", and is not at all surprising, not a clear and definite long-term absolute solution safe against all possibilities.
Therefore, need further research and development work and overcome above-mentioned shortcoming to adopt a more economical feasible way.
Summary of the invention
The invention discloses a kind of novel method of selecting and utilizing electrostatic dissipation (static dissipative) material before lead-in wire contacting metal test pin, to reduce the electrostatic level of IC chip.
Shown in Figure 1 is prior art.
Fig. 2 shows the present invention and how to make up static dissipative material at testing jack itself or in test pin; Static dissipative material designs as follows: lead-in wire or soldered ball contact conductive test pin at the IC chip at first touch static dissipative material before; In this way, before touching the conductive test pin, the residual static charge of the lead-in wire of newly-designed IC chip and soldered ball can appropriateness disappear (no low baking temperature flower).
Shown in Figure 3 is another microdeformation that pin relates among Fig. 2; Same, this project organization also is before the lead-in wire of IC chip or soldered ball contact conductive test pin, at first to touch static dissipative material possibly stay the residual charge on the soldered ball pin with safe release and not produce any low baking temperature flower.
Fig. 4 (a) shows how static charge flows through the electrostatic dissipation bar after soldered ball touches the electrostatic dissipation bar; Fig. 4 (b) shows how static charge flows through hollow circuit cylinder after soldered ball touches the electrostatic dissipation hollow circuit cylinder.
An alternative embodiment of the invention is to utilize the electrostatic dissipation brush soldered ball with conductive test pin contact before to carry out safe static discharge through the out-of-date soldered ball that slightly touches with permission at the IC chip.Electrostatic dissipation brush ground connection discharges before the soldered ball engaged test pin of IC chip, to allow any static charge on it.This embodiment is as shown in Figure 5.
The present invention who more than describes is novel, because it allows in feasible lead-in wire or any static charge safe release on the soldered ball (not having the low baking temperature flower) that possibly stay microchip under the situation of not using anion generator.Expense like this, hardly needs repairing.Because the present invention only needs lower disposable manufacturing expense, so its very unique and have commercial value.
Description of drawings
Shown in Figure 1 is the spark problems of IC chip testing;
Shown in Figure 2 for the new design of test pin of the present invention;
Shown in Figure 3 is the newly-designed alternative of test pin of the present invention;
Fig. 4 (a) and (b) be depicted as electrostatic dissipation device of the present invention;
Shown in Figure 5 is in IC chip testing electrostatic dissipation brush application mode before;
Fig. 6 a is depicted as the static charge sectional view of hiding of PCB;
Fig. 6 b is depicted as the static charge sectional view of hiding of wafer nude film.
Embodiment
Fig. 1 a shows a typical microchip (10), and residual static charge is hidden on its matrix and at its conductor part soldered ball (11) induced flow electric charge for example.Thisly go up at testing jack (12) that in a single day floating mobile charge touches another metal object or metal ground will rapid discharge.
The generation of low baking temperature flower (ESD) when Fig. 1 b is depicted as soldered ball (11) and touches metallic test pin (13).This low baking temperature flower can cause the direct infringement of microchip or worse hiding infringement (incipient fault).This hiding incipient fault will cause the fault after electronic equipment or machine used one period preparatory maturity stage, cause heavy economic losses.
The combination, mode and the method for application that the invention discloses the right type material are to be used to provide a kind of IC chip no-spark test operation that does not adopt anion generator.Fig. 2 shows the proving installation (14) how to design and touches soldered ball (11) before with permission at metal pins (16), and electrostatic dissipation bar (15) touches soldered ball (11) earlier.The diameter of electrostatic dissipation bar (15) can be less than test pin (16).This electrostatic dissipation bar (15) vertically inserts the hollow channel of test pin (16) and gives prominence to from the top of test pin down in spring (17) effect.
The material of electrostatic dissipation bar can flood antisatic additive or conductive additive.This material preferably has 10
4-10
11The volume resistance in Europe, preferred, 10
6-10
8Europe.To guarantee like this when contact static charge can rapid discharge, and ohmic value can significantly not reduce and causes too rapid discharge and cause undesirable spark (ESD).The electrostatic dissipation bar (15) that will flow through test pin (14) in the last residual static charge of soldered ball (11) flows to the earth then.
Fig. 3 discloses the another kind of alternative of proving installation (14), and it allows electrostatic dissipation tube (15) to touch soldered ball (11) at metal pins (16) and touches soldered ball (11) before earlier.The external diameter of this electrostatic dissipation tube (15) is slightly less than the diameter in " hole " of unsteady socket (12), and the internal diameter of this electrostatic dissipation tube (15) is slightly less than the diameter of soldered ball (11) or lead-in wire.In the present embodiment, because the effect of saucerspring (17), electrostatic dissipation tube (15) can slide up and down along the perforate of socket (12) easily.The diameter of test pin (16) is slightly less than the internal diameter of hollow electrostatic dissipation tube (15) to allow the free movement of this electrostatic dissipation tube (15).Each electrostatic dissipation tube (15) all contacts with test pin (16) so that touch dissipation or loss static charge at that time at soldered ball (11).
Fig. 4 a shows how static charge flows through this electrostatic dissipation bar behind soldered ball contact electrostatic dissipation bar.Fig. 4 b shows how static charge flows through this electrostatic dissipation hollow after soldered ball contact electrostatic dissipation hollow.
Another microdeformation of the present invention is as shown in Figure 5.Wire electrostatic dissipation bristle (18) is used for before test, the static charge on the soldered ball (11) being discharged.All these bristles (18) are by conduction clamper (19) clamping of ground connection.When IC chip (10) through vacuum mat (21) by pivot arm (20) when picking up, pivot arm will at first rotate to chip (10) with electrostatic dissipation bristle (18) opposite and scrub.This is scrubbed motion the soldered ball of static charge from microchip (10) is discharged, and through electrostatic dissipation bristle (18), flows to conduction clamper (19) and finally flows to the ground (Fig. 5) that process equipment belongs to.Therefore when soldered ball (11) engaged test pin (16), microchip will not have residual charge on (10), thereby eliminate the generation of low baking temperature flower in this microchip test.
Under the prerequisite that does not depart from the scope of the present invention with spirit, touch soldered ball (11) before earlier to eliminate ESD low baking temperature flower through allowing static dissipative material to touch soldered ball (11) at metal pins (16), embodiment can carry out various deformation.
In the manufacture process of the test cell of test processor, the present invention need not adopt any anion generating device.Therefore, make regular check on the loaded down with trivial details task of balanced voltage (± switching voltage) and all will abrogate to the regular cleaning of a large amount of negative ion pins in the compact IC test processor.Comprise the improvement of static dissipative material on this metal pins of the present invention; Allow static dissipative material before soldered ball/lead-in wire is by the metal pins contact, to contact earlier with them, this improvement is equally applicable to that combined printed circuit board shown in Fig. 6 a and 6b is tested and the test of wafer nude film.
This low cost, clean and efficient solution is simple, is easy to make.In the test of the test of the test cell of microchip test processor, printed circuit board (PCB) and wafer nude film, it is the novel useful alternative that replaces a kind of negative ion device.
In a word,, do not deviating from the spirit and scope of the present invention, can outside above-mentioned discussion, take various modifications although the present invention adopts the foregoing description to specifically describe.
Claims (14)
1. one kind is used for when test module (10), eliminating the proving installation that static discharge (low baking temperature flower) damages, and it is characterized in that said proving installation comprises:
Be positioned at the socket clamper (12) of the test point (conductor) of the said module (10) that will test with respect to said module (10);
At least one part is positioned to be used for when said test point converges with it in the said socket clamper (12) and the test block (14) of said test point (11) conductive bond, and said test block (14) comprises and the electrostatic dissipation bar (15) of hollow cylinder test pin (16) sliding joint and said electrostatic dissipation bar (15) bias unit (17) significantly outstanding from said hollow cylinder test pin (16) top that be used to setover.
2. proving installation as claimed in claim 1 is characterized in that, said test point (11) is a soldered ball.
3. proving installation as claimed in claim 1 is characterized in that, said module (10) is an IC chip.
4. proving installation as claimed in claim 1 is characterized in that, said module (10) is a printed circuit board (PCB).
5. proving installation as claimed in claim 1 is characterized in that, said module (10) is the wafer nude film.
6. proving installation as claimed in claim 1 is characterized in that, said electrostatic dissipation bar (15) is processed by the static dissipative material of dipping antisatic additive or conductive additive.
7. proving installation as claimed in claim 6 is characterized in that, the diameter of said electrostatic dissipation bar (15) is less than the internal diameter of said hollow cylinder test pin (16).
8. proving installation as claimed in claim 6 is characterized in that, the said static dissipative material of said electrostatic dissipation bar (15) has 10
4-10
11The measurement volumes resistance in Europe.
9. proving installation that is used for when test module (10) eliminating damage of electrostatic discharge is characterized in that said proving installation comprises:
Be positioned at the socket clamper (12) of the test point (conductor) of the said module (10) that will test with respect to said module (10);
At least one part is positioned at said socket clamper (12) and is used for when said test point converges with it and the test block (14) of said test point (11) conductive bond, the bias unit (17) that said test block (14) comprises with the test pin (16) of hollow electrostatic dissipation cylinder (15) sliding joint and the said hollow electrostatic dissipation cylinder (15) that is used to setover upwards slides from said test pin (16).
10. proving installation as claimed in claim 9; It is characterized in that; The external diameter of said hollow electrostatic dissipation cylinder (15) is slightly less than the socket diameter of said socket clamper (12), and the internal diameter of said hollow electrostatic dissipation cylinder (15) is slightly less than the diameter of said test point (11).
11. proving installation as claimed in claim 10 is characterized in that, said test point (11) is a soldered ball.
12. proving installation as claimed in claim 9 is characterized in that, said test pin (16) has the diameter that is slightly less than said hollow electrostatic dissipation cylinder (15) internal diameter.
13. a static discharge device that is used in the preceding elimination static discharge of test module (10) (low baking temperature flower) infringement is characterized in that said static discharge device comprises:
The electrostatic dissipation bristle (18) that conduction clamper (19), conduction clamper (19) have is a large amount of, stretch out from its level;
Proving installation with said conduction clamper (19) adjacent positioned;
Pivot arm (20); Comprise that at least one has the arm spare of the vacuum mat (21) that is used to pick up the said module (10) that will test, said pivot arm (20) rotate said module (10) to said electrostatic dissipation bristle (18) relatively to scrub the residual charge of eliminating said module (10).
14. static discharge device as claimed in claim 13 is characterized in that, said conduction clamper (19) ground connection.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/MY2009/000072 WO2010143932A1 (en) | 2009-06-10 | 2009-06-10 | Test apparatus with electrostatic discharge capability |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102511008A true CN102511008A (en) | 2012-06-20 |
| CN102511008B CN102511008B (en) | 2013-07-31 |
Family
ID=43309040
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200980159709.3A Active CN102511008B (en) | 2009-06-10 | 2009-06-10 | Test apparatus with electrostatic discharge capability |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN102511008B (en) |
| WO (1) | WO2010143932A1 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103344898A (en) * | 2013-06-27 | 2013-10-09 | 上海华力微电子有限公司 | Factory acceptance test system and method for wafer |
| CN104614664A (en) * | 2015-01-29 | 2015-05-13 | 晶焱科技股份有限公司 | Static electricity eliminated testing method |
| CN107238763A (en) * | 2016-03-28 | 2017-10-10 | 鸿劲科技股份有限公司 | Has the electronic component test classifier of electric charge arrangement for detecting |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103098193B (en) | 2011-08-16 | 2015-07-29 | 大科防静电技术咨询（深圳）有限公司 | There is the testing needle array of electrostatic discharge (ESD) protection |
| US10041995B2 (en) * | 2015-01-15 | 2018-08-07 | Amazing Microelectronic Corp. | Test method for eliminating electrostatic charges |
| CN106783843B (en) * | 2017-01-06 | 2019-03-19 | 中国科学院高能物理研究所 | Electrostatic discharge protection circuit, electrostatic protection apparatus and cDNA microarray method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1249039A (en) * | 1997-02-21 | 2000-03-29 | 鹏思特股份有限公司 | Magnetic recording head tester |
| US6534974B1 (en) * | 1997-02-21 | 2003-03-18 | Pemstar, Inc, | Magnetic head tester with write coil and read coil |
| US20030080748A1 (en) * | 2001-10-26 | 2003-05-01 | Scott Newman | Electrostatic discharge testing apparatus |
| US20080084225A1 (en) * | 2006-10-10 | 2008-04-10 | Amir Salehi | Methods and apparatuses for testing circuit boards |
| CN101285948A (en) * | 2008-05-30 | 2008-10-15 | 福建华映显示科技有限公司 | LCM half-finished product electrostatic resistance limit voltage resistant test method |
-
2009
- 2009-06-10 CN CN200980159709.3A patent/CN102511008B/en active Active
- 2009-06-10 WO PCT/MY2009/000072 patent/WO2010143932A1/en active Application Filing
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1249039A (en) * | 1997-02-21 | 2000-03-29 | 鹏思特股份有限公司 | Magnetic recording head tester |
| US6534974B1 (en) * | 1997-02-21 | 2003-03-18 | Pemstar, Inc, | Magnetic head tester with write coil and read coil |
| US20030080748A1 (en) * | 2001-10-26 | 2003-05-01 | Scott Newman | Electrostatic discharge testing apparatus |
| US20080084225A1 (en) * | 2006-10-10 | 2008-04-10 | Amir Salehi | Methods and apparatuses for testing circuit boards |
| CN101285948A (en) * | 2008-05-30 | 2008-10-15 | 福建华映显示科技有限公司 | LCM half-finished product electrostatic resistance limit voltage resistant test method |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103344898A (en) * | 2013-06-27 | 2013-10-09 | 上海华力微电子有限公司 | Factory acceptance test system and method for wafer |
| CN103344898B (en) * | 2013-06-27 | 2016-01-27 | 上海华力微电子有限公司 | Wafer permits Acceptance Tests system and method |
| CN104614664A (en) * | 2015-01-29 | 2015-05-13 | 晶焱科技股份有限公司 | Static electricity eliminated testing method |
| CN104614664B (en) * | 2015-01-29 | 2018-03-23 | 晶焱科技股份有限公司 | Eliminate the method for testing of electrostatic |
| CN107238763A (en) * | 2016-03-28 | 2017-10-10 | 鸿劲科技股份有限公司 | Has the electronic component test classifier of electric charge arrangement for detecting |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2010143932A1 (en) | 2010-12-16 |
| CN102511008B (en) | 2013-07-31 |
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