CN104020407A - Method for testing electrostatic protection performance of integrated circuit - Google Patents
Method for testing electrostatic protection performance of integrated circuit Download PDFInfo
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- CN104020407A CN104020407A CN201310066664.3A CN201310066664A CN104020407A CN 104020407 A CN104020407 A CN 104020407A CN 201310066664 A CN201310066664 A CN 201310066664A CN 104020407 A CN104020407 A CN 104020407A
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Abstract
The invention discloses a method for testing electrostatic protection performance of an integrated circuit. The method includes simulating various different working environments, and testing the electrostatic protection performance of an integrated circuit in the various different working environments. The method for testing the electrostatic protection performance of the integrated circuit can comprehensively evaluate whether the tested IC satisfies requirements of related standards in the various different working environments.
Description
Technical field
The present invention relates to integrated circuit fields, be specifically related to a kind of method of testing of IC electrostatic defending performance.
Background technology
Integrated circuit (Integrated Circuit, IC) be to utilize semiconductor fabrication process that the elements such as the required resistance of the electronic circuit that forms certain function, electric capacity, semiconductor devices and the connection wire between them are integrated on a fritter silicon chip, be then encapsulated in an electron device in shell.Development along with VLSI (very large scale integrated circuit) technique, the characteristic dimension of IC has reached the deep-submicron stage, but the reducing of IC size makes IC device become more responsive to static discharge (Electrostatic Discharge, ESD), and the IC product failure problem that ESD causes is more and more outstanding.
For the low IC product of electrostatic defending performance is optimized to design, promote the quality of IC product, IC producer need to test the electrostatic defending performance of IC product, to assess its electrostatic defending performance, whether meets relevant criterion.Common IC electrostatic defending performance test methods has at present, IC is put into polybag and blow, rub or survey the methods such as back resistance of IC, and assess its electrostatic defending performance by these methods, but these methods all do not have standard foundation, can only dependence experience judge, lack of standardization.Same IC is in different environments for use, under different temperature environments, its electrostatic defending performance is also incomplete same, therefore the electrostatic defending Performance Evaluation that adopts said method to carry out is not comprehensive, even if adopt above-mentioned method of testing, assess qualified IC after batch production, still likely there is the problem that occurs electrostatic breakdown etc. in different environment while using, cause the loss of IC producer.
Summary of the invention
The embodiment of the present invention provides a kind of method of testing of integrated circuit electrostatic defending performance, electrostatic defending performance that can comprehensive assessment integrated circuit.
The application's the first method provides a kind of method of testing of integrated circuit electrostatic defending performance, comprising:
Under the first temperature conditions, electro-static discharging generator is arranged under the first test condition tested integrated circuit is carried out to the electrostatic discharge testing under the first working environment, wherein, described the first test condition is: the output voltage of described electro-static discharging generator is set to the first voltage, an input and output I/O pin of the described tested integrated circuit of static gun head contact of described electro-static discharging generator, all the other I/O pin ground connection of described tested integrated circuit;
After electrostatic discharge testing under described the first working environment, detect described tested integrated circuit and whether lost efficacy;
If described tested integrated circuit did not lose efficacy, under the first temperature conditions, described electro-static discharging generator is arranged under the second test condition described tested integrated circuit is carried out to the electrostatic discharge testing under the second working environment, wherein, described the second test condition is: the output voltage of described electro-static discharging generator is set to second voltage, an I/O pin of the nearly described tested integrated circuit of static gun head rest of described electro-static discharging generator, all the other I/O pin ground connection of described tested integrated circuit, the absolute value of described second voltage is greater than described the first voltage;
After electrostatic discharge testing under described the second working environment, detect described tested integrated circuit and whether lost efficacy;
If described tested integrated circuit did not lose efficacy, under the second temperature conditions, electro-static discharging generator is separately positioned under described the first test condition and described the second test condition tested integrated circuit is carried out to the electrostatic discharge testing under the 3rd working environment, wherein, described the second temperature is less than described the first temperature;
After electrostatic discharge testing under described the 3rd working environment, detect described tested integrated circuit and whether lost efficacy;
If described tested integrated circuit did not lose efficacy, under the 3rd temperature conditions, electro-static discharging generator is separately positioned under described the first test condition and described the second test condition tested integrated circuit is carried out to the electrostatic discharge testing under the 4th working environment, wherein, described the 3rd temperature is greater than described the first temperature;
Whether detect described tested integrated circuit lost efficacy;
If described tested integrated circuit did not lose efficacy, determine that the electrostatic defending performance test of described tested integrated circuit is passed through.
In the possible implementation of the first, described the first test condition also comprises, the static discharge number of times of described electro-static discharging generator is set at least twice, and the discharge capacity of described electro-static discharging generator is set to 100pf, and the discharge resistance of described electro-static discharging generator is set to 1.5K Ω.
In conjunction with the possible implementation of the first of first aspect or first aspect, in the possible implementation of the second, before described tested integrated circuit is carried out to the electrostatic discharge testing under the first working environment, described method also comprises,
Whether the performance that detects described tested integrated circuit is qualified;
If described tested performance of integrated circuits is qualified, described in triggering, under the first temperature conditions, electro-static discharging generator is arranged on to the step of under the first test condition, tested integrated circuit being carried out the electrostatic discharge testing under the first working environment.
In conjunction with the possible implementation of the second of first aspect, in the third possible implementation, whether the performance of the described tested integrated circuit of described detection is qualified comprises:
Test leakage current and the I-V family curve of each I/O pin of described tested integrated circuit before carrying out electrostatic defending performance test;
If the leakage current before described electrostatic defending performance test and I-V family curve in the given parameter area of described data integrated circuit handbook, determine that the performance of described tested integrated circuit is qualified;
If described tested performance of integrated circuits is qualified, leakage current and I-V family curve described in recording before the described electrostatic defending performance test of each I/O pin.
In conjunction with the third possible implementation of first aspect, in the 4th kind of possible implementation, whether the described tested integrated circuit of described detection lost efficacy, and comprising:
Test leakage current and the I-V family curve of each I/O pin of described tested integrated circuit after the electrostatic discharge testing carrying out under described the first working environment, under the second working environment, under the 3rd working environment or under the 4th working environment;
By the leakage current after the described electrostatic discharge testing on each I/O pin and I-V family curve respectively with described electrostatic defending performance test before leakage current and I-V family curve contrast;
If the difference of the leakage current after the described electrostatic discharge testing on each I/O pin and the leakage current before described test, I-V family curve after described electrostatic discharge testing and the characteristic side-play amount of I-V before described test all, in corresponding threshold range, determine that described tested integrated circuit did not lose efficacy.
In conjunction with the 4th kind of possible implementation of first aspect, in the 5th kind of possible implementation, described the first temperature conditions is 20 ℃～25 ℃, and described the second temperature conditions is 5 ℃～15 ℃, and described the 3rd temperature conditions is 35 ℃～45 ℃.
In conjunction with the 5th kind of possible implementation of first aspect, in the 6th kind of possible implementation, described the first voltage is ± 2KV that described second voltage is ± 4KV.
The present invention passes through the various working environment of simulation, and in this various working environment, IC is carried out to the test of comprehensive electrostatic defending performance, thereby assess this IC, whether in various working environment, all meets the requirement of relevant criterion.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the process flow diagram of the method for testing of a kind of integrated circuit electrostatic defending performance of providing of the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
Please refer to Fig. 1, Fig. 1 is the process flow diagram of the method for testing of a kind of integrated circuit electrostatic defending performance of providing of the embodiment of the present invention, and as shown in Figure 1, the method comprises:
101, under the first temperature conditions, electro-static discharging generator is arranged under the first test condition tested integrated circuit is carried out to the electrostatic discharge testing under the first working environment, wherein, the first test condition is: the output voltage of electro-static discharging generator is set to the first voltage, the static gun head of electro-static discharging generator contacts an I/O pin of tested integrated circuit, all the other I/O pin ground connection of tested integrated circuit.
Wherein, this step is the electrostatic discharge testing under the first working environment, tested integrated circuit being carried out, and the first working environment is: under the first temperature conditions and electro-static discharging generator be arranged on the first test condition.
Electro-static discharging generator is used for the static discharge phenomenon in simulating reality life, and electro-static discharging generator comprises electrostatic generator and static gun.The output of electrostatic generator have just also has negatively, has plenty of positive and negative can conversion, and their voltage bipolarity high precision output is adjustable continuously, and electro-static discharging generator can be used for the ESD test of most electric and electronic equipments.
Wherein, this step is contact-type electrostatic discharge test, and the static gun head of electro-static discharging generator need to contact an I/O pin of tested integrated circuit.
Alternatively, the first test condition can also comprise, the static discharge number of times of electro-static discharging generator is set at least twice, is preferably 3 times, and the discharge capacity of electro-static discharging generator is set to 100pf, and the discharge resistance of electro-static discharging generator is set to 1.5K Ω.
Alternatively, the first temperature in the present embodiment refers under normal temperature condition, is preferably 20 ℃～25 ℃.The first voltage first is ± 2KV that 2KV is the withstand voltage of the contact-type electrostatic electric discharge of related industry standards requirement.Due to electrostatic accumulation may be positive or negative electric charge, therefore need to do to same IC the electrostatic discharge testing of both positive and negative polarity.
Wherein, before carrying out electrostatic defending test, for the validity of warranty test can first be carried out performance checking to tested IC, whether the performance that detects tested IC is qualified, if tested IC performance is qualified, triggers step 101, alternatively, the whether qualified method of performance that detects tested IC can be:
Test leakage current and the I-V family curve of each I/O pin of tested integrated circuit before carrying out electrostatic defending performance test;
If the leakage current before electrostatic defending performance test and I-V family curve in the given parameter area of data integrated circuit handbook, determine that the performance of tested integrated circuit is qualified;
If tested performance of integrated circuits is qualified, record leakage current and I-V family curve before the electrostatic defending performance test of each I/O pin.
102,, after the electrostatic discharge testing under the first working environment, detect tested integrated circuit and whether lost efficacy.
Wherein, detecting the method whether tested integrated circuit lost efficacy can be:
Test leakage current and the I-V family curve of each I/O pin of tested integrated circuit after the electrostatic discharge testing carrying out under the first working environment;
By the leakage current after the electrostatic discharge testing on each I/O pin and I-V family curve respectively with electrostatic defending performance test before leakage current and I-V family curve contrast;
If the difference of the leakage current before the leakage current after the electrostatic discharge testing on each I/O pin and test, the characteristic side-play amount of I-V before I-V family curve after electrostatic discharge testing and test all, in corresponding threshold range, determines that this tested integrated circuit did not lose efficacy.
For example, the difference of the leakage current before the leakage current after electrostatic discharge testing and test is less than 1uA, and the characteristic side-play amount of I-V before the I-V family curve after electrostatic discharge testing and test is less than 30% and can determines that this tested integrated circuit did not lose efficacy.
After the electrostatic discharge testing carrying out under the first working environment, detecting whether tested integrated circuit lost efficacy is in order to guarantee the validity of follow-up test, if lost efficacy after the electrostatic discharge testing of tested IC under the first working environment, and there is no need to carry out again follow-up test, and should carry out design optimization or change.
If 103 tested integrated circuit did not lose efficacy, under the first temperature conditions, electro-static discharging generator is arranged under the second test condition tested integrated circuit is carried out to the discharge test under the second working environment, wherein, the second test condition is: the output voltage of electro-static discharging generator is set to second voltage, an I/O pin of the nearly tested integrated circuit of static gun head rest of electro-static discharging generator, all the other I/O pin ground connection of tested integrated circuit, the absolute value of second voltage is greater than described the first voltage.
Wherein, this step is the electrostatic discharge testing under the second working environment, tested integrated circuit being carried out, and the second working environment is: under the first temperature conditions and electro-static discharging generator be arranged on the second test condition.
Wherein, this step is non-contact-type electrostatic discharge test, and the static gun head of electro-static discharging generator needs an I/O pin near tested integrated circuit.
Alternatively, the second test condition can also comprise, the static discharge number of times of electro-static discharging generator is set at least twice, is preferably 3 times, and the discharge capacity of electro-static discharging generator is set to 100pf, and the discharge resistance of electro-static discharging generator is set to 1.5K Ω.
Alternatively, be preferably ± 4KV of second voltage in the present embodiment, 4KV is the withstand voltage of the contactless static discharge of related industry standards requirement.Due to electrostatic accumulation may be positive or negative electric charge, therefore need to do to same IC the electrostatic discharge testing of both positive and negative polarity.
104,, after the electrostatic discharge testing under the second working environment, detect tested integrated circuit and whether lost efficacy.
Detect concrete grammar that whether tested integrated circuit lost efficacy after the discharge test carrying out under the second working environment with reference to above-mentioned steps 102, repeat no more here.
If 105 tested integrated circuit did not lose efficacy, under the second temperature conditions, electro-static discharging generator is separately positioned under the first test condition and the second test condition tested integrated circuit is carried out to the discharge test under the 3rd working environment, wherein, the second temperature is less than the first temperature.
Wherein, this step is the electrostatic discharge testing under the 3rd working environment, tested integrated circuit being carried out, and the 3rd working environment is: under the second temperature conditions and electro-static discharging generator be arranged on the first test condition or the second test condition.
Alternatively, the second temperature in the present embodiment refers under cryogenic conditions, is preferably 5 ℃～15 ℃, and test can be carried out in cryogenic box.Test reference above-mentioned steps to tested integrated circuit under the first test condition and the second test condition, repeats no more here.
106, after the electrostatic discharge testing under the 3rd working environment, detect tested integrated circuit and whether lost efficacy.
Wherein, detect concrete grammar that whether tested integrated circuit lost efficacy after the discharge test carrying out under the 3rd working environment with reference to above-mentioned steps 102, repeat no more here.
Preferably, because temperature such as floats at the parameter that reason can affect IC, in this step, detect tested integrated circuit and whether lost efficacy and after tested IC takes out from cryogenic box, after the parameter of tested IC is recovered to stablize, just carry out, can in normal temperature environment, place after 2 hours and detect again.
If 107 tested integrated circuit did not lose efficacy, under the 3rd temperature conditions, electro-static discharging generator is separately positioned under the first test condition and the second test condition tested integrated circuit is carried out to the discharge test under the 4th working environment, wherein, the 3rd temperature is greater than the first temperature.
Wherein, this step is the electrostatic discharge testing under the 4th working environment, tested integrated circuit being carried out, and the 4th working environment is: under the 3rd temperature conditions and electro-static discharging generator be arranged on the first test condition or the second test condition.
Alternatively, the 3rd temperature in the present embodiment refers under hot conditions, is preferably 35 ℃～45 ℃, and test can be carried out in high-temperature cabinet.Test reference above-mentioned steps to tested integrated circuit under the first test condition and the second test condition, repeats no more here.
108, after the electrostatic discharge testing under the 4th working environment, detect tested integrated circuit and whether lost efficacy.
Wherein, detect concrete grammar that whether tested integrated circuit lost efficacy after the electrostatic discharge testing carrying out under the 4th working environment with reference to above-mentioned steps 102, repeat no more here.
Preferably, because temperature such as floats at the parameter that reason can affect IC, in this step, detect tested integrated circuit and whether lost efficacy and after tested IC takes out from high-temperature cabinet, after the parameter of tested IC is recovered to stablize, just carry out, can in normal temperature environment, place after 2 hours and detect again.
If 109 tested integrated circuit did not lose efficacy, determine that the electrostatic defending performance test of tested integrated circuit is passed through.
Wherein, the electrostatic discharge testing order in above-mentioned steps under the first working environment to the four working environments can be changed, and is not the order being strictly defined as in the present embodiment.
The present embodiment passes through the various working environment of simulation, and in this various working environment, IC is carried out to the test of comprehensive electrostatic defending performance, thereby assess this IC, whether in various working environment, all meets the requirement of relevant criterion.The present embodiment can also accurately detect where electrostatic defending performance inconsistency lattice in working environment of tested IC, thereby improves targetedly.
Above disclosed is only preferred embodiment of the present invention, certainly can not limit with this interest field of the present invention, and the equivalent variations of therefore doing according to the claims in the present invention, still belongs to the scope that the present invention is contained.
Claims (7)
1. a method of testing for integrated circuit electrostatic defending performance, is characterized in that, comprising:
Under the first temperature conditions, electro-static discharging generator is arranged under the first test condition tested integrated circuit is carried out to the electrostatic discharge testing under the first working environment, wherein, described the first test condition is: the output voltage of described electro-static discharging generator is set to the first voltage, an input and output I/O pin of the described tested integrated circuit of static gun head contact of described electro-static discharging generator, all the other I/O pin ground connection of described tested integrated circuit;
After electrostatic discharge testing under described the first working environment, detect described tested integrated circuit and whether lost efficacy;
If described tested integrated circuit did not lose efficacy, under the first temperature conditions, described electro-static discharging generator is arranged under the second test condition described tested integrated circuit is carried out to the electrostatic discharge testing under the second working environment, wherein, described the second test condition is: the output voltage of described electro-static discharging generator is set to second voltage, the absolute value of described second voltage is greater than described the first voltage, an I/O pin of the nearly described tested integrated circuit of static gun head rest of described electro-static discharging generator, all the other I/O pin ground connection of described tested integrated circuit;
After electrostatic discharge testing under described the second working environment, detect described tested integrated circuit and whether lost efficacy;
If described tested integrated circuit did not lose efficacy, under the second temperature conditions, electro-static discharging generator is separately positioned under described the first test condition and described the second test condition tested integrated circuit is carried out to the electrostatic discharge testing under the 3rd working environment, wherein, described the second temperature is less than described the first temperature;
After electrostatic discharge testing under described the 3rd working environment, detect described tested integrated circuit and whether lost efficacy;
If described tested integrated circuit did not lose efficacy, under the 3rd temperature conditions, electro-static discharging generator is separately positioned under described the first test condition and described the second test condition tested integrated circuit is carried out to the electrostatic discharge testing under the 4th working environment, wherein, described the 3rd temperature is greater than described the first temperature;
After electrostatic discharge testing under described the 4th working environment, detect described tested integrated circuit and whether lost efficacy;
If described tested integrated circuit did not lose efficacy, determine that the electrostatic defending performance test of described tested integrated circuit is passed through.
2. method according to claim 1, is characterized in that,
Described the first test condition also comprises, the static discharge number of times of described electro-static discharging generator is set at least twice, and the discharge capacity of described electro-static discharging generator is set to 100pf, and the discharge resistance of described electro-static discharging generator is set to 1.5K Ω;
Described the second test condition also comprises, the static discharge number of times of described electro-static discharging generator is set at least twice, and the discharge capacity of described electro-static discharging generator is set to 100pf, and the discharge resistance of described electro-static discharging generator is set to 1.5K Ω.
3. method according to claim 1 and 2, is characterized in that, before described tested integrated circuit is carried out to the electrostatic discharge testing under the first working environment, described method also comprises,
Whether the performance that detects described tested integrated circuit is qualified;
If described tested performance of integrated circuits is qualified, described in triggering, under the first temperature conditions, electro-static discharging generator is arranged on to the step of under the first test condition, tested integrated circuit being carried out the electrostatic discharge testing under the first working environment.
4. method according to claim 3, is characterized in that, whether qualified the comprising of performance of the described tested integrated circuit of described detection:
Test leakage current and the I-V family curve of each I/O pin of described tested integrated circuit before carrying out electrostatic defending performance test;
If the leakage current before described electrostatic defending performance test and I-V family curve in the given parameter area of described data integrated circuit handbook, determine that the performance of described tested integrated circuit is qualified;
If described tested performance of integrated circuits is qualified, leakage current and I-V family curve described in recording before the described electrostatic defending performance test of each I/O pin.
5. method according to claim 4, is characterized in that, whether the described tested integrated circuit of described detection lost efficacy, and comprising:
Test leakage current and the I-V family curve of each I/O pin of described tested integrated circuit after the electrostatic discharge testing carrying out under described the first working environment, under the second working environment, under the 3rd working environment or under the 4th working environment;
By the leakage current after the described electrostatic discharge testing on each I/O pin and I-V family curve respectively with described electrostatic defending performance test before leakage current and I-V family curve contrast;
If the difference of the leakage current after the described electrostatic discharge testing on each I/O pin and the leakage current before described test, I-V family curve after described electrostatic discharge testing and the characteristic side-play amount of I-V before described test all, in corresponding threshold range, determine that described tested integrated circuit did not lose efficacy.
6. method according to claim 5, is characterized in that, described the first temperature conditions is 20 ℃～25 ℃, and described the second temperature conditions is 5 ℃～15 ℃, and described the 3rd temperature conditions is 35 ℃～45 ℃.
7. method according to claim 6, is characterized in that, described the first voltage is ± 2KV that described second voltage is ± 4KV.
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| CN201310066664.3A CN104020407B (en) | 2013-03-01 | 2013-03-01 | A kind of method of testing of Integrated circuit electrostatic barrier propterty |
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