CN102497544B - Device for controlling access to video signals - Google Patents
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- CN102497544B CN102497544B CN201110419891.0A CN201110419891A CN102497544B CN 102497544 B CN102497544 B CN 102497544B CN 201110419891 A CN201110419891 A CN 201110419891A CN 102497544 B CN102497544 B CN 102497544B
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- 230000015654 memory Effects 0.000 claims abstract description 68
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- 230000008569 process Effects 0.000 claims description 8
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- 230000003139 buffering effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 7
- 230000005540 biological transmission Effects 0.000 description 3
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CN201110419891.0A CN102497544B (en) | 2011-12-15 | 2011-12-15 | Device for controlling access to video signals |
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CN201110419891.0A CN102497544B (en) | 2011-12-15 | 2011-12-15 | Device for controlling access to video signals |
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CN102497544A CN102497544A (en) | 2012-06-13 |
CN102497544B true CN102497544B (en) | 2014-06-25 |
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Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
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CN103248538B (en) * | 2013-05-16 | 2016-09-07 | 中国电子科技集团公司第四十一研究所 | A kind of based on FPGA and DDR3 realize IP network accumulation burst out damage method |
CN106601160B (en) * | 2016-12-14 | 2020-04-14 | 昆山龙腾光电股份有限公司 | Refresh rate conversion device and method and display device |
CN108595350B (en) * | 2018-01-04 | 2022-04-05 | 深圳开阳电子股份有限公司 | AXI-based data transmission method and device |
CN114253880B (en) * | 2020-09-24 | 2024-08-06 | 京东方科技集团股份有限公司 | Clock frequency adjustment method, device, electronic equipment and readable storage medium |
CN112532935A (en) * | 2020-11-23 | 2021-03-19 | 天津津航计算技术研究所 | Device for determining video source position based on SOC |
CN112599083B (en) * | 2020-12-24 | 2022-09-06 | 深圳市洲明科技股份有限公司 | Data transmission method, data receiving method, sending card and receiving card of display screen |
CN114302089B (en) * | 2021-12-06 | 2024-09-27 | 中国船舶重工集团公司第七0九研究所 | Multi-channel video signal cache control method and system based on FPGA |
Citations (5)
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US6154225A (en) * | 1996-10-11 | 2000-11-28 | Silicon Motion, Inc. | Virtual refresh™ architecture for a video-graphics controller |
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CN101055704A (en) * | 2007-04-28 | 2007-10-17 | 深圳安凯微电子技术有限公司 | A LCD data write-in control method and first in and first out memory |
CN101236601A (en) * | 2008-03-11 | 2008-08-06 | 董亮 | Image recognition accelerator and MPU chip possessing image recognition accelerator |
CN102253909A (en) * | 2011-06-30 | 2011-11-23 | 济南大学 | PCI (Peripheral Component Interconnect) interface and data transmission method thereof under FPGA (Filed-Programmable Gate Array) environment |
Family Cites Families (4)
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US20040193835A1 (en) * | 2003-03-31 | 2004-09-30 | Patrick Devaney | Table lookup instruction for processors using tables in local memory |
CN100414524C (en) * | 2005-09-20 | 2008-08-27 | 中国科学院计算技术研究所 | Method for controlling data transmission between two different speed buses |
US8151008B2 (en) * | 2008-07-02 | 2012-04-03 | Cradle Ip, Llc | Method and system for performing DMA in a multi-core system-on-chip using deadline-based scheduling |
CN101667451B (en) * | 2009-09-11 | 2012-05-09 | 西安电子科技大学 | Data buffer of high-speed data exchange interface and data buffer control method thereof |
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Patent Citations (5)
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US6154225A (en) * | 1996-10-11 | 2000-11-28 | Silicon Motion, Inc. | Virtual refresh™ architecture for a video-graphics controller |
US7284074B2 (en) * | 2002-10-31 | 2007-10-16 | Force10 Networks, Inc. | Pipelined network processing with FIFO queues |
CN101055704A (en) * | 2007-04-28 | 2007-10-17 | 深圳安凯微电子技术有限公司 | A LCD data write-in control method and first in and first out memory |
CN101236601A (en) * | 2008-03-11 | 2008-08-06 | 董亮 | Image recognition accelerator and MPU chip possessing image recognition accelerator |
CN102253909A (en) * | 2011-06-30 | 2011-11-23 | 济南大学 | PCI (Peripheral Component Interconnect) interface and data transmission method thereof under FPGA (Filed-Programmable Gate Array) environment |
Non-Patent Citations (2)
Title |
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陈宏铭等.高效能 低功耗DDR2 控制器的硬件实现.《中国集成电路》.2011 |
高效能,低功耗DDR2 控制器的硬件实现;陈宏铭 等;《中国集成电路》;20110531(第144期);第58-65页 * |
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CN102497544A (en) | 2012-06-13 |
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Effective date of registration: 20171211 Address after: 102412 Beijing City, Fangshan District Yan Village Yan Fu Road No. 1 No. 11 building 4 layer 402 Patentee after: Beijing Si Lang science and Technology Co.,Ltd. Address before: 100190 Zhongguancun East Road, Beijing, No. 95, No. Patentee before: Institute of Automation, Chinese Academy of Sciences |
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Effective date of registration: 20220119 Address after: 519031 room 532, building 18, No. 1889, Huandao East Road, Hengqin District, Zhuhai City, Guangdong Province Patentee after: Zhuhai Jilang Semiconductor Technology Co.,Ltd. Address before: 102412 room 402, 4th floor, building 11, No. 1, Yanfu Road, Yancun Town, Fangshan District, Beijing Patentee before: Beijing Si Lang science and Technology Co.,Ltd. |
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Address after: Room 701, 7th Floor, Building 56, No. 2, Jingyuan North Street, Beijing Economic and Technological Development Zone, Daxing District, Beijing 100176 (Beijing Pilot Free Trade Zone High-end Industry Zone Yizhuang Group) Patentee after: Beijing Jilang Semiconductor Technology Co., Ltd. Address before: 519031 room 532, building 18, No. 1889, Huandao East Road, Hengqin District, Zhuhai City, Guangdong Province Patentee before: Zhuhai Jilang Semiconductor Technology Co.,Ltd. |