CN102496574A - Pretreatment method for SiGe selective epitaxial growth - Google Patents
Pretreatment method for SiGe selective epitaxial growth Download PDFInfo
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- CN102496574A CN102496574A CN2011103661712A CN201110366171A CN102496574A CN 102496574 A CN102496574 A CN 102496574A CN 2011103661712 A CN2011103661712 A CN 2011103661712A CN 201110366171 A CN201110366171 A CN 201110366171A CN 102496574 A CN102496574 A CN 102496574A
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- epitaxial growth
- selective epitaxial
- germanium silicon
- preprocess method
- hydrogen gas
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Abstract
The invention provides a pretreatment method for SiGe selective epitaxial growth. The method comprises the following steps that: hydrogen plasma is introduced into a device in a reaction cavity; chemical reaction is carried out on a native oxide on the device and the hydrogen plasma and then steam is generated and is volatilized; and SiGe selective epitaxial growth is carried out on source/drain regions of the device. According to the above-mentioned technical scheme, etching on a side wall by the plasma during the pretreatment process can be avoided, so that the quality of SiGe film growth can be improved.
Description
Technical field
The invention belongs to semiconductor integrated circuit and make the field, relate in particular to a kind of germanium silicon selective epitaxial growth preprocess method before,, promote the quality of germanium-silicon thin membrane growth to avoid of the etching of preprocessing process ionic medium body to side wall.
Background technology
Enter into along with the integrated technique technology under the process conditions of deep-submicron, it is a series of problems of core with the short-channel effect that conventional micro method has run into.For example, when the further micro of device, along with the increase of current density, the lifting of mobility becomes the key point that keeps transistor performance.In recent years; Because strain engineering technology (Strain Engineering) can be used in 45nm and following technology; Through in the transistorized source/drain region of PMOS, import local unidirectional stretching or compression stress in the raceway groove of MOSFET, to promote the carrier mobility in the transistor channel; Thereby under gate oxide thickness attenuation or situation about remaining unchanged, drive current is increased substantially, thereby improve the PMOS device speed.The germanium and silicon epitaxial layer of wherein, filling the selective epitaxial technology growth of the source/drain region etch away is one of strain engineering technology main cutting edge technology that can be applied at present.
Generally speaking; Complete epitaxy technique at first need carry out preliminary treatment to device according to the process results that realizes, just technology is integrated at present, mainly is used for removing the autoxidation on surface and silica and other impurity of producing; For subsequent epitaxial growth is prepared out clean silicon face state; Otherwise, can influence growth for Thin Film subsequently, influence film quality and strain effects then.This shows that before the selective epitaxial technology growth went out the germanium and silicon epitaxial layer, it is very important that silicon face is carried out preliminary treatment.
A kind of pretreated step that adopts at present is following:
Referring to Figure 1A; One device is provided, and said device comprises substrate 100, on substrate 100, is formed with shallow-trench isolation (STI) 102; On the surface of substrate 100 and STI102, form successively from the bottom to top and include gate oxide 104 and polysilicon gate 106; On the sidewall of said gate oxide 104 and said polysilicon gate 106, be formed with oxide side wall 108, on said oxide side wall 108, be formed with nitride side wall 110, on substrate 100, be formed with source region 112 and drain region 114.The material that said oxide side wall 108 uses can be silicon dioxide (SiO
2), the material that said nitride side wall 110 uses can be silicon nitride.At this moment, on the surface of transistorized source region 112 of PMOS and drain region 114, form one deck natural oxidizing layer 116 (Native Oxide).
Referring to Figure 1B, feed ammonia (NH from the export-oriented above-mentioned device of reaction cavity
3) and Nitrogen trifluoride (NF
3) plasma, said NH
3With said NF
3Between can react the material that generation can react with natural oxidizing layer 116 (being silica), and generate a kind of solidfied material (i.e. (NH
4)
2SiF
6), its chemical equation that generates solidfied material is:
NF
3+NH
3→NH
4F+NH
4F.HF (1)
NH
4F+SiO
2→(NH
4)
2SiF
6+H
2O (2)
NH
4F.HF+SiO
2→(NH
4)
2SiF
6+H
2O (3)
Can know NH by chemical equation (1)
3And NF
3After chemical reaction can generate and be used for etching solidfied material ((NH
4)
2SiF
6) NH
4F (ammonium fluoride) and NH
4F.HF, said NH
4F and said NH
4F.HF is plasma state; Can know by chemical equation (2), in temperature during less than 30 degrees centigrade, NH
4F and NH
4All can generate (NH during F.HF etching oxidation silicon
4)
2SiF
6And H
2O (water).
But this plasma not only generates a kind of solidfied material with silica reaction, also will with nitride side wall 110 (be silicon nitride, Si
3N
4) the reaction generation is with a kind of solidfied material, the chemical equation that generates solidfied material is:
NH
4F+Si
3N
4→(NH
4)
2SiF
6+NH
3↑ (4)
NH
4F.HF+Si
3N
4→(NH
4)
2SiF
6+NH
3↑ (5)
Can know by chemical equation (4), in temperature during less than 30 degrees centigrade, NH
4F and NH
4F.HF also can distinguish etching of silicon nitride, generates (NH
4)
2SiF
6And NH
3
Referring to Fig. 1 C, be heated to about 100～200 degree and let solidfied material resolve into gaseous volatilization to fall.
(NH
4)
2SiF
6→SiF
4↑+NH
3↑+HF↑ (6)
Equally, H
2O also can be vapored away under this temperature.
Referring to Fig. 1 D, therefore, adopt this pretreated method, meeting etching of silicon nitride side wall causes the minimizing of side wall critical size (CD) then, influences the performance of some follow-up Primary Components.
In sum; It is very important to carry out preliminary treatment before the selective epitaxial technology growth germanium silicon; Need seek redress and eliminate of the etching of present preprocessing process ionic medium body side wall, and to the influence of germanium-silicon thin membrane growth quality, but in the implementation process of reality, still exist problem; Demand introducing the new method that effectively to improve above-mentioned defective urgently, faced a series of problems such as how improving short-channel effect when in the semiconductor integrated technique, using to solve the strain engineering technology.
Summary of the invention
Technical problem to be solved by this invention provides a kind of ability germanium silicon selective epitaxial growth preprocess method.
For addressing the above problem, a kind of germanium silicon selective epitaxial growth preprocess method that the present invention proposes comprises the steps: that the device in reaction cavity feeds hydrogen gas plasma; Natural oxidizing layer on the said device and hydrogen gas plasma carry out generating steam behind the chemical reaction; Heating said device vapors away until steam; Carry out germanium silicon selective epitaxial growth in the source/drain region of said device.
Because the device surface of the present invention in reaction cavity feeds hydrogen gas plasma, make hydrogen plasma (reactive hydrogen) the generation steam that can must react easily with the natural oxidizing layer on the said device, heat said device then, steam is vapored away.Yet hydrogen gas plasma and silicon nitride side wall but are difficult to react, thus basically can the etch silicon nitride side wall, thus avoided NH
3And NF
3This side effect of etching to the silicon nitride side wall that plasma brings has solved the problem of the minimizing of side wall critical size (CD).Therefore; Through above-mentioned steps, can remove the natural oxidizing layer of said device surface, for subsequent epitaxial growth has been prepared out clean silicon face state; Can not influence the performance of some follow-up Primary Components; Improved the quality of germanium-silicon thin membrane growth, and then promoted strain effects, technology is simple and easy to be implemented.
Description of drawings
Figure 1A to Fig. 1 D is a kind of germanium silicon selective epitaxial growth preprocess method in the prior art;
Fig. 2 is the pretreated method flow of a kind of germanium silicon of the present invention selective epitaxial growth;
Fig. 3 A to Fig. 3 D is a kind of germanium silicon of the present invention selective epitaxial growth preprocess method.
Embodiment
For make above-mentioned purpose of the present invention, feature and advantage can be more obviously understandable, does detailed explanation below in conjunction with the accompanying drawing specific embodiments of the invention.
A lot of details have been set forth in the following description so that make much of the present invention.But the present invention can implement much to be different from alternate manner described here, and those skilled in the art can do similar popularization under the situation of intension of the present invention, so the present invention does not receive the restriction of following disclosed practical implementation.
Secondly, the present invention utilizes sketch map to be described in detail, when the embodiment of the invention is detailed; For ease of explanation; The profile of expression device architecture can be disobeyed general ratio and done local the amplification, and said sketch map is instance, and it should not limit the scope of the present invention's protection at this.The three dimensions size that in actual fabrication, should comprise in addition, length, width and the degree of depth.
Referring to Fig. 2, a kind of germanium silicon selective epitaxial growth preprocess method flow process provided by the present invention is:
S100: the device in reaction cavity feeds hydrogen gas plasma;
S101: generation steam vapored away after natural oxidizing layer on the said device and hydrogen gas plasma carried out chemical reaction;
S102: carry out germanium silicon selective epitaxial growth in the source/drain region of said device.
Be example with method flow shown in Figure 2 below; In conjunction with accompanying drawing 3A to 3D; Be that example is described in detail the pretreated method technology of a kind of germanium silicon selective epitaxial growth with the PMOS transistor only, those skilled in the art should know the source/drain region that how this method is applied to nmos pass transistor.
S100: the device in reaction cavity feeds hydrogen gas plasma.
At first, referring to Fig. 3 A, device is put in the reaction cavity.Said device comprises substrate 300; On substrate 300, be formed with shallow-trench isolation (STI) 302; On the surface of substrate 300 and STI302, form successively from the bottom to top and include gate oxide 304 and polysilicon gate 306; On the sidewall of said gate oxide 304 and said polysilicon gate 306, be formed with oxide side wall 308, on said oxide side wall 308, be formed with nitride side wall 310, on substrate 300, be formed with source region 312 and drain region 314.The material that said oxide side wall 308 uses can be silicon dioxide (SiO
2), the material that said nitride side wall 310 uses can be silicon nitride.At this moment, on the surface of transistorized source region 312 of PMOS and drain region 314, form one deck natural oxidizing layer 316.
Then, referring to Fig. 3 B, in order to remove natural oxidizing layer 316; Preferably; Feed hydrogen gas plasma from the export-oriented above-mentioned device of reaction cavity, the feeding flow of said hydrogen gas plasma is 100sccm～10000sccm, and the feeding time is 20s～60s; Temperature in the said reaction cavity is 150 degrees centigrade to 600 degrees centigrade, and pressure 2 holders are to 10 holders.
Wherein, said hydrogen gas plasma can also feed original position hydrogen outward by reaction cavity, and in reaction cavity, carries out in-situ plasma technology and produce.
Said original position hydrogen produces the in-situ plasma of hydrogen gas plasma in reaction cavity concrete technological parameter comprises: operating pressure is that 2 holders are to 10 holders; Reaction temperature is 150 degrees centigrade to 600 degrees centigrade; The flow that said hydrogen feeds is 100sccm to 10000sccm; The feeding time is 20s～60s
Radio-frequency power does 50 watts～1000 watts。
S101: generation steam vapored away after natural oxidizing layer on the said device and hydrogen gas plasma carried out chemical reaction.
Referring to Fig. 3 C, said hydrogen gas plasma and natural oxidizing layer 316 reactions, its chemical equation that generates solidfied material (Si) is:
H
*+SiO
2→Si+H
2O↑G＝-285kJ/mol (7)
Simultaneously, be accompanied by the reaction of hydrogen gas plasma and silicon nitride, its chemical equation that generates solidfied material (Si) is:
H
*+Si
3N
4→Si+NH
3↑G＝-12.67kJ/mol (8)
Gibbs free energy changeization (G) according to the required energy of the silicon of generation respectively (Si) crystal in chemical equation (7) and the chemical equation (8) causes is calculated; Hydrogen ion is difficult to and silicon nitride reaction; So basically can etching nitride side wall 310, thereby have avoided NH
3And NF
3This side effect of etching to nitride side wall 310 that plasma brings has solved the problem of the minimizing of side wall critical size (CD), can not influence the performance of some follow-up Primary Components, and technology is simple and easy to be implemented.
S102: carry out germanium silicon selective epitaxial growth in the source/drain region of said device.
Referring to Fig. 3 D, after natural oxidizing layer 316 is eliminated, just can carries out the selective epitaxial technology growth with drain region 314 and go out germanium and silicon epitaxial layer 318 in the transistorized source region 312 of PMOS.
Can know by technique scheme, with available technology adopting NH
3And NF
3Removing the transistorized source region 312 of PMOS compares with the technology of drain region 314 lip-deep natural oxidizing layers 316; The device surface of the present invention in reaction cavity feeds hydrogen gas plasma, the generation steam because reactive hydrogen and natural oxidizing layer 316 react easily.And reactive hydrogen and nitride side wall 310 but are difficult to react, thereby have avoided NH
3And NF
3This side effect of etching to nitride side wall 310 that plasma brings has solved the problem of the minimizing of side wall critical size (CD).Therefore; Can remove transistorized source region 312 of PMOS and drain region 314 lip-deep natural oxidizing layers 316 through the present invention; Prepare out clean silicon face state for subsequent epitaxial growth, can not influence the performance of some follow-up Primary Components, improved the quality of germanium-silicon thin membrane growth; And then having promoted strain effects, technology is simple and easy to be implemented.
Though the present invention with preferred embodiment openly as above; But it is not to be used for limiting claim; Any those skilled in the art are not breaking away from the spirit and scope of the present invention; Can make possible change and modification, so protection scope of the present invention should be as the criterion with the scope that claim of the present invention was defined.
Claims (7)
1. a germanium silicon selective epitaxial growth preprocess method comprises the steps:
Device in reaction cavity feeds hydrogen gas plasma;
Generation steam vapored away after natural oxidizing layer on the said device and hydrogen gas plasma carried out chemical reaction;
Carry out germanium silicon selective epitaxial growth in the source/drain region of said device.
2. germanium silicon selective epitaxial growth preprocess method according to claim 1 is characterized in that: said hydrogen gas plasma feeds by reaction cavity is outer.
3. germanium silicon selective epitaxial growth preprocess method according to claim 2, it is characterized in that: the feeding flow of said hydrogen gas plasma is 100sccm to 10000sccm, the feeding time is 20s to 60s.
4. germanium silicon selective epitaxial growth preprocess method according to claim 2 is characterized in that: the temperature in the said reaction cavity is 150 degrees centigrade to 600 degrees centigrade, and pressure is that 2 holders are to 10 holders.
5. germanium silicon selective epitaxial growth preprocess method according to claim 1, it is characterized in that: said hydrogen gas plasma is to feed original position hydrogen outward by reaction cavity, and in reaction cavity, carries out in-situ plasma technology and produce.
6. germanium silicon selective epitaxial growth preprocess method according to claim 5, it is characterized in that: the feeding flow of said original position hydrogen is 100sccm to 10000sccm, the feeding time is 20s to 60s.
7. germanium silicon selective epitaxial growth preprocess method according to claim 5 is characterized in that: the operating pressure in the said in-situ plasma be 2 the holder to 10 the holder, reaction temperature is 150 degrees centigrade to 600 degrees centigrade, radio-frequency power is 50 watts to 1000 watts.
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103794503A (en) * | 2012-10-30 | 2014-05-14 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method of MOS transistor |
| CN103871850A (en) * | 2014-03-31 | 2014-06-18 | 上海华力微电子有限公司 | Method for reducing e-SiGe lattice imperfections in PMOS manufacturing process |
| CN104124163A (en) * | 2013-04-23 | 2014-10-29 | 中国科学院微电子研究所 | Manufacturing method for semiconductor device |
| CN104124162A (en) * | 2013-04-23 | 2014-10-29 | 中国科学院微电子研究所 | Manufacturing method for semiconductor device |
| CN104795325A (en) * | 2014-01-17 | 2015-07-22 | 北大方正集团有限公司 | Field effect transistor manufacturing method |
| CN105632888A (en) * | 2014-10-30 | 2016-06-01 | 中国科学院微电子研究所 | Removing method of native oxide layer of FinFet device before source-drain epitaxy |
| CN105702580A (en) * | 2014-11-24 | 2016-06-22 | 中国科学院微电子研究所 | Manufacture method of fin type field effect transistor and manufacture method of source and drain region of fin type field effect transistor |
| CN105702579B (en) * | 2014-11-24 | 2018-09-11 | 中国科学院微电子研究所 | The manufacturing method of epi channels, fin formula field effect transistor on fin |
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Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103794503A (en) * | 2012-10-30 | 2014-05-14 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method of MOS transistor |
| CN104124163A (en) * | 2013-04-23 | 2014-10-29 | 中国科学院微电子研究所 | Manufacturing method for semiconductor device |
| CN104124162A (en) * | 2013-04-23 | 2014-10-29 | 中国科学院微电子研究所 | Manufacturing method for semiconductor device |
| CN104795325A (en) * | 2014-01-17 | 2015-07-22 | 北大方正集团有限公司 | Field effect transistor manufacturing method |
| CN103871850A (en) * | 2014-03-31 | 2014-06-18 | 上海华力微电子有限公司 | Method for reducing e-SiGe lattice imperfections in PMOS manufacturing process |
| CN103871850B (en) * | 2014-03-31 | 2017-07-25 | 上海华力微电子有限公司 | The method that e SiGe lattice defects are reduced in PMOS manufacturing process |
| CN105632888A (en) * | 2014-10-30 | 2016-06-01 | 中国科学院微电子研究所 | Removing method of native oxide layer of FinFet device before source-drain epitaxy |
| CN105702580A (en) * | 2014-11-24 | 2016-06-22 | 中国科学院微电子研究所 | Manufacture method of fin type field effect transistor and manufacture method of source and drain region of fin type field effect transistor |
| CN105702580B (en) * | 2014-11-24 | 2018-09-11 | 中国科学院微电子研究所 | The manufacturing method of fin formula field effect transistor and its source-drain area |
| CN105702579B (en) * | 2014-11-24 | 2018-09-11 | 中国科学院微电子研究所 | The manufacturing method of epi channels, fin formula field effect transistor on fin |
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Application publication date: 20120613 |