CN102480017A - Metamaterial prepared on basis of CMOS (complementary metal oxide semiconductor) process - Google Patents
Metamaterial prepared on basis of CMOS (complementary metal oxide semiconductor) process Download PDFInfo
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- CN102480017A CN102480017A CN2011101457557A CN201110145755A CN102480017A CN 102480017 A CN102480017 A CN 102480017A CN 2011101457557 A CN2011101457557 A CN 2011101457557A CN 201110145755 A CN201110145755 A CN 201110145755A CN 102480017 A CN102480017 A CN 102480017A
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Abstract
An embodiment of the invention provides a metamaterial prepared on the basis of CMOS (complementary metal oxide semiconductor) process, which comprises a first dielectric layer, a first metal layer, a second dielectric layer, a second metal layer and a third dielectric layer. The first metal layer is positioned on the first dielectric layer and has a first micro-structure, the second dielectric layer is positioned on the first metal layer and is provided with a first through hole, materials filled in the first through hole are identical to materials of the first metal layer, the second metal layer is positioned on the second dielectric layer, is connected with the first metal layer by the first through hole, has a second micro-structure and is made of materials identical to those of the first metal layer, and the third dielectric layer is positioned on the second metal layer. Electromagnetic characteristics of the metamaterial are richer and more excellent.
Description
[technical field]
The present invention relates to technical field of composite materials, relate in particular to a kind of ultra material based on the CMOS prepared.
[background technology]
Along with the fast development of new and high technologies such as radar detection, satellite communication, Aero-Space, and the rise of research field such as anti-electromagnetic interference, stealth technique, microwave dark room, the research of microwave absorbing material more and more receives people's attention.Because very marvellous galvanomagnetic effect can appear in ultra material, can be used for fields such as absorbing material and stealth material, becomes the focus of absorbing material area research.The character of ultra material and function mainly come from its inner structure, generally, realize its function through on medium substrate, forming the metal level with micro structure array.
CMOS (Complementary Metal Oxide Semiconductor, CMOS) technology is to realize the technology of controlled minimum dimension in the current semiconductor technology, and the technology of 32nm is ripe gradually now, and the technology of smaller szie is developed.Simultaneously, the usage quantity of metal level can have been realized 8 layers metal connecting line now also in continuous increase in the CMOS technology.But the ultra material through the CMOS prepared is not arranged yet.
[summary of the invention]
Technical problem to be solved by this invention provides a kind of ultra material based on the CMOS prepared, can access the ultra material that the micro-structural controllability is higher, also more adhere to specification.
For solving the problems of the technologies described above, the embodiment of the invention provides a kind of ultra material based on the CMOS prepared, it is characterized in that, said ultra material comprises:
First dielectric layer; Be positioned at the first metal layer above said first dielectric layer, this first metal layer has first micro-structural; Be positioned at second dielectric layer above the said the first metal layer, this second dielectric layer has first through hole, and the material of filling in this first through hole is identical with the material of the first metal layer; Be positioned at above said second dielectric layer, through second metal level that first through hole is connected with said the first metal layer, this second metal level has second micro-structural, and has identical materials with said the first metal layer; And be positioned at the 3rd dielectric layer above said second metal level.
Technique scheme has the following advantages: all have micro-structural on the first metal layer and second metal level, changed the electromagnetic property of every layer of metal material; In addition; Be connected through the through hole of having filled metal material between the first metal layer and second metal level, the ultra material that adopts this mode to prepare is compared with the ultra material of single-layer metal preparation; Have the electromagnetic property that is different from, have abundanter, more superior electromagnetic property.
[description of drawings]
In order to be illustrated more clearly in the technical scheme in the embodiment of the invention; The accompanying drawing of required use is done to introduce simply in will describing embodiment below; Obviously, the accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills; Under the prerequisite of not paying creative work property, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is that the embodiment of the invention provides " worker " font micro-structural sketch map;
Fig. 2 is that the embodiment of the invention provides " ten " font micro-structural sketch map;
Fig. 3 is that the embodiment of the invention provides " king " font micro-structural sketch map;
Fig. 4 is that the embodiment of the invention provides
font micro-structural sketch map;
Fig. 5 is the scalene triangle micro-structural sketch map that the embodiment of the invention provides;
Fig. 6 is that the present invention implements a kind of metamaterial structure sketch map based on the CMOS prepared that provides;
Fig. 7 is that the present invention implements two a kind of metamaterial structure sketch mapes based on the CMOS prepared of providing;
Fig. 8 is that the present invention implements three a kind of metamaterial structure sketch mapes based on the CMOS prepared of providing;
Fig. 9 is that the present invention implements four a kind of metamaterial structure sketch mapes based on the CMOS prepared of providing.
[embodiment]
To combine the accompanying drawing in the embodiment of the invention below, the technical scheme in the embodiment of the invention is carried out clear, intactly description, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills are not making all other embodiment that obtained under the creative work prerequisite, all belong to the scope of the present invention's protection.
At first, the micro-structural that the embodiment of the invention is related to briefly introduces.
Micro-structural refers to and need possibly see fine structure by microscope even Electronic Speculum, is often referred to the structural units of diameter less than 0.25mm.
Micro-structural can be an axially symmetric structure, for example " worker " font structure, " ten " font structure or " king " font structure.
Referring to Fig. 1, be " worker " font micro-structural sketch map that the embodiment of the invention provides.
In concrete implementation process, also comprise all figures that obtain by " worker " evolution of font, for example " soil " font, " doing " font etc.
Referring to Fig. 2, be " ten " font micro-structural sketch map that the embodiment of the invention provides.
In concrete implementation process, also comprise all figures that obtain by " ten " evolution of font, for example " T " font, fall " T " font, " X " font etc.
Referring to Fig. 3, be " king " font micro-structural sketch map that the embodiment of the invention provides.
In concrete implementation process, also comprise all figures that obtain by " king " evolution of font, for example " Gui " font etc.
Micro-structural can be a nonaxisymmetric structure also, comprising:
font, scalene triangle, parallelogram or irregular closed curve.
Referring to Fig. 4, be
font micro-structural sketch map that the embodiment of the invention provides.
In concrete implementation process, also comprise all figures that obtain by
evolution of font.
Referring to Fig. 5, be the scalene triangle micro-structural sketch map that the embodiment of the invention provides.Parallelogram in the non-zhou duicheng tuxing and irregular closed curve are no longer drawn here and are detailed.
Embodiment one,
Referring to Fig. 6, be that the present invention implements a kind of metamaterial structure sketch map based on the CMOS prepared that provides, this ultra material comprises:
First dielectric layer 601; Be positioned at the first metal layer 602 above first dielectric layer 601, this first metal layer 602 has first micro-structural (not shown among Fig. 6); Be positioned at second dielectric layer 603 above the first metal layer 602, this second dielectric layer 603 has first through hole 604, and the material of filling in this first through hole 604 is identical with the material of the first metal layer 602; Be positioned at above second dielectric layer 603, through second metal level 605 that first through hole 604 is connected with the first metal layer 602, this second metal has second micro-structural (not shown among Fig. 6) for 605 layers, and has identical materials with the first metal layer 602; And be positioned at the 3rd dielectric layer 606 above second metal level 605.
Wherein, First micro-structural and second micro-structural are all through the CMOS prepared; For example; Process in preparation first micro-structural on the first metal layer 602 is following: on the first metal layer 602, apply one deck photoresist, according to preset micro-structural photoresist is carried out photoetching, this preset micro-structural can be any one micro-structural shown in Fig. 1 to Fig. 6; Adopt the mode of wet etching or dry etching to transfer on the first metal layer 602 in the figure that forms after the photoetching on the photoresist; Remove then and be coated in the photoresist on the first metal layer 602, obtain having the first metal layer 602 of micro-structural.
Wherein, first through hole 604 for example, applies one deck photoresist through the CMOS prepared on second dielectric layer 603, according to the size and the shape in preset hole photoresist is carried out photoetching; With the figure transfer that forms after the photoetching on the photoresist to second dielectric layer 603; Removal is coated in the photoresist on second dielectric layer 603, thereby forms first through hole 604 at second dielectric layer 603.
Wherein, the structure of first micro-structural and second micro-structural can be identical, also can be different.For example first micro-structural and second micro-structural can be any one micro-structurals shown in Fig. 1 to Fig. 6; Perhaps, first micro-structural is a kind of micro-structural shown in Fig. 1 to Fig. 6, and second micro-structural is the another kind of micro-structural shown in Fig. 1 to Fig. 6.In concrete implementation process, carry out flexible design as requested.
Wherein, The thickness of first dielectric layer 601 and second dielectric layer 603 can be identical; The thickness of the 3rd dielectric layer 606 is equal to, or greater than the thickness of first dielectric layer 601, and the situation of the thickness of the 3rd dielectric layer 606 greater than the thickness of first dielectric layer 601 has been shown among Fig. 6; First dielectric layer 601, second dielectric layer 603 and the 3rd dielectric layer 606 can have identical dielectric substance; For example, this electrolyte can be any one in pottery, macromolecular material, ferroelectric material, ferrite material and the ferromagnetic material; First dielectric layer 601, second dielectric layer 603 and the 3rd dielectric layer 606 also can have different dielectric substances.
In the present embodiment, all have micro-structural on the first metal layer 602 and second metal level 605, changed the electromagnetic property of every layer of metal material; In addition, be connected through first through hole 604 of having filled metal material between the first metal layer 602 and second metal level 605, the ultra material that adopts this mode to prepare is compared with the ultra material of single-layer metal preparation, has abundanter, more superior electromagnetic property.
Embodiment two,
Referring to Fig. 7, be that the present invention implements two a kind of metamaterial structure sketch mapes based on the CMOS prepared of providing, this ultra material comprises:
First dielectric layer 701; Be positioned at the first metal layer 702 above first dielectric layer 701, this first metal layer 702 has first micro-structural (not shown among Fig. 7); Be positioned at second dielectric layer 703 above the first metal layer 702, this second dielectric layer 703 has first through hole 704, and the material of filling in this first through hole 704 is identical with the material of the first metal layer 702; Be positioned at above second dielectric layer 703, through second metal level 705 that first through hole 704 is connected with the first metal layer 702, this second metal has second micro-structural (not shown among Fig. 7) for 705 layers, and has identical materials with the first metal layer 702; The 3rd dielectric layer 706, the three dielectric layers 706 that are positioned at above second metal level 705 have second through hole 707; Be positioned at above the 3rd dielectric layer 706, and have the 3rd micro-structural through the 3rd metal level 708, the three metal levels 708 that second through hole 707 is connected with second metal level 705; And be positioned at the 4th dielectric layer 709 above the 3rd metal level 708.
Wherein, First micro-structural, second micro-structural and the 3rd micro-structural are all through the CMOS prepared; For example; Process in preparation first micro-structural on the first metal layer 702 is following: on the first metal layer 702, apply one deck photoresist, according to preset micro-structural photoresist is carried out photoetching, this preset micro-structural can be any one micro-structural shown in Fig. 1 to Fig. 6; Adopt the mode of wet etching or dry etching to transfer on the first metal layer 702 in the figure that forms after the photoetching on the photoresist; Remove then and be coated in the photoresist on the first metal layer 702, obtain having the first metal layer 702 of micro-structural.
Wherein, first through hole 704 and second through hole 707 for example, apply one deck photoresist all through the CMOS prepared on second dielectric layer 703, according to the size and the shape in preset hole photoresist is carried out photoetching; Adopt the mode of wet etching or dry etching to transfer on second dielectric layer 703 in the figure that forms after the photoetching on the photoresist; Removal is coated in the photoresist on second dielectric layer 703, thereby forms first through hole 704 at second dielectric layer 703.
Wherein, the structure of first micro-structural, second micro-structural and the 3rd micro-structural can be identical, also can be different.For example first micro-structural, second micro-structural and the 3rd micro-structural can be any one micro-structurals shown in Fig. 1 to Fig. 6; Perhaps, first micro-structural is a kind of micro-structural shown in Fig. 1 to Fig. 6, and second micro-structural is that the another kind of micro-structural shown in Fig. 1 to Fig. 6, the 3rd micro-structural are another micro-structurals that is different from first micro-structural and second micro-structural shown in Fig. 1 to Fig. 6.In concrete implementation process, carry out flexible design as requested.
Wherein, First dielectric layer 701, second dielectric layer 703, the 3rd dielectric layer 706 and the 4th dielectric layer 709 can have identical dielectric substance; For example, this electrolyte can be any one in pottery, macromolecular material, ferroelectric material, ferrite material and the ferromagnetic material; First dielectric layer 701, second dielectric layer 703, the 3rd dielectric layer 706 and the 4th dielectric layer 709 also can have different dielectric substances.
Wherein, second through hole 707 is filled with and the first metal layer 702 identical materials; The material of the 3rd metal level 708 is identical with the material of the first metal layer 702.
In the present embodiment, all have micro-structural on the first metal layer 702, second metal level 705 and the 3rd metal level 708, changed the electromagnetic property of every layer of metal material; In addition; Be connected through first through hole 704 of having filled metal material between the first metal layer 702 and second metal level 705; Be connected through second through hole 707 of having filled metal material between second metal level 705 and the 3rd metal level 708; The ultra material that adopts this mode to prepare is compared with the ultra material of single-layer metal preparation, has abundanter, more superior electromagnetic property.
Embodiment three,
Referring to Fig. 8, be that the present invention implements three a kind of metamaterial structure sketch mapes based on the CMOS prepared of providing, this ultra material comprises:
First dielectric layer 801; Be positioned at the first metal layer 802 above first dielectric layer 801, this first metal layer 802 has first micro-structural (not shown among Fig. 8); Be positioned at second dielectric layer 803 above the first metal layer 802, this second dielectric layer 803 has first through hole 804, and the material of filling in this first through hole 804 is identical with the material of the first metal layer 802; Be positioned at above second dielectric layer 803, through second metal level 805 that first through hole 804 is connected with the first metal layer 802, this second metal has second micro-structural (not shown among Fig. 8) for 805 layers, and has identical materials with the first metal layer 802; Be positioned at the 3rd dielectric layer 806 above second metal level 805; And be positioned at the 4th dielectric layer 807 below first dielectric layer 801.
Wherein, First micro-structural and second micro-structural are all through the CMOS prepared; For example; Process in preparation first micro-structural on the first metal layer 802 is following: on the first metal layer 802, apply one deck photoresist, according to preset micro-structural photoresist is carried out photoetching, this preset micro-structural can be any one micro-structural shown in Fig. 1 to Fig. 6; Adopt the mode of wet etching or dry etching to transfer on the first metal layer 802 in the figure that forms after the photoetching on the photoresist; Remove then and be coated in the photoresist on the first metal layer 802, obtain having the first metal layer 802 of micro-structural.
Wherein, first through hole 804 for example, applies one deck photoresist through the CMOS prepared on second dielectric layer 803, according to the size and the shape in preset hole photoresist is carried out photoetching; With the figure transfer that forms after the photoetching on the photoresist to second dielectric layer 803; Removal is coated in the photoresist on second dielectric layer 803, thereby forms first through hole 804 at second dielectric layer 803.
Wherein, the structure of first micro-structural and second micro-structural can be identical, also can be different.For example first micro-structural and second micro-structural can be any one micro-structurals shown in Fig. 1 to Fig. 6; Perhaps, first micro-structural is a kind of micro-structural shown in Fig. 1 to Fig. 6, and second micro-structural is the another kind of micro-structural shown in Fig. 1 to Fig. 6.In concrete implementation process, carry out flexible design as requested.
Wherein, First dielectric layer 801, second dielectric layer 803, the 3rd dielectric layer 806 and the 4th dielectric layer 807 can have identical dielectric substance; For example, this electrolyte can be any one in pottery, macromolecular material, ferroelectric material, ferrite material and the ferromagnetic material; First dielectric layer 801, second dielectric layer 803, the 3rd dielectric layer 806 and the 4th dielectric layer 807 also can have different dielectric substances, generally speaking,, the 4th dielectric layer 807 and first dielectric layer 801 have identical materials.
In the present embodiment, all have micro-structural on the first metal layer 802 and second metal level 805, changed the electromagnetic property of every layer of metal material; In addition, be connected through first through hole 804 of having filled metal material between the first metal layer 802 and second metal level 805, the ultra material that adopts this mode to prepare is compared with the ultra material of single-layer metal preparation, has abundanter, more superior electromagnetic property.
Embodiment four,
Referring to Fig. 9, be that the present invention implements four a kind of metamaterial structure sketch mapes based on the CMOS prepared of providing, this ultra material comprises:
First dielectric layer 901; Be positioned at the first metal layer 902 above first dielectric layer 901, this first metal layer 902 has first micro-structural (not shown among Fig. 9); Be positioned at second dielectric layer 903 above the first metal layer 902, the material that this second dielectric layer 903 is built-in with filling in first through hole 904, second through hole, 905, the first through holes 904 and second through hole 905 is identical with the material of the first metal layer 902; Be positioned at above second dielectric layer 903, through second metal level 906 that first through hole 904 is connected with the first metal layer 902, this second metal level 906 has second micro-structural (not shown among Fig. 9), and has identical materials with the first metal layer 902; Be built in second dielectric layer 903; One end is connected with the first metal layer 902 through first through hole 904; The 3rd metal level 907 that the other end is connected with second metal level 906 through second through hole 905; The material of the 3rd metal level 907 is identical with the material of the first metal layer 902, and length is less than the length of the first metal layer 902; And be positioned at the 3rd dielectric layer 908 above second metal level 906.
Wherein, First micro-structural and second micro-structural are all through the CMOS prepared; For example; Process in preparation first micro-structural on the first metal layer 902 is following: on the first metal layer 902, apply one deck photoresist, according to preset micro-structural photoresist is carried out photoetching, this preset micro-structural can be any one micro-structural shown in Fig. 1 to Fig. 6; Adopt the mode of wet etching or dry etching to transfer on the first metal layer 902 in the figure that forms after the photoetching on the photoresist; Remove then and be coated in the photoresist on the first metal layer 902, obtain having the first metal layer 902 of micro-structural.
Wherein, first through hole 904 and second through hole 905 for example, apply one deck photoresist through the CMOS prepared on second dielectric layer 903, according to the size and the shape in preset hole photoresist is carried out photoetching; With the figure transfer that forms after the photoetching on the photoresist to second dielectric layer 903; Removal is coated in the photoresist on second dielectric layer 903, thereby forms second through hole 905 at second dielectric layer 903.
Wherein, the structure of first micro-structural and second micro-structural can be identical, also can be different.For example first micro-structural and second micro-structural can be any one micro-structurals shown in Fig. 1 to Fig. 6; Perhaps, first micro-structural is a kind of micro-structural shown in Fig. 1 to Fig. 6, and second micro-structural is the another kind of micro-structural shown in Fig. 1 to Fig. 6.In concrete implementation process, carry out flexible design as requested.
Wherein, first dielectric layer 901 is different with the thickness of second dielectric layer 903, and the thickness of first dielectric layer 901 can be identical with the 3rd dielectric layer 908; First dielectric layer 901, second dielectric layer 903 and the 3rd dielectric layer 908 can have identical dielectric substance; For example, this electrolyte can be any one in pottery, macromolecular material, ferroelectric material, ferrite material and the ferromagnetic material; First dielectric layer 901, second dielectric layer 903 and the 3rd dielectric layer 908 also can have different dielectric substances.
In the present embodiment, all have micro-structural on the first metal layer 902 and second metal level 906, changed the electromagnetic property of every layer of metal material; In addition; Also have the 3rd metal level 907 between the first metal layer 902 and second metal level 906, connect the ultra material that adopts this mode to prepare between the metal level through through hole; Compare with the ultra material of single-layer metal preparation, have abundanter, more superior electromagnetic property.
Above embodiment has carried out detailed description to the ultra material with different metal level, in concrete implementation process, is not limited to the metal level, and is identical with the metamaterial structure of describing in the embodiment of the invention,
More than the embodiment of the invention has been carried out detailed introduction, used concrete example among this paper principle of the present invention and execution mode set forth, the explanation of above embodiment just is used for helping to understand method of the present invention and core concept thereof; Simultaneously, for one of ordinary skill in the art, according to thought of the present invention, the part that on embodiment and range of application, all can change, in sum, this description should not be construed as limitation of the present invention.
Claims (10)
1. the ultra material based on the CMOS prepared is characterized in that, said ultra material comprises:
First dielectric layer; Be positioned at the first metal layer above said first dielectric layer, this first metal layer has first micro-structural; Be positioned at second dielectric layer above the said the first metal layer, this second dielectric layer has first through hole, and the material of filling in this first through hole is identical with the material of the first metal layer; Be positioned at above said second dielectric layer, through second metal level that first through hole is connected with said the first metal layer, this second metal level has second micro-structural, and has identical materials with said the first metal layer; And be positioned at the 3rd dielectric layer above said second metal level.
2. ultra material according to claim 1 is characterized in that, said first micro-structural is identical with the structure of said second micro-structural.
3. ultra material according to claim 2 is characterized in that, said micro-structural is an axially symmetric structure, comprising: " worker " font structure, " ten " font structure or " king " font structure.
4. ultra material according to claim 2; It is characterized in that; Said micro-structural is a nonaxisymmetric structure, comprising:
font, scalene triangle, parallelogram or irregular closed curve.
5. ultra material according to claim 1 is characterized in that, said first micro-structural is different with said second micro-structural.
6. ultra material according to claim 5 is characterized in that, said first micro-structural is an axially symmetric structure, and said second micro-structural is a nonaxisymmetric structure; Perhaps,
Said first micro-structural is a nonaxisymmetric structure, and said second micro-structural is an axially symmetric structure.
7. ultra material according to claim 1 is characterized in that, said first dielectric layer, said second dielectric layer and said the 3rd dielectric layer have identical dielectric substance; Perhaps different dielectric substances.
8. ultra material according to claim 1 is characterized in that, said the 3rd dielectric layer has second through hole, and said ultra material also comprises:
Be positioned at above said the 3rd dielectric layer, and pass through the 3rd metal level that said second through hole is connected with said second metal level, the 3rd metal level has the 3rd micro-structural; And,
And be positioned at the 4th dielectric layer above said the 3rd metal level;
Wherein: said second through hole is filled with and said the first metal layer identical materials; The material of said the 3rd metal level is identical with the material of said the first metal layer.
9. ultra material according to claim 1 is characterized in that, said ultra material also comprises:
Be positioned at the 4th dielectric layer below said first dielectric layer, the 4th dielectric layer and said first dielectric layer have identical materials or material different.
10. ultra material according to claim 1 is characterized in that, is built-in with second through hole and the 3rd metal level in said second dielectric layer; One end of said the 3rd metal level is connected with said the first metal layer through said first through hole, and the other end is connected with said second metal level through said second through hole;
Wherein, said second through hole is filled with and said the first metal layer identical materials; The material of said the 3rd metal level is identical with the material of said the first metal layer; The length of said the 3rd metal level is less than the length of said the first metal layer.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103717046A (en) * | 2012-09-29 | 2014-04-09 | 深圳光启创新技术有限公司 | Wave absorbing material |
| CN103717047A (en) * | 2012-09-29 | 2014-04-09 | 深圳光启创新技术有限公司 | Wave-absorbing material |
| CN103717044A (en) * | 2012-09-29 | 2014-04-09 | 深圳光启创新技术有限公司 | Wave absorbing material |
| CN107359422A (en) * | 2017-06-06 | 2017-11-17 | 常州安塔歌电子科技有限公司 | A kind of wideband dual polarized double-deck transmission array element |
| CN115101939A (en) * | 2022-06-13 | 2022-09-23 | 电子科技大学 | Broadband RCS (radar cross section) reduced antenna based on polarization rotation super surface |
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| WO2010036290A2 (en) * | 2008-06-19 | 2010-04-01 | Ravenbrick, Llc | Optical metapolarizer device |
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103717046A (en) * | 2012-09-29 | 2014-04-09 | 深圳光启创新技术有限公司 | Wave absorbing material |
| CN103717047A (en) * | 2012-09-29 | 2014-04-09 | 深圳光启创新技术有限公司 | Wave-absorbing material |
| CN103717044A (en) * | 2012-09-29 | 2014-04-09 | 深圳光启创新技术有限公司 | Wave absorbing material |
| CN103717046B (en) * | 2012-09-29 | 2017-12-22 | 深圳光启创新技术有限公司 | A kind of absorbing material |
| CN103717047B (en) * | 2012-09-29 | 2017-12-22 | 深圳光启创新技术有限公司 | A kind of absorbing material |
| CN103717044B (en) * | 2012-09-29 | 2018-05-22 | 深圳光启创新技术有限公司 | A kind of absorbing material |
| CN107359422A (en) * | 2017-06-06 | 2017-11-17 | 常州安塔歌电子科技有限公司 | A kind of wideband dual polarized double-deck transmission array element |
| CN107359422B (en) * | 2017-06-06 | 2020-03-03 | 常州安塔歌电子科技有限公司 | Broadband dual-polarization double-layer transmission array unit |
| CN115101939A (en) * | 2022-06-13 | 2022-09-23 | 电子科技大学 | Broadband RCS (radar cross section) reduced antenna based on polarization rotation super surface |
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|---|---|
| CN102480017B (en) | 2013-04-24 |
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