CN102480017B - Metamaterial prepared on basis of CMOS (complementary metal oxide semiconductor) process - Google Patents
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Abstract
An embodiment of the invention provides a metamaterial prepared on the basis of CMOS (complementary metal oxide semiconductor) process, which comprises a first dielectric layer, a first metal layer, a second dielectric layer, a second metal layer and a third dielectric layer. The first metal layer is positioned on the first dielectric layer and has a first micro-structure, the second dielectric layer is positioned on the first metal layer and is provided with a first through hole, materials filled in the first through hole are identical to materials of the first metal layer, the second metal layer is positioned on the second dielectric layer, is connected with the first metal layer by the first through hole, has a second micro-structure and is made of materials identical to those of the first metal layer, and the third dielectric layer is positioned on the second metal layer. Electromagnetic characteristics of the metamaterial are richer and more excellent.
Description
[technical field]
The present invention relates to technical field of composite materials, relate in particular to a kind of super material based on the preparation of CMOS technique.
[background technology]
Along with the fast development of the new and high technologies such as radar detection, satellite communication, Aero-Space, and the rise of the research field such as anti-electromagnetic interference, stealth technique, microwave dark room, the research of microwave absorbing material more and more is subject to people's attention.Because very marvellous galvanomagnetic effect can appear in super material, can be used for the fields such as absorbing material and stealth material, becomes the focus of absorbing material area research.Super material character and function mainly come from its inner structure, generally, realize its function by forming the metal level with micro structure array at medium substrate.
CMOS (Complementary Metal Oxide Semiconductor, CMOS (Complementary Metal Oxide Semiconductor)) technique is to realize the technique of controlled minimum dimension in the current semiconductor technology, the technique of 32nm is ripe gradually now, and the technique of smaller szie is developed.Simultaneously, the usage quantity of metal level can have been realized 8 layers metal connecting line now also in continuous increase in the CMOS technique.But the super material by the preparation of CMOS technique is not arranged yet.
[summary of the invention]
Technical problem to be solved by this invention provides a kind of super material based on CMOS technique preparation, can access the micro-structural controllability higher, also more meet the super material of designing requirement.
For solving the problems of the technologies described above, the embodiment of the invention provides a kind of super material based on the preparation of CMOS technique, it is characterized in that described super material comprises:
The first dielectric layer; Be positioned at the first metal layer above described the first dielectric layer, this first metal layer has the first micro-structural; Be positioned at the second dielectric layer above the described the first metal layer, this second dielectric layer has the first through hole, and the material of filling in this first through hole is identical with the material of the first metal layer; Be positioned at above described the second dielectric layer, by the second metal level that the first through hole is connected with described the first metal layer, this second metal level has the second micro-structural, and has identical material with described the first metal layer; And be positioned at the 3rd dielectric layer above described the second metal level.
Technique scheme has the following advantages: all have micro-structural on the first metal layer and the second metal level, changed the electromagnetic property of every layer of metal material; In addition, be connected by the through hole of having filled metal material between the first metal layer and the second metal level, the super material that adopts this mode to prepare is compared with the super material of single-layer metal preparation, have the electromagnetic property that is different from, have abundanter, more superior electromagnetic property.
[description of drawings]
In order to be illustrated more clearly in the technical scheme in the embodiment of the invention, the accompanying drawing of required use was done to introduce simply during the below will describe embodiment, apparently, accompanying drawing in the following describes only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is that the embodiment of the invention provides " worker " font micro-structural schematic diagram;
Fig. 2 is that the embodiment of the invention provides " ten " font micro-structural schematic diagram;
Fig. 3 is that the embodiment of the invention provides " king " font micro-structural schematic diagram;
Fig. 4 is that the embodiment of the invention provides
Font micro-structural schematic diagram;
Fig. 5 is the scalene triangle micro-structural schematic diagram that the embodiment of the invention provides;
Fig. 6 is a kind of metamaterial structure schematic diagram based on the preparation of CMOS technique that the invention process one provides;
Fig. 7 is a kind of metamaterial structure schematic diagram based on the preparation of CMOS technique that the invention process two provides;
Fig. 8 is a kind of metamaterial structure schematic diagram based on the preparation of CMOS technique that the invention process three provides;
Fig. 9 is a kind of metamaterial structure schematic diagram based on the preparation of CMOS technique that the invention process four provides.
[embodiment]
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making all other embodiment that obtain under the creative work prerequisite.
At first, the micro-structural that the embodiment of the invention is related to briefly introduces.
Micro-structural refers to and need to may see fine structure by microscope even Electronic Speculum, is often referred to diameter less than the structural units of 0.25mm.
Micro-structural can be axially symmetric structure, for example " worker " character form structure, " ten " character form structure or " king " character form structure.
Referring to Fig. 1, it is " worker " font micro-structural schematic diagram that the embodiment of the invention provides.
In concrete implementation process, also comprise all figures that obtained by " worker " evolution of font, such as " soil " font, " doing " font etc.
Referring to Fig. 2, it is " ten " font micro-structural schematic diagram that the embodiment of the invention provides.
In concrete implementation process, also comprise all figures that obtained by " ten " evolution of font, such as " T " font, fall " T " font, " X " font etc.
Referring to Fig. 3, it is " king " font micro-structural schematic diagram that the embodiment of the invention provides.
In concrete implementation process, also comprise all figures that obtained by " king " evolution of font, such as " Gui " font etc.
Micro-structural can be nonaxisymmetric structure also, comprising:
Font, scalene triangle, parallelogram or irregular closed curve.
Referring to Fig. 4, be that the embodiment of the invention provides
Font micro-structural schematic diagram.
In concrete implementation process, also comprise by
All figures that evolution of font obtains.
Referring to Fig. 5, it is the scalene triangle micro-structural schematic diagram that the embodiment of the invention provides.Parallelogram in the non-zhou duicheng tuxing and irregular closed curve are no longer drawn herein and are described in detail.
Embodiment one,
Referring to Fig. 6, be a kind of metamaterial structure schematic diagram based on the preparation of CMOS technique that the invention process one provides, this super material comprises:
The first dielectric layer 601; Be positioned at the first metal layer 602 above the first dielectric layer 601, this first metal layer 602 has the first micro-structural (not shown among Fig. 6); Be positioned at the second dielectric layer 603 above the first metal layer 602, this second dielectric layer 603 has the first through hole 604, and the material of filling in this first through hole 604 is identical with the material of the first metal layer 602; Be positioned at above the second dielectric layer 603, by the second metal level 605 that the first through hole 604 is connected with the first metal layer 602,605 layers on this second metal has the second micro-structural (not shown among Fig. 6), and has identical material with the first metal layer 602; And be positioned at the 3rd dielectric layer 606 above the second metal level 605.
Wherein, the first micro-structural and the second micro-structural all prepare by CMOS technique, for example, process in the first metal layer 602 preparations the first micro-structural is as follows: apply one deck photoresist at the first metal layer 602, according to default micro-structural photoresist is carried out photoetching, this default micro-structural can be any one micro-structural shown in Fig. 1 to Fig. 6; Adopt the mode of wet etching or dry etching to transfer on the first metal layer 602 in the figure that forms after the photoetching on the photoresist; Then remove the photoresist that is coated on the first metal layer 602, the first metal layer 602 that obtains having micro-structural.
Wherein, the first through hole 604 for example, applies one deck photoresists at the second dielectric layer 603 by the preparation of CMOS technique, according to the size and shape in default hole photoresist is carried out photoetching; The figure that forms after the photoetching on the photoresist is transferred on the second dielectric layer 603; Removal is coated in the photoresist on the second dielectric layer 603, thereby forms the first through hole 604 at the second dielectric layer 603.
Wherein, the structure of the first micro-structural and the second micro-structural can be identical, also can be different.For example the first micro-structural and the second micro-structural can be any one micro-structurals shown in Fig. 1 to Fig. 6; Perhaps, the first micro-structural is a kind of micro-structural shown in Fig. 1 to Fig. 6, and the second micro-structural is the another kind of micro-structural shown in Fig. 1 to Fig. 6.In concrete implementation process, carry out as requested flexible design.
Wherein, the thickness of the first dielectric layer 601 and the second dielectric layer 603 can be identical, the thickness of the 3rd dielectric layer 606 is equal to, or greater than the thickness of the first dielectric layer 601, the thickness of the 3rd dielectric layer 606 has been shown greater than the situation of the thickness of the first dielectric layer 601 among Fig. 6; The first dielectric layer 601, the second dielectric layer 603 and the 3rd dielectric layer 606 can have identical dielectric substance, for example, this electrolyte can be any one in pottery, macromolecular material, ferroelectric material, ferrite material and the ferromagnetic material; The first dielectric layer 601, the second dielectric layer 603 and the 3rd dielectric layer 606 also can have different dielectric substances.
In the present embodiment, all have micro-structural on the first metal layer 602 and the second metal level 605, changed the electromagnetic property of every layer of metal material; In addition, be connected by first through hole 604 of having filled metal material between the first metal layer 602 and the second metal level 605, the super material that adopts this mode to prepare is compared with the super material of single-layer metal preparation, has abundanter, more superior electromagnetic property.
Embodiment two,
Referring to Fig. 7, be a kind of metamaterial structure schematic diagram based on the preparation of CMOS technique that the invention process two provides, this super material comprises:
The first dielectric layer 701; Be positioned at the first metal layer 702 above the first dielectric layer 701, this first metal layer 702 has the first micro-structural (not shown among Fig. 7); Be positioned at the second dielectric layer 703 above the first metal layer 702, this second dielectric layer 703 has the first through hole 704, and the material of filling in this first through hole 704 is identical with the material of the first metal layer 702; Be positioned at above the second dielectric layer 703, by the second metal level 705 that the first through hole 704 is connected with the first metal layer 702,705 layers on this second metal has the second micro-structural (not shown among Fig. 7), and has identical material with the first metal layer 702; The 3rd dielectric layer 706, the three dielectric layers 706 that are positioned at above the second metal level 705 have the second through hole 707; Be positioned at above the 3rd dielectric layer 706, and have the 3rd micro-structural by the 3rd metal level 708, the three metal levels 708 that the second through hole 707 is connected with the second metal level 705; And be positioned at the 4th dielectric layer 709 above the 3rd metal level 708.
Wherein, the first micro-structural, the second micro-structural and the 3rd micro-structural all prepare by CMOS technique, for example, process in the first metal layer 702 preparations the first micro-structural is as follows: apply one deck photoresist at the first metal layer 702, according to default micro-structural photoresist is carried out photoetching, this default micro-structural can be any one micro-structural shown in Fig. 1 to Fig. 6; Adopt the mode of wet etching or dry etching to transfer on the first metal layer 702 in the figure that forms after the photoetching on the photoresist; Then remove the photoresist that is coated on the first metal layer 702, the first metal layer 702 that obtains having micro-structural.
Wherein, the first through hole 704 and the second through hole 707 for example, apply one deck photoresists at the second dielectric layer 703 all by CMOS technique preparation, according to the size and shape in default hole photoresist are carried out photoetching; Adopt the mode of wet etching or dry etching to transfer on the second dielectric layer 703 in the figure that forms after the photoetching on the photoresist; Removal is coated in the photoresist on the second dielectric layer 703, thereby forms the first through hole 704 at the second dielectric layer 703.
Wherein, the structure of the first micro-structural, the second micro-structural and the 3rd micro-structural can be identical, also can be different.For example the first micro-structural, the second micro-structural and the 3rd micro-structural can be any one micro-structurals shown in Fig. 1 to Fig. 6; Perhaps, the first micro-structural is a kind of micro-structural shown in Fig. 1 to Fig. 6, and the second micro-structural is that the another kind of micro-structural shown in Fig. 1 to Fig. 6, the 3rd micro-structural are another micro-structurals that is different from the first micro-structural and the second micro-structural shown in Fig. 1 to Fig. 6.In concrete implementation process, carry out as requested flexible design.
Wherein, the first dielectric layer 701, the second dielectric layer 703, the 3rd dielectric layer 706 and the 4th dielectric layer 709 can have identical dielectric substance, for example, this electrolyte can be any one in pottery, macromolecular material, ferroelectric material, ferrite material and the ferromagnetic material; The first dielectric layer 701, the second dielectric layer 703, the 3rd dielectric layer 706 and the 4th dielectric layer 709 also can have different dielectric substances.
Wherein, the second through hole 707 is filled with the material identical with the first metal layer 702; The material of the 3rd metal level 708 is identical with the material of the first metal layer 702.
In the present embodiment, all have micro-structural on the first metal layer 702, the second metal level 705 and the 3rd metal level 708, changed the electromagnetic property of every layer of metal material; In addition, be connected by first through hole 704 of having filled metal material between the first metal layer 702 and the second metal level 705, be connected by second through hole 707 of having filled metal material between the second metal level 705 and the 3rd metal level 708, the super material that adopts this mode to prepare, compare with the super material of single-layer metal preparation, have abundanter, more superior electromagnetic property.
Embodiment three,
Referring to Fig. 8, be a kind of metamaterial structure schematic diagram based on the preparation of CMOS technique that the invention process three provides, this super material comprises:
The first dielectric layer 801; Be positioned at the first metal layer 802 above the first dielectric layer 801, this first metal layer 802 has the first micro-structural (not shown among Fig. 8); Be positioned at the second dielectric layer 803 above the first metal layer 802, this second dielectric layer 803 has the first through hole 804, and the material of filling in this first through hole 804 is identical with the material of the first metal layer 802; Be positioned at above the second dielectric layer 803, by the second metal level 805 that the first through hole 804 is connected with the first metal layer 802,805 layers on this second metal has the second micro-structural (not shown among Fig. 8), and has identical material with the first metal layer 802; Be positioned at the 3rd dielectric layer 806 above the second metal level 805; And be positioned at the 4th dielectric layer 807 below the first dielectric layer 801.
Wherein, the first micro-structural and the second micro-structural all prepare by CMOS technique, for example, process in the first metal layer 802 preparations the first micro-structural is as follows: apply one deck photoresist at the first metal layer 802, according to default micro-structural photoresist is carried out photoetching, this default micro-structural can be any one micro-structural shown in Fig. 1 to Fig. 6; Adopt the mode of wet etching or dry etching to transfer on the first metal layer 802 in the figure that forms after the photoetching on the photoresist; Then remove the photoresist that is coated on the first metal layer 802, the first metal layer 802 that obtains having micro-structural.
Wherein, the first through hole 804 for example, applies one deck photoresists at the second dielectric layer 803 by the preparation of CMOS technique, according to the size and shape in default hole photoresist is carried out photoetching; The figure that forms after the photoetching on the photoresist is transferred on the second dielectric layer 803; Removal is coated in the photoresist on the second dielectric layer 803, thereby forms the first through hole 804 at the second dielectric layer 803.
Wherein, the structure of the first micro-structural and the second micro-structural can be identical, also can be different.For example the first micro-structural and the second micro-structural can be any one micro-structurals shown in Fig. 1 to Fig. 6; Perhaps, the first micro-structural is a kind of micro-structural shown in Fig. 1 to Fig. 6, and the second micro-structural is the another kind of micro-structural shown in Fig. 1 to Fig. 6.In concrete implementation process, carry out as requested flexible design.
Wherein, the first dielectric layer 801, the second dielectric layer 803, the 3rd dielectric layer 806 and the 4th dielectric layer 807 can have identical dielectric substance, for example, this electrolyte can be any one in pottery, macromolecular material, ferroelectric material, ferrite material and the ferromagnetic material; The first dielectric layer 801, the second dielectric layer 803, the 3rd dielectric layer 806 and the 4th dielectric layer 807 also can have different dielectric substances, generally speaking,, the 4th dielectric layer 807 has identical material with the first dielectric layer 801.
In the present embodiment, all have micro-structural on the first metal layer 802 and the second metal level 805, changed the electromagnetic property of every layer of metal material; In addition, be connected by first through hole 804 of having filled metal material between the first metal layer 802 and the second metal level 805, the super material that adopts this mode to prepare is compared with the super material of single-layer metal preparation, has abundanter, more superior electromagnetic property.
Embodiment four,
Referring to Fig. 9, be a kind of metamaterial structure schematic diagram based on the preparation of CMOS technique that the invention process four provides, this super material comprises:
The first dielectric layer 901; Be positioned at the first metal layer 902 above the first dielectric layer 901, this first metal layer 902 has the first micro-structural (not shown among Fig. 9); Be positioned at the second dielectric layer 903 above the first metal layer 902, it is identical with the material of the first metal layer 902 that this second dielectric layer 903 is built-in with the material of filling in the first through hole 904, the second through hole 905, the first through holes 904 and the second through hole 905; Be positioned at above the second dielectric layer 903, by the second metal level 906 that the first through hole 904 is connected with the first metal layer 902, this second metal level 906 has the second micro-structural (not shown among Fig. 9), and has identical material with the first metal layer 902; Be built in the second dielectric layer 903, one end is connected with the first metal layer 902 by the first through hole 904, the 3rd metal level 907 that the other end is connected with the second metal level 906 by the second through hole 905, the material of the 3rd metal level 907 is identical with the material of the first metal layer 902, and length is less than the length of the first metal layer 902; And be positioned at the 3rd dielectric layer 908 above the second metal level 906.
Wherein, the first micro-structural and the second micro-structural all prepare by CMOS technique, for example, process in the first metal layer 902 preparations the first micro-structural is as follows: apply one deck photoresist at the first metal layer 902, according to default micro-structural photoresist is carried out photoetching, this default micro-structural can be any one micro-structural shown in Fig. 1 to Fig. 6; Adopt the mode of wet etching or dry etching to transfer on the first metal layer 902 in the figure that forms after the photoetching on the photoresist; Then remove the photoresist that is coated on the first metal layer 902, the first metal layer 902 that obtains having micro-structural.
Wherein, the first through hole 904 and the second through hole 905 for example, apply one deck photoresists at the second dielectric layer 903 by the preparation of CMOS technique, according to the size and shape in default hole photoresist are carried out photoetching; The figure that forms after the photoetching on the photoresist is transferred on the second dielectric layer 903; Removal is coated in the photoresist on the second dielectric layer 903, thereby forms the second through hole 905 at the second dielectric layer 903.
Wherein, the structure of the first micro-structural and the second micro-structural can be identical, also can be different.For example the first micro-structural and the second micro-structural can be any one micro-structurals shown in Fig. 1 to Fig. 6; Perhaps, the first micro-structural is a kind of micro-structural shown in Fig. 1 to Fig. 6, and the second micro-structural is the another kind of micro-structural shown in Fig. 1 to Fig. 6.In concrete implementation process, carry out as requested flexible design.
Wherein, the first dielectric layer 901 is different from the thickness of the second dielectric layer 903, and the thickness of the first dielectric layer 901 can be identical with the 3rd dielectric layer 908; The first dielectric layer 901, the second dielectric layer 903 and the 3rd dielectric layer 908 can have identical dielectric substance, for example, this electrolyte can be any one in pottery, macromolecular material, ferroelectric material, ferrite material and the ferromagnetic material; The first dielectric layer 901, the second dielectric layer 903 and the 3rd dielectric layer 908 also can have different dielectric substances.
In the present embodiment, all have micro-structural on the first metal layer 902 and the second metal level 906, changed the electromagnetic property of every layer of metal material; In addition, also have the 3rd metal level 907 between the first metal layer 902 and the second metal level 906, connect the super material that adopts this mode to prepare between the metal level by through hole, compare with the super material of single-layer metal preparation, have abundanter, more superior electromagnetic property.
Above embodiment is described in detail the super material with different metal level, in concrete implementation process, is not limited to the metal level, and is identical with the metamaterial structure of describing in the embodiment of the invention,
More than the embodiment of the invention is described in detail, used specific case herein principle of the present invention and execution mode set forth, the explanation of above embodiment just is used for helping to understand method of the present invention and core concept thereof; Simultaneously, for one of ordinary skill in the art, according to thought of the present invention, all will change in specific embodiments and applications, in sum, this description should not be construed as limitation of the present invention.
Claims (9)
1. super material based on CMOS technique preparation is characterized in that described super material comprises:
The first dielectric layer; Be positioned at the first metal layer above described the first dielectric layer, this first metal layer has the first micro-structural; Be positioned at the second dielectric layer above the described the first metal layer, this second dielectric layer has the first through hole, and the material of filling in this first through hole is identical with the material of the first metal layer; Be positioned at above described the second dielectric layer, by the second metal level that the first through hole is connected with described the first metal layer, this second metal level has the second micro-structural, and has identical material with described the first metal layer; Be positioned at the 3rd dielectric layer above described the second metal level; Be positioned at the 4th dielectric layer below described the first dielectric layer, the 4th dielectric layer has identical material or different materials from described the first dielectric layer.
2. super material according to claim 1 is characterized in that, described the first micro-structural is identical with the structure of described the second micro-structural.
3. super material according to claim 2 is characterized in that, described micro-structural is axially symmetric structure, comprising: " worker " character form structure, " ten " character form structure or " king " character form structure.
4. super material according to claim 2 is characterized in that, described micro-structural is nonaxisymmetric structure, comprises: “ Swastika " font, scalene triangle, parallelogram or irregular closed curve.
5. super material according to claim 1 is characterized in that, described the first micro-structural is different from described the second micro-structural.
6. super material according to claim 5 is characterized in that, described the first micro-structural is axially symmetric structure, and described the second micro-structural is nonaxisymmetric structure; Perhaps,
Described the first micro-structural is nonaxisymmetric structure, and described the second micro-structural is axially symmetric structure.
7. super material according to claim 1 is characterized in that, described the first dielectric layer, described the second dielectric layer and described the 3rd dielectric layer have identical dielectric substance; Perhaps different dielectric substance.
8. super material based on CMOS technique preparation is characterized in that described super material comprises:
The first dielectric layer; Be positioned at the first metal layer above described the first dielectric layer, this first metal layer has the first micro-structural; Be positioned at the second dielectric layer above the described the first metal layer, this second dielectric layer has the first through hole, and the material of filling in this first through hole is identical with the material of the first metal layer; Be positioned at above described the second dielectric layer, by the second metal level that the first through hole is connected with described the first metal layer, this second metal level has the second micro-structural, and has identical material with described the first metal layer; Be positioned at the 3rd dielectric layer above described the second metal level; The 3rd dielectric layer has the second through hole; Be positioned at above described the 3rd dielectric layer, and pass through the 3rd metal level that described the second through hole is connected with described the second metal level, the 3rd metal level has the 3rd micro-structural; And, be positioned at the 4th dielectric layer above described the 3rd metal level;
Wherein: described the second filling through hole has the material identical with described the first metal layer; The material of described the 3rd metal level is identical with the material of described the first metal layer.
9. super material based on CMOS technique preparation is characterized in that described super material comprises:
The first dielectric layer; Be positioned at the first metal layer above described the first dielectric layer, this first metal layer has the first micro-structural; Be positioned at the second dielectric layer above the described the first metal layer, this second dielectric layer has the first through hole, and the material of filling in this first through hole is identical with the material of the first metal layer; Be positioned at above described the second dielectric layer, by the second metal level that the first through hole is connected with described the first metal layer, this second metal level has the second micro-structural, and has identical material with described the first metal layer; Be positioned at the 3rd dielectric layer above described the second metal level; Be built-in with the second through hole and the 3rd metal level in described the second dielectric layer; One end of described the 3rd metal level is connected with described the first metal layer by described the first through hole, and the other end is connected with described the second metal level by described the second through hole;
Wherein, described the second filling through hole has the material identical with described the first metal layer; The material of described the 3rd metal level is identical with the material of described the first metal layer; The length of described the 3rd metal level is less than the length of described the first metal layer.
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| CN103717046B (en) * | 2012-09-29 | 2017-12-22 | 深圳光启创新技术有限公司 | A kind of absorbing material |
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