CN102457251A - Method and device for realizing universal digital filter - Google Patents

Method and device for realizing universal digital filter Download PDF

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CN102457251A
CN102457251A CN2010105268282A CN201010526828A CN102457251A CN 102457251 A CN102457251 A CN 102457251A CN 2010105268282 A CN2010105268282 A CN 2010105268282A CN 201010526828 A CN201010526828 A CN 201010526828A CN 102457251 A CN102457251 A CN 102457251A
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unit
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CN102457251B (en
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吴哲
曾献君
郭继经
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Shenzhen ZTE Microelectronics Technology Co Ltd
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ZTE Corp
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Abstract

The invention discloses a method and device for realizing a universal digital filter. The device comprises an instruction control module, a data providing module and a computing module, wherein the data providing module and the computing module are connected with the instruction control module; the instruction control module is used for controlling the data providing module to provide filter coefficients and sampling data for the computing module, and also for controlling the computing module to compute the received filter coefficients and sampling data; the data providing module is used for providing the filter coefficients and sampling data for the computing module according to the control of the instruction control module; and the computing module is used for multiplying and adding up the filter coefficients and the sampling data provided by the data providing module according to the control of the instruction control module, and further outputting a filter result. According to the invention, by adopting the shared data providing module and computing module, the instruction control can be carried out on the two modules, the computing module can accomplish multiplication and addition uniformly, therefore filters of different types can be realized, and a universal function is realized.

Description

A kind of method and device of realizing the general digital filter
Technical field
The present invention relates to digital filter apparatus in the multi-module mobile terminal, relate in particular to a kind of method and device of realizing the general digital filter.
Background technology
In the digital baseband technology of the technology that has mobile communication now, digital filtering technique is a kind of technology of outbalance.Following formula 1 to formula 3 representes to have limit for length's unit impulse response (Finite Impulse Response is called for short FIR) three kinds of filtering types of filter respectively, and formula 1 is the output filter with same frequency, and formula 2 is a decimation filter, and formula 3 is an interpolation filtering.
Figure 815483DEST_PATH_IMAGE001
formula 1
Figure 700262DEST_PATH_IMAGE002
formula 2
Figure 794993DEST_PATH_IMAGE003
formula 3
Following formula 4 is endless unit impulse response (Infinite Impulse Response is called for short IIR) filter.
Figure 993893DEST_PATH_IMAGE004
formula 4
Can find out that from above-mentioned formula the digital filtering process mainly realizes through the multiplication operations of filter factor and sampled data and the operation that adds up.
Relate generally to the delay operation that sampled data is carried out in the FIR filter, sampled data and filter factor take advantage of operation, and to the add operation of all products etc.Addition and multiplication all are the more operations of resource occupation in circuit is realized, and the time delay of addition and multiplication function unit is also bigger.
In the multi mode terminal terminal,,, be difficult to these filters are carried out resource-sharing so the exponent number of filter coefficient and filter is all inequality because of the difference of different mode algorithm filter.Because add operation and multiplying are than consumes resources, so the data filtering function can take more calculation resources in the portable terminal in the multi-module mobile terminal in the filtering.In addition, the circuit time delay of adder and multiplier itself is also bigger, so the multiplexing efficient between the different filters is lower under with a kind of pattern.
General and the abundant multiplex filter resource that how to realize dissimilar filters is the technical issues that need to address.
Summary of the invention
The technical problem that the present invention will solve provides a kind of method and device of realizing the general digital filter, realizes the general utility functions of dissimilar filters, improves filtration efficiency.
In order to solve the problems of the technologies described above, the invention provides a kind of device of realizing the general digital filter, comprise that instruction control module and the data that link to each other with said instruction control module provide module and computing module; Data provide the output of module to link to each other with the input of computing module; Said instruction control module, being used to control said data provides module to said computing module filter factor and sampled data to be provided, and also is used to control said computing module the filter factor and the sampled data that receive are carried out arithmetic operation; Said data provide module, and being used for provides filter factor and sampled data according to the control of said instruction control module to said computing module; Said computing module is used for to said data the filter factor that module provides being provided and sampled data is carried out multiplication and the operation that adds up, the output filtered according to the control of said instruction control module.
Further, said apparatus can also have following characteristics:
Said device also comprises filter factor input module and the sampled data input module that output and said data provide the input of module to link to each other; Said filter factor input module is used for the filter factor that provides module stored filter coefficients to be provided or to receive in real time to said data; Said sampled data input module is used for sampled data that provides module to provide to have stored to said data or the sampled data that receives in real time.
Further, said apparatus can also have following characteristics:
Said data provide module to comprise that a plurality of data that link to each other successively provide the unit, and said data provide the unit to comprise storing sub-units and the delayer that is used for sampled data is delayed time; Provide the unit to constitute a plurality of data respectively the data of continuous same number submodule is provided; Said instruction control module, being used for that the filtering filter factor is inputed to each data corresponding with filtering mode successively by the exponent number order provides the unit, sampled data is inputed to data provide that first data provide the unit in the module; Said data provide the unit, are used for the filter factor that receives and sampled data as data output; And sampled data carries out delay operation, the sampled data after the time-delay is input to next data the unit is provided.
Further, said apparatus can also have following characteristics:
Said data provide module also to comprise a plurality of selectors, and same selector provides with different pieces of information that the data of same position provide the unit all to link to each other in the submodule; Said data provide each selector in the module, are used for selecting to provide to the data that said computing module is exported same data and provide submodule according to the control of said instruction control module the data of unit output.
Further, said apparatus can also have following characteristics:
Said computing module comprises a plurality of operator modules, also comprises the adder that links to each other with each operator module; Said data provide module, and being used for provides the unit as data the unit group to be provided respectively a continuous X data according to the control of instruction control module successively, and X the data of output that data provided the unit group are to input to the operator module successively correspondingly; Said operator module is used for X data receiving carrying out multiply operation respectively, and after the result of multiply operation added up, the result who adds up is inputed to adder; Said adder is used for the data of input are carried out getting filtered after the add operation.
Further, said apparatus can also have following characteristics:
The value of X is 2,4 or 8.
Further, said apparatus can also have following characteristics:
When the number that each data provides the data that comprise in the submodule that the unit is provided was L, the number of the operator module that comprises in the said computing module was the ratio of L and X, during the aliquant X of L, the number of operator module be L and X the merchant and 1 with.
In order to solve the problems of the technologies described above; The present invention also provides a kind of method that realizes the general digital filter; Comprise: provide module filter factor and sampled data to be provided by the instruction control module control data to computing module, by said instruction control module control that said computing module provides the filter factor that module provides to said data and sampled data is carried out multiplication and the operation that adds up after obtain filtered.
Further, said method can also have following characteristics:
Provide in said data a plurality of data that link to each other successively to be set in the module unit is provided, provide in each data storing sub-units and the delayer that is used for sampled data is delayed time are set in the unit; Provide the unit to constitute a plurality of data respectively the data of continuous same number submodule is provided; By the control of said instruction control module filter factor in the filtering is inputed to each data corresponding with filtering mode successively by the exponent number order unit is provided, sampled data is inputed to data provide that first data provide the unit in the module; Each data provides the unit that sampled data is carried out sampled data after delay operation will be delayed time and is input to next data the unit is provided, each data provide the unit with the filter factor that receives and sampled data as data to exporting said arithmetic element to.
Further, said method can also have following characteristics:
The accumulator that a plurality of operator modules is set and links to each other at said computing module with each operator module; Said data provide module to provide the unit as data the unit group to be provided respectively a continuous X data according to the control of instruction control module successively to a filtering, and X the data of output that data provided the unit group are to input to the operator module successively correspondingly; Said operator module to carrying out multiply operation respectively, and after the result of multiply operation added up, inputs to adder with the result who adds up to X data receiving; Said adder carries out the data of input to get filtered after the add operation.
Adopt the data of sharing that module and computing module are provided among the present invention, these two modules are carried out commands for controlling, make the unified multiply-add operation of accomplishing of computing module; Can realize dissimilar filters; Realize general utility functions, can in realize at the multi mode terminal terminal, satisfy multiplexing between the different mode, reach the fully multiplexing of filter multiplicaton addition unit every kind of mode internal simultaneously; The present invention can also reduce circuit delay, improves arithmetic speed.
Description of drawings
Fig. 1 is a structural representation of realizing the device of general digital filter among the embodiment;
Fig. 2 is the structural representation that data provide module among the embodiment;
Fig. 3 is the structural representation of computing module among the embodiment.
Embodiment
As shown in Figure 1, realize in the multi-module mobile terminal that the device of general digital filter comprises that the data that instruction control module and and instruction control module link to each other provide module and computing module; Data provide the output of module to link to each other with the input of computing module.This device also comprises filter factor input module and the sampled data input module that output and data provide the input of module to link to each other.
Instruction control module is used for control data provides module to computing module filter factor and sampled data to be provided, and also is used to control computing module the filter factor and the sampled data that receive are carried out arithmetic operation.
Data provide module to be used for to computing module filter factor and sampled data being provided according to the control of instruction control module.
Computing module is used for to data the filter factor that module provides being provided and sampled data is carried out multiplication and the operation that adds up, the output filtered according to the control of instruction control module.
In this device, the filter factor input module is used for the filter factor that provides module stored filter coefficients to be provided or to receive in real time to data.The sampled data input module is used for sampled data that provides module to provide to have stored to data or the sampled data that receives in real time.
In this device, can comprise command memory in the instruction control module, be used to store the control command of universal filter, can also comprise decoder in the instruction control module, be used to accomplish decoded operation control command.Be used for control data after operational order of storing in the instruction control module extraction memory and the decoding module and computing module are provided.
Said data provide module to comprise that a plurality of data that link to each other successively provide the unit, and said data provide the unit to comprise storing sub-units and the delayer that is used for sampled data is delayed time; Provide the unit to constitute a plurality of data respectively the data of continuous same number submodule is provided;
Said instruction control module, being used for that the filtering filter factor is inputed to each data corresponding with filtering mode successively by the exponent number order provides the unit, sampled data is inputed to data provide that first data provide the unit in the module.Data provide the unit to be used for the filter factor that receives and sampled data as data output; And sampled data carries out delay operation, the sampled data after the time-delay is input to next data the unit is provided.
Wherein, can also comprise the subelement and the subelement that is used for the store sample data that is used to store filter factor in the storing sub-units.
Data provide module also to comprise a plurality of selectors, and same selector provides with different pieces of information that the data of same position provide the unit all to link to each other in the submodule.Data provide each selector in the module to be used for selecting to provide to the data that said computing module is exported same data and provide submodule according to the control of said instruction control module the data of unit output.
Be the structure that the example declarative data provides module with a kind of typical application situation below.As shown in Figure 2, data provide and comprise in the module that N data provide submodule, and each data provides and comprises in the submodule that L data provide the unit.Data provide in the module LxN data to provide the unit to link to each other successively.When filter factor is less than L; Instruction control module inputs to same data with filter factor in the filtering submodule is provided; And filter factor is imported so far data successively by the exponent number order provide that each data provides the unit in the submodule; With formula 1 is example; Instruction control module inputs to data with filter factor h (0) in this filtering provides first data of submodule 1 that the unit is provided, and filter factor h (1) is inputed to data provides second data of submodule 1 that the unit is provided, and filter factor h (N-1) is inputed to data provides N-1 data of submodule 1 that the unit is provided.Instruction control module is imported data with sampled data and is provided that first data provide the unit in the submodule 1; First data provide the sampled data after the unit will postpone through delayer to input to second data the unit are provided; With the current time is that n is an example; First data provide that sampled data is x (n) in the unit, and second data provide that sampled data is x (n-1) in the unit, and the m data provide that sampled data is x (n-m) in the unit.Data shown in Figure 2 provide module to comprise L selector, and same selector provides with different pieces of information that the data of same position provide the unit all to link to each other in the submodule.The equal dateout of instruction control module each selector of indication provides filter factor and sampled data in the submodule 1.
Data shown in Figure 2 provide module can realize the filtering mode shown in the formula 1.When being the input of instruction control module control filter factor,, filter factor being inputed to data successively by the exponent number order provide that each data provides the unit in the module according to the mode shown in the formula 1.In other embodiments, during the input of instruction control module control filter factor, according to formula 2 and the mode shown in the formula 3 not the filter factor of same order input to the data corresponding the place, unit be provided with filtering mode.With formula 2 is example, h (1) is inputed to the data that x (Mm-1) locates the unit is provided.With formula 3 is example, and h (1) is inputed to x, and (data of (m-1)/L) locate provide the unit.
Computing module comprises a plurality of operator modules, also comprises the adder that links to each other with each operator module.
Data provide module to be used for providing the unit as data the unit group to be provided respectively a continuous X data successively according to the control of instruction control module, and X the data of output that data provided the unit group are to input to the operator module successively correspondingly.The value of X is 2,4 or 8.The operator module is used for X data receiving carrying out multiply operation respectively, and after the result of multiply operation added up, the result who adds up is inputed to adder.Adder is used for the data of input are carried out getting filtered after the add operation.
Be the structure of example explanation computing module below with a kind of typical application situation.As shown in Figure 3; Computing module comprises L/2 operator module; X value 2, the control of instruction control module provide the unit as data the unit group to be provided respectively continuous 2 data successively, and 2 data of output that data provided the unit group are to input to the operator module successively correspondingly; Provide unit 1 and data to provide the data of unit 2 outputs to input to operator module 1 data; Provide unit 3 and data to provide the data of unit 4 outputs to input to operator module 2 data, and the like, provide unit L-1 and data to provide the data of unit L output to input to operator module L/2 data.For example; 1 pair of data of operator module provide h in the unit 1 (0) and x (m) to carry out multiply operation; Provide h in the unit 2 (1) and x (m-1) to carry out multiply operation to data; And inputing to adder after the result of two multiply operations carried out add operation, adder adds up the back as filtered to the data of each operator unit output.
Wherein, when the number that each data provides the data that comprise in the submodule that the unit is provided was L, the number of the operator module that comprises in the said computing module was the ratio of L and X, during the aliquant X of L, the number of operator module be L and X the merchant and 1 with.
Arithmetic element has been used pipeline processing mode in this device, can improve processing speed.
Specific embodiment
With formula 1 is example; Filter factor has 24; Instruction control module provides the data that comprise in the module to provide in the unit per 8 to be divided into data submodule is provided data in the general filtering of the present invention; When carrying out the data input; H (0) is inputed to data to h (7) provides the data of submodule vr0 to provide unit 1 to data to provide in the unit 8, and h (8) is inputed to data to h (15) provides the data of submodule vr1 to provide unit 1 to data to provide in the unit 8, and h (16) is inputed to data to h (23) provides the data of submodule vr2 to provide unit 1 to data to provide in the unit 8.Instruction control module sends to give an order to computing module:
VMAC?vr0;
VMAC?vr1;
VMAC?vr2;
Comprise 12 operator modules in the computing module, the 1st operator module input data provide unit 1 and data that the filter factor and the sampled data of unit 2 outputs are provided; The 2nd operator module input data provide unit 3 and data that the filter factor and the sampled data of unit 4 outputs are provided; The rest may be inferred.
Computing module provides the data among the submodule vr0 to carry out the operation that adds up of multiplication and multiplication result data after receiving article one instruction; After receiving second instruction, provide the data among the submodule vr1 to carry out the operation that adds up of multiplication and multiplication result data, and add up with first result that instruct; After receiving the 3rd instruction, provide the data among the submodule vr2 to carry out the operation that adds up of multiplication and multiplication result data, and with second the instruction the result add up; Obtain filtered.
This universal filter device can satisfy the use of different filtering modes, thereby realizes multiplexing between the different filter patterns; Secondly because adopted flowing structure, can realize high frequency operation and fully realize the multiplexing of arithmetic element, can further reduce cost; This universal filter not only can be used for the realization of mobile phone multimode terminal in addition, can also be used in other scenes.
Certainly; The present invention also can have other various embodiments; Under the situation that does not deviate from spirit of the present invention and essence thereof; Those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection range of the appended claim of the present invention.
One of ordinary skill in the art will appreciate that all or part of step in the said method can instruct related hardware to accomplish through program, said program can be stored in the computer-readable recording medium, like read-only memory, disk or CD etc.Alternatively, all or part of step of the foregoing description also can use one or more integrated circuits to realize.Correspondingly, each the module/unit in the foregoing description can adopt the form of hardware to realize, also can adopt the form of software function module to realize.The present invention is not restricted to the combination of the hardware and software of any particular form.

Claims (10)

1. a device of realizing the general digital filter is characterized in that,
Comprise that instruction control module and the data that link to each other with said instruction control module provide module and computing module; Data provide the output of module to link to each other with the input of computing module;
Said instruction control module, being used to control said data provides module to said computing module filter factor and sampled data to be provided, and also is used to control said computing module the filter factor and the sampled data that receive are carried out arithmetic operation;
Said data provide module, and being used for provides filter factor and sampled data according to the control of said instruction control module to said computing module;
Said computing module is used for to said data the filter factor that module provides being provided and sampled data is carried out multiplication and the operation that adds up, the output filtered according to the control of said instruction control module.
2. device as claimed in claim 1 is characterized in that,
Said device also comprises filter factor input module and the sampled data input module that output and said data provide the input of module to link to each other;
Said filter factor input module is used for the filter factor that provides module stored filter coefficients to be provided or to receive in real time to said data;
Said sampled data input module is used for sampled data that provides module to provide to have stored to said data or the sampled data that receives in real time.
3. device as claimed in claim 1 is characterized in that,
Said data provide module to comprise that a plurality of data that link to each other successively provide the unit, and said data provide the unit to comprise storing sub-units and the delayer that is used for sampled data is delayed time; Provide the unit to constitute a plurality of data respectively the data of continuous same number submodule is provided;
Said instruction control module, being used for that the filtering filter factor is inputed to each data corresponding with filtering mode successively by the exponent number order provides the unit, sampled data is inputed to data provide that first data provide the unit in the module;
Said data provide the unit, are used for the filter factor that receives and sampled data as data output; And sampled data carries out delay operation, the sampled data after the time-delay is input to next data the unit is provided.
4. device as claimed in claim 3 is characterized in that,
Said data provide module also to comprise a plurality of selectors, and same selector provides with different pieces of information that the data of same position provide the unit all to link to each other in the submodule;
Said data provide each selector in the module, are used for selecting to provide to the data that said computing module is exported same data and provide submodule according to the control of said instruction control module the data of unit output.
5. device as claimed in claim 3 is characterized in that,
Said computing module comprises a plurality of operator modules, also comprises the adder that links to each other with each operator module;
Said data provide module, and being used for provides the unit as data the unit group to be provided respectively a continuous X data according to the control of instruction control module successively, and X the data of output that data provided the unit group are to input to the operator module successively correspondingly;
Said operator module is used for X data receiving carrying out multiply operation respectively, and after the result of multiply operation added up, the result who adds up is inputed to adder;
Said adder is used for the data of input are carried out getting filtered after the add operation.
6. device as claimed in claim 5 is characterized in that,
The value of X is 2,4 or 8.
7. device as claimed in claim 5 is characterized in that,
When the number that each data provides the data that comprise in the submodule that the unit is provided was L, the number of the operator module that comprises in the said computing module was the ratio of L and X, during the aliquant X of L, the number of operator module be L and X the merchant and 1 with.
8. a method that realizes the general digital filter is characterized in that,
Provide module filter factor and sampled data to be provided by the instruction control module control data to computing module, by said instruction control module control that said computing module provides the filter factor that module provides to said data and sampled data is carried out multiplication and the operation that adds up after obtain filtered.
9. method as claimed in claim 8 is characterized in that,
Provide in said data a plurality of data that link to each other successively to be set in the module unit is provided, provide in each data storing sub-units and the delayer that is used for sampled data is delayed time are set in the unit; Provide the unit to constitute a plurality of data respectively the data of continuous same number submodule is provided;
By the control of said instruction control module filter factor in the filtering is inputed to each data corresponding with filtering mode successively by the exponent number order unit is provided, sampled data is inputed to data provide that first data provide the unit in the module; Each data provides the unit that sampled data is carried out sampled data after delay operation will be delayed time and is input to next data the unit is provided, each data provide the unit with the filter factor that receives and sampled data as data to exporting said arithmetic element to.
10. method as claimed in claim 9 is characterized in that,
The accumulator that a plurality of operator modules is set and links to each other at said computing module with each operator module; Said data provide module to provide the unit as data the unit group to be provided respectively a continuous X data according to the control of instruction control module successively to a filtering, and X the data of output that data provided the unit group are to input to the operator module successively correspondingly; Said operator module to carrying out multiply operation respectively, and after the result of multiply operation added up, inputs to adder with the result who adds up to X data receiving; Said adder carries out the data of input to get filtered after the add operation.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104539263A (en) * 2014-12-25 2015-04-22 电子科技大学 Reconfigurable low-power dissipation digital FIR filter
CN105099395A (en) * 2014-05-19 2015-11-25 深圳市欧克蓝科技有限公司 Configurable digital filter device
CN105720944A (en) * 2016-01-22 2016-06-29 深圳市同创国芯电子有限公司 Universal FIR filter and configuration method thereof

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030177157A1 (en) * 2002-03-12 2003-09-18 Kenjiro Matoba Digital filter
CN1452323A (en) * 2002-04-19 2003-10-29 松下电器产业株式会社 Finite pulse response filter, communication transmitting apparatus and communication receiving apparatus
CN1710809A (en) * 2005-06-30 2005-12-21 天津通广三星电子有限公司 Series overlap frequency-domain digital filter array
CN1992517A (en) * 2005-12-26 2007-07-04 中兴通讯股份有限公司 Programmable interpolated filter device and realizing method therefor
US20080315940A1 (en) * 2007-06-19 2008-12-25 Nec Electronics Corporation Mixing device for plural digital data having different sampling rates

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030177157A1 (en) * 2002-03-12 2003-09-18 Kenjiro Matoba Digital filter
CN1452323A (en) * 2002-04-19 2003-10-29 松下电器产业株式会社 Finite pulse response filter, communication transmitting apparatus and communication receiving apparatus
CN1710809A (en) * 2005-06-30 2005-12-21 天津通广三星电子有限公司 Series overlap frequency-domain digital filter array
CN1992517A (en) * 2005-12-26 2007-07-04 中兴通讯股份有限公司 Programmable interpolated filter device and realizing method therefor
US20080315940A1 (en) * 2007-06-19 2008-12-25 Nec Electronics Corporation Mixing device for plural digital data having different sampling rates
JP2009004848A (en) * 2007-06-19 2009-01-08 Nec Electronics Corp Mixing device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105099395A (en) * 2014-05-19 2015-11-25 深圳市欧克蓝科技有限公司 Configurable digital filter device
CN104539263A (en) * 2014-12-25 2015-04-22 电子科技大学 Reconfigurable low-power dissipation digital FIR filter
CN104539263B (en) * 2014-12-25 2017-04-12 电子科技大学 Reconfigurable low-power dissipation digital FIR filter
CN105720944A (en) * 2016-01-22 2016-06-29 深圳市同创国芯电子有限公司 Universal FIR filter and configuration method thereof
CN105720944B (en) * 2016-01-22 2019-04-12 深圳市紫光同创电子有限公司 General FIR filter and its configuration method

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