CN100574098C - Interpolation CIC wave filter and implementation method based on programmable logic device - Google Patents
Interpolation CIC wave filter and implementation method based on programmable logic device Download PDFInfo
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Abstract
The present invention relates to interpolation CIC wave filter and implementation method based on programmable logic device.This method comprises: by an interpolating module data-signal of importing is carried out interpolation; Data-signal after the interpolation is imported a bank of filters; The data-signal of described bank of filters after to described interpolation handled, and the data-signal of output after handling.Interpolation CIC wave filter and implementation method based on programmable logic device of the present invention, compared with prior art, owing to optimized the project organization of cic filter, the inputoutput data bit wide on every rank is consistent, so natural cascade is got off, and has avoided needing in the design to carry out the problem of bit wide expansion, a large amount of register resources that take in the design of saving, also make simultaneously the easier modularization of cic filter, only need simply repeat to call the expansion that to finish exponent number.
Description
Technical field
The present invention relates to many rate transition of Digital Signal Processing, the rate transition of DDC (Digital Down Converter, Digital Down Convert)/DUC (Digital Up Converter, Digital Up Convert) during particularly baseband digital signal is handled.
Background technology
Along with the speed of Digital Signal Processing is more and more faster, the application of many rate transition of Digital Signal Processing is more and more general, and especially the application in software radio is more extensive.Software radio based on one of theory be bandpass sample theory, sample rate is high more good more, helps the simplification of system.When sampling for a very high radiofrequency signal of frequency in addition, improve the quantification signal to noise ratio that sample rate helps improving sampled signal, it is necessary to demodulating end to signal under the sampling, cic filter is exactly one of device commonly used that carries out many rate transition.
In the digital baseband processing section, earlier signal to be carried out Digital Up Convert (DUC) usually and handle, the basic structure of DUC device comprises RRC (raised cosine) filter, half band (HB) filter and cic filter as shown in Figure 1.Cic filter is the abbreviation of cascade integral comb filter, does not need multiplier because cic filter only needs adder, therefore implements very simply, and saves hardware resource, is used widely.Cic filter is used in the highest one-level of speed usually.The basic structure of cic filter as shown in Figure 2, cic filter is made up of pectination device and integrator, for interpolation filter, the front is the pectination device, the back is an integrator; Decimation filter is just in time opposite, and the front is an integrator, and the back is a filter.
Cic filter can be realized based on FPGA (programmable logic device), realize in the process of cic filter at FPGA, can produce following problem: one, cic filter solves so need expand the bit wide of input data because integrator can cause the problem of overflowing.Two, the stopband attenuation of cic filter and transition band characteristic are not fine, generally be that the cascade by cic filter improves, but the exponent number of cic filter cascade can make overflow problem more serious again, and this just need expand more multidigit, causes a vicious circle.Simultaneously, a shortcoming bringing of the cic filter cascade of prior art can take a lot of register resources exactly.
The cascade of existing C IC filter all is a structure as shown in Figure 3.Publication number is CN1635706, open day is on July 6th, 2005, name is called in the Chinese invention patent application of " a kind of cic filter and its implementation " and discloses a kind of cic filter and implementation method: at first data-signal is imported a comb filter group and carried out filtering, described comb filter group is formed by some comb filter cascades; Then filtered data-signal is imported a retainer; Again the data-signal of retainer output is exported through an integrator group, described integrator group is formed by some integrator cascades, and is identical with the progression of described comb filter group.The pectination device of the filter of this structure and integrator are separately to realize, when the exponent number of filter changed, the cascade number of pectination device and integrator was all wanted corresponding change, need bigger modification during design, are unfavorable for modularization.
Summary of the invention
The technical problem to be solved in the present invention provides a kind of interpolation CIC wave filter and implementation method based on programmable logic device, can solve bit wide expansion in the multi-stage cascade of prior art and take the problem of too much register resources, can realize the modularization of cic filter cascade simultaneously.
In order to address the above problem, the implementation method of the interpolation CIC wave filter based on programmable logic device provided by the invention may further comprise the steps:
(1) data-signal to input carries out interpolation;
(2) data-signal after the interpolation is imported a bank of filters; Described bank of filters is in series by at least two single-order cic filters, and each single-order cic filter is in series by a pectination device and an integrator;
(3) data-signal of described bank of filters after to described interpolation handled, and the data-signal of output after handling.
Further, in the described step (1), described interpolation is for inserting numerical value " 0 " behind each numerical value of described data-signal.
Further, in the described step (1), the number of inserting numerical value " 0 " behind each numerical value of described data-signal is R-1, the interpolation multiple of described R for realizing.
Further, in the described step (1), described interpolation is to insert current numerical value behind each numerical value of described data-signal.
Further, in the described step (1), the number of inserting current numerical value behind each numerical value of described data-signal is R-1, the interpolation multiple of described R for realizing.
Interpolation CIC wave filter based on programmable logic device provided by the invention comprises an interpolating module and a bank of filters, wherein,
Described interpolating module is used for the data-signal of input is carried out interpolation;
Described bank of filters is used for the data-signal after the described interpolating module interpolation is handled, and the data-signal after the output processing; Described bank of filters is in series by at least two single-order cic filters, and each single-order cic filter is in series by a pectination device and an integrator.
Further, described interpolating module is used for inserting R-1 numerical value " 0 ", the interpolation multiple of described R for realizing behind each numerical value of the data-signal of input.
Further, described interpolating module is used for inserting R-1 current numerical value, the interpolation multiple of described R for realizing behind each numerical value of the data-signal of input.
Interpolation CIC wave filter and implementation method based on programmable logic device of the present invention, compared with prior art, owing to optimized the project organization of cic filter, the inputoutput data bit wide on every rank is consistent, so natural cascade is got off, and has avoided needing in the design to carry out the problem of bit wide expansion, a large amount of register resources that take in the design of saving, also make simultaneously the easier modularization of cic filter, only need simply repeat to call the expansion that to finish exponent number.
Description of drawings
Fig. 1 carries out the flow chart that Digital Up Convert is handled to signal;
Fig. 2 is the basic block diagram of a kind of cic filter in the prior art;
Fig. 3 is the basic block diagram of a kind of cascade cic filter in the prior art;
Fig. 4 is the basic block diagram of a single-order cic filter of the present invention;
Fig. 5 is the structural representation of interpolation CIC wave filter of the present invention.
Embodiment
The present invention has optimized the structure of cic filter cascade, and the cic filter that is combined into a single-order of pectination device and integrator, the cascade purpose by the single-order cic filter is connected and reached same has realized modularization.
The invention will be further described below in conjunction with the drawings and specific embodiments, but not as a limitation of the invention.
The structure of a single-order cic filter as shown in Figure 4, it comprises a pectination device and an integrator, pectination device and integrator are cascaded and constitute a single-order cic filter.Z among the figure
-MAnd Z
-1In M and 1 represent the number of data delay unit respectively.
Fig. 5 is a structured flowchart of realizing the cic filter cascade of N rank according to the present invention.
In example, N represents the unit number of cic filter cascade, and R represents the multiple of interpolation.Present embodiment comprises an interpolating module and a cic filter group.The cic filter group is in series by the individual single-order cic filter of N (perhaps N-1), and the single-order cic filter is made of pectination device and integrator.
The process of utilizing the cic filter cascade of above-mentioned N rank that data-signal is handled is:
By interpolating module the data-signal of importing is carried out interpolation processing, and the data-signal after the interpolation is imported a bank of filters;
The data-signal of bank of filters after to interpolation handled, and the data-signal of output after handling.
In the above-mentioned processing procedure, data-signal arrives the output through the cic filter of each single-order from being input to interpolation output, and in the processing procedure in each step, the bit wide of data input and output is constant.
Wherein, interpolating module carries out interpolation to data-signal can following two kinds of implementation methods:
A, behind each numerical value of data-signal, insert " 0 ";
B, behind each numerical value of data-signal, insert current value.
For example, realize the N rank cic filter of R times of interpolation, establish list entries for (d3 d4), then carries out the sequence exported after the interpolation processing by method a and is (d1,0 for d1, d2,0...0, d2,0,0...0, d3,0,0...0, d4,0,0...0), and d1 wherein, d2, d3, respectively there is (R-1) individual 0 the d4 back;
The sequence of being undertaken exporting after the interpolation processing by method b is (d1, d1...d1, d2, d2...d2, d3, d3...d3, d4 d4...d4), promptly inserts (R-1) individual d1 behind d1, insert (R-1) individual d2 behind the d2, insert (R-1) individual d3 behind the d3, insert (R-1) individual d4 behind the d4, data-signal d1 after the processing, d2, d3, the number of d4 respectively has R.Wherein, for the cic filter of realizing the N rank,, need the cic filter of N single-order of series connection if according to mode a interpolation; If according to b mode interpolation, only need the cic filter of N-1 single-order of series connection.
Claims (8)
1, a kind of implementation method of the interpolation CIC wave filter based on programmable logic device is characterized in that, may further comprise the steps:
(1) data-signal to input carries out interpolation;
(2) data-signal after the interpolation is imported a bank of filters; Described bank of filters is in series by at least two single-order cic filters, and each single-order cic filter is in series by a pectination device and an integrator;
(3) data-signal of described bank of filters after to described interpolation handled, and the data-signal of output after handling.
2, the method for claim 1 is characterized in that,
In the described step (1), described interpolation is for inserting numerical value " 0 " behind each numerical value of described data-signal.
3, method as claimed in claim 2 is characterized in that,
In the described step (1), the number of inserting numerical value " 0 " behind each numerical value of described data-signal is R-1, the interpolation multiple of described R for realizing.
4, the method for claim 1 is characterized in that,
In the described step (1), described interpolation is to insert current numerical value behind each numerical value of described data-signal.
5, method as claimed in claim 4 is characterized in that,
In the described step (1), the number of inserting current numerical value behind each numerical value of described data-signal is R-1, the interpolation multiple of described R for realizing.
6, a kind of interpolation CIC wave filter based on programmable logic device is characterized in that, comprises an interpolating module and a bank of filters, wherein,
Described interpolating module is used for the data-signal of input is carried out interpolation;
Described bank of filters is used for the data-signal after the described interpolating module interpolation is handled, and the data-signal after the output processing; Described bank of filters is in series by at least two single-order cic filters, and each single-order cic filter is in series by a pectination device and an integrator.
7, interpolation CIC wave filter as claimed in claim 6 is characterized in that,
Described interpolating module is used for inserting R-1 numerical value " 0 ", the interpolation multiple of described R for realizing behind each numerical value of the data-signal of input.
8, interpolation CIC wave filter as claimed in claim 6 is characterized in that,
Described interpolating module is used for inserting R-1 current numerical value, the interpolation multiple of described R for realizing behind each numerical value of the data-signal of input.
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| CN102148790B (en) * | 2010-02-05 | 2013-08-28 | 大唐移动通信设备有限公司 | Method and device for designing multicarrier cascade filter |
| CN103196547B (en) * | 2013-03-11 | 2015-09-02 | 安徽新力电业科技咨询有限责任公司 | One realizes the synchronous Computed order tracking analytical approach of characteristic of rotating machines vibration signal |
| CN104796151B (en) * | 2014-01-21 | 2017-10-27 | 成都国恒空间技术工程有限公司 | Sampling rate conversion device and method with continuously variable bandwidth |
| CN108270416B (en) * | 2016-12-30 | 2021-09-03 | 中电长城圣非凡信息系统有限公司 | High-order interpolation filter and method |
| CN106849906A (en) * | 2017-02-10 | 2017-06-13 | 天津中兴智联科技有限公司 | Method and cic filter based on cic filter reduction Adjacent Channel Power Ratio |
| DE102017212916B3 (en) * | 2017-07-27 | 2018-07-19 | Robert Bosch Gmbh | Device for signal processing |
| CN113325215B (en) * | 2021-04-28 | 2022-04-26 | 哈尔滨工业大学 | Design method of optical fiber current transformer output controller based on multistage comb filtering |
| CN113346872B (en) * | 2021-06-17 | 2024-03-22 | 北京奕斯伟计算技术股份有限公司 | Interpolation filter circuit, interpolation filter, control method, device and storage medium |
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| 多速率采样中的CIC滤波器设计与分析. 冯维婷.现代电子技术，第14期. 2007 |
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Effective date of registration: 20170828 Address after: 641300 Ziyang City, Sichuan province Shiling town of Yanjiang District No. 15 village eighteen groups of Cardinals Patentee after: Liu Taibin Address before: 518057 Nanshan District high tech Industrial Park, Guangdong, South Road, science and technology, ZTE building, legal department Patentee before: ZTE Corporation |
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Address after: 541002 No. two, No. 5, West Road, Xiangshan District, Guilin, the Guangxi Zhuang Autonomous Region Patentee after: Liu Taibin Address before: 641300 Ziyang City, Sichuan province Shiling town of Yanjiang District No. 15 village eighteen groups of Cardinals Patentee before: Liu Taibin |
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