CN103066949B - A kind of multi-channel comb filter - Google Patents

A kind of multi-channel comb filter Download PDF

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CN103066949B
CN103066949B CN201210585102.5A CN201210585102A CN103066949B CN 103066949 B CN103066949 B CN 103066949B CN 201210585102 A CN201210585102 A CN 201210585102A CN 103066949 B CN103066949 B CN 103066949B
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comb filter
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adder
output
integrator
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潘科
韩明
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Shanghai Beiling Co Ltd
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Abstract

The invention discloses a kind of multi-channel high-speed comb filter, by decomposing comb filter transfer function, optimize comb filter framework, comb filter is decomposed into the comb filter in heterogeneous parallel construction, and utilizing shift register and RAM memory, multiplexing comb filter shares a set of integrator, pectination device and adder-subtractor.Thus high-speed multiple channel comb filtering is realized on the basis not increasing area and complexity, reduce hardware resource consumption, cost-saving, operating frequency can be reduced before carrying out plus and minus calculation, thus improve the overall work frequency of comb filter, be applicable to next generation mobile communication system.

Description

A kind of multi-channel comb filter
Technical field
The present invention relates to digital signal processing technique field, particularly relate to a kind of multi-channel comb filter.
Background technology
Science and technology is maked rapid progress, and due to the fast development of digital system, nowadays most sophisticated equipment is all use digital system to carry out signal transacting.Analog signal needs to convert digital signal to through analog to digital converter (ADCs) and could carry out processing and storing in digital system.Along with the development of mobile communication technology, communication user sharply increases, and all have employed high-speed multi-carrier treatment technology in modern communication agreement, and this just requires that corresponding communication products also have high-speed multi-carrier disposal ability.
Digital filter is widely used in various communication system, as HDTV (High-Definition Television), and smart mobile phone, cable modulation etc.In adopting the over-sampling ∑ Δ ADC of high dynamic range and high s/n ratio to apply, filter plays key player, as high-end audio video transmission, the access of WiMAX(worldwide interoperability for microwave) receive.The two-forty of quick growth and high bandwidth requirements, make traditional filter cannot be operated in clock frequency system at a high speed.Such as, ∑ Δ ADC sample frequency in 2G system needs to reach 200KHz, ∑ Δ ADC sample frequency in 3G system needs to reach 4MHz, and LTE(LongTermEvolution) ∑ Δ ADC sample frequency in system needs to reach more than 40MHz, follow-on mobile communication technology proposes higher requirement by the performance of Digital Signal Processing.
Comb filter is a kind of filter often used in Digital Signal Processing, do not need multiplication unit, memory space is also lower than other FIR(FiniteImpulseResponse) filter, and easily expand, these advantages all improve practicality and the researching value of comb filter.Pass band damping is one of subject matter of comb filter, by increasing the exponent number of comb filter, and can the pass-band performance of sharpening comb filter.For traditional comb filter, often increase by 1 rank, by increase by 2 adders, and in order to keep precision, corresponding data bit wide also can increase, and the speed of adder will decline, and area also will increase.
Comb filter realizes there is higher efficiency at the low-frequency filter of narrow-band, its major function eliminates the noise on frequency spectrum beyond signal frequency range, be mixed into signal frequency range with noise after preventing from sampling, when down sample of being everlasting (extraction) and raising frequency sampling (interpolation), be usually used as chopped-off head filter.As shown in Figure 1, application in down sample (extraction), comb filter 102 is immediately following after ∑ Δ ADC101, and as first order filter, the half-band filter 103,104 that rear class uses is for level and smooth comb filter pass-band performance.
Summary of the invention
The object of the present invention is to provide a kind of multi-channel comb filter, hundreds of megahertz (MHz) can be operated in in the ∑ Δ ADC over-sampling system of GHz (GHz), operating frequency can be reduced before carrying out plus and minus calculation, can support that the data of multiple passage carry out comb filtering simultaneously.
The technical scheme realizing above-mentioned purpose is:
A kind of multi-channel comb filter, comprise the second MUX (511), the 6th withdrawal device (506), three-component comb filter (510), the 3rd delay register (512), the 6th adder (508) and the 4th delay register (513) that connect successively, wherein:
The extraction yield of described 6th withdrawal device (506) is M1;
The output of described 4th delay register (513) connects described 6th adder (508);
Described three-component comb filter (510) comprises the 4th pectination device of the 4th integrator of the N level cascade connected successively, the 7th withdrawal device (505) and the cascade of N level, wherein:
The extraction yield of described 7th withdrawal device (505) is M2;
The input of described 4th integrator connects the output of described 6th withdrawal device (506); The output of described 4th pectination device connects the input of described 3rd delay register (512);
Described 4th integrator comprises N number of 4th single-stage integrator connected successively, each 4th single-stage integrator comprises the 7th adder (502) and the 7th d type flip flop (504), and the 7th d type flip flop (504) is to the 3rd shift register on the 7th adder (502) path or the 3rd RAM memory (509);
Described 4th pectination device comprises the N number of 4th single-stage pectination device connected successively, each 4th single-stage pectination device comprises the 4th subtracter (503) and the 8th d type flip flop (504 '), and the 8th d type flip flop (504 ') is to the 4th shift register on the 4th subtracter (503) path or the 4th RAM memory (509 '); N, M1 and M2 are positive integer.
Above-mentioned multi-channel comb filter, wherein,
In each 4th single-stage integrator: the input of the 7th adder (502) is as the input of the 4th single-stage integrator; The output of the 7th adder (502) connects the 7th d type flip flop (504); The output of the 7th d type flip flop (504) as the output of the 4th single-stage integrator, and connects the 7th adder (502) by the 3rd shift register or the 3rd RAM memory (509);
In each 4th single-stage pectination device: the 8th d type flip flop (the 504 ') input respective with the 4th subtracter (503) is connected as the input of the 4th single-stage pectination device; The output of the 8th d type flip flop (504 ') connects the 4th subtracter (503) by the 4th shift register or the 4th RAM memory (509 '), and the output of the 4th subtracter (503) is as the output of the 4th single-stage pectination device.
Above-mentioned multi-channel comb filter, wherein, the total length of described 3rd, the 4th shift register or the 3rd, the 4th RAM memory (509,509 ') is that M1*K, K represent port number.
The invention has the beneficial effects as follows: the present invention is by decomposing comb filter transfer function, optimize comb filter framework, the basis not increasing area and complexity realizes high speed comb filter, hundreds of megahertz (MHz) can be operated in in the ∑ Δ ADC over-sampling system of GHz (GHz), operating frequency can be reduced before carrying out plus and minus calculation, thus improve the overall work frequency of comb filter, be applicable to next generation mobile communication system.Meanwhile, the present invention can support that the data of multiple passage carry out comb filtering, and multiple component is all identical comb filter, and tactical rule, is beneficial to resource-sharing during hardware implementing, reduces hardware resource consumption, cost-saving.
Accompanying drawing explanation
Fig. 1 is the position block diagram of comb filter in a kind of typical apply;
Fig. 2 is traditional comb filter, i.e. the structured flowchart of the first comb filter;
Fig. 3 is the comb filter after the present invention decomposes, i.e. the structured flowchart of the second comb filter;
Fig. 4 is the multi-channel comb filter after the present invention optimizes, i.e. the structured flowchart of the 3rd comb filter;
Fig. 5 is another multi-channel comb filter after the present invention optimizes, i.e. the structured flowchart of the 4th comb filter.
Embodiment
Below in conjunction with accompanying drawing, the invention will be further described.
The advantage of comb filter has: without the need to multiplier; Filter factor is without the need to memory; Tactical rule is without the need to outside sequencing control etc.Shortcoming is band-pass behavior decay, needs rear class to increase filter compensation.
The transfer function of comb filter is:
wherein, M is the tap number of comb filter, and M is integer; for integrator; 1-Z -Mfor pectination device; Z -Mrepresent delay unit, represent time delay M time.
In order to improve the stopband attenuation of comb filter, reducing pass band damping, the transfer function of comb filter be modified to:
wherein, N is the exponent number of comb filter, and N is positive integer.
Referring to Fig. 2, is the structural representation of traditional comb filter, i.e. the structure chart of the first comb filter 201; First comb filter 201 first half is the first integrator 208(of N level cascade and N number of first single-stage integrator), latter half is the first pectination device 209(of N level cascade and N number of first single-stage pectination device), first withdrawal device 205 of to be an extraction yield be in centre M; Each first single-stage integrator 206 is made up of first d type flip flop 204 and a first adder 202, the input of first adder 202 is the input of the first single-stage integrator 206, the output that the output of first adder 202 connects the first d type flip flop 204, first d type flip flop 204 as the first single-stage integrator 206 output and connect first adder 202; Each first single-stage pectination device 207 is made up of second d type flip flop 204 ' and first subtracter 203, the second d type flip flop 204 ' input respective with the first subtracter 203 is connected as the input of the first single-stage pectination device 207, the output of the second d type flip flop 204 ' connects the output of output as the first single-stage pectination device 207 of the first subtracter 203, first subtracter 203.
From the above, the operating frequency of first integrator 208 compared with the first pectination device 209 operating frequency height M doubly, actual also may than high several times of sample frequency when using.When required precision is higher, the first adder 202 that first integrator 208 uses possibly cannot be operated in comparatively high clock frequency, in order to solve problems, incorporated by reference to Fig. 3, carries out following steps:
Step one, selection exponent number is N, and extracting the factor is that first comb filter 201 of M is as original comb filter; N and M is positive integer;
Step 2, is decomposed into the second comb filter 301 in heterogeneous parallel construction by the first comb filter 201, this second comb filter 301 comprises M1 the first sub-channel, M1-1 the first delay register 307 and second adder 308, wherein:
It is N that each first sub-channel comprises an exponent number, and extract the first component comb filter 309 that the factor is M2, and be connected to the second withdrawal device 306 of the first component comb filter 309 input, the extraction yield of this second withdrawal device 306 is M1;
By connecting first delay register 307 between the input (input of the second withdrawal device 306) of every two the first sub-channels, the input of each first subchannel is aggregated into a total input;
The output of each first sub-channel connects second adder 308;
M1 and M2 is positive integer; And M1, M2 and M have correlation, namely M=P*M1*M2, P represent coefficient correlation.
Specifically, refer to Fig. 3, first component comb filter 309 comprises the second pectination device (the N number of second single-stage pectination device namely connected successively) of the second integral device (N number of second single-stage integrator namely connected successively) of the N level cascade connected successively, the 3rd withdrawal device 305 and the cascade of N level, wherein:
The extraction yield of the 3rd withdrawal device 305 is M2;
The input of second integral device connects the output of the second withdrawal device 306; The output of the second pectination device connects second adder 308;
Each second single-stage integrator comprises the 3rd adder 302 and 3d flip-flop 304;
Each second single-stage pectination device comprises the second subtracter 303 and four d flip-flop 304 '.
Fig. 2 and Fig. 3, the i.e. structure non-equivalence of the first comb filter 201 and the second comb filter 301, but passband frequency response is similar, stop-band frequency response characteristic has certain deviation, utilize this characteristic, the ratio of adjustment M1 and M2, balance timing requirements and frequency response deviation select the structure be applicable to realize, for the frequency response deviation that Structural Transformation produces, can ignore in less demanding situation, if can't stand the deviation that stopband produces, offset correction filter can be added for revising the frequency response deviation of stopband in rear class;
As can be seen from Fig. 3, each first component comb filter 309 just can reduce M1 times of clock in integration phase, thus guarantees that the 3rd adder 302 in each second single-stage integrator can meet sequential condition.Meanwhile, each first component comb filter 309 structure is identical, and tactical rule, is beneficial to resource-sharing during hardware implementing.
In order to realize multichannel, proceed:
Step 3, for each first component comb filter 309, in the middle of its each second single-stage integrator 3d flip-flop 304 to the three adder 302 path on add a shift register or RAM memory; In the middle of its each second single-stage pectination device, four d flip-flop 304 ' adds a shift register or RAM memory to the path of the second subtracter 303;
Step 4, connects a MUX at total input of each first subchannel.
Through step 3 and step 4, by the new comb filter that the optimization of the second comb filter 301 obtains, can multichannel be realized, i.e. the 3rd comb filter 401, as shown in Figure 4:
3rd comb filter 401 comprises the first MUX 411, M1 the second sub-channel, M1-1 the second delay register 407 and the 4th adder 408, wherein:
It is N that each second sub-channel comprises an exponent number, extract the second component comb filter 410 that the factor is M2, and the extraction yield of the 4th withdrawal device the 406, four withdrawal device 406 being connected to second component comb filter 410 input is M1;
By connecting second delay register 407 between the input (input of the 4th withdrawal device 406) of every two the second sub-channels, the input of each second subchannel is aggregated into a total input, and this total input connects the output of the first MUX 411;
The output of each second sub-channel connects the 4th adder 408;
Specifically, second component comb filter 410 comprises the 3rd pectination device (the N number of 3rd single-stage pectination device namely connected successively) of the third integral device (N number of 3rd single-stage integrator namely connected successively) of the N level cascade connected successively, the 5th withdrawal device 405 and the cascade of N level, wherein:
The extraction yield of the 5th withdrawal device 305 is M2;
The input of third integral device connects the output of the 4th withdrawal device 406; The output of the 3rd pectination device connects the 4th adder 408;
Each 3rd single-stage integrator comprises slender acanthopanax musical instruments used in a Buddhist or Taoist mass 402 and the 5th d type flip flop 404, and the first shift register on the 5th d type flip flop 404 to the slender acanthopanax musical instruments used in a Buddhist or Taoist mass 402 path or a RAM memory 409;
Each 3rd single-stage pectination device comprises the 3rd subtracter 403 and the 6th d type flip flop 404 ', and the 6th d type flip flop 404 ' is to the second shift register on the 3rd subtracter 403 path or the 2nd RAM memory 409 ';
M1 and M2 is positive integer; And M1, M2 and M have correlation, namely M=P*M1*M2, P represent coefficient correlation; The total length of first, second shift register or first, second RAM memory 409,409 ' is M1.
Each component data enters first, second shift register or first, second RAM memory 409,409 ' in order by the first MUX 411, at synchronization, second component comb filter 410 all in the calculating carrying out same channel data, does not affect each other.Fig. 4 and Fig. 3, namely the Structural Transformation of the 3rd comb filter 401 and the second comb filter 301 is of equal value, can not produce noise to the calculating of single channels.
Further, the basis of the 3rd comb filter 401 simplifies, M1 second component comb filter 410 is shared a set of filter structure, thus obtains multi-channel comb filter of the present invention, be i.e. the 4th comb filter 501;
Refer to Fig. 5, the 4th comb filter 501 comprises the second MUX 511, the 6th withdrawal device 506, three-component comb filter 510, the 3rd delay register 512, the 6th adder 508 and the 4th delay register 513 that connect successively, wherein:
The extraction yield of the 6th withdrawal device 506 is M1;
The output of the 4th delay register 513 connects the 6th adder 508;
Three-component comb filter 510 comprises the 4th pectination device (the N number of 4th single-stage pectination device namely connected successively) of the 4th integrator (N number of 4th single-stage integrator namely connected successively) of the N level cascade connected successively, the 7th withdrawal device 505 and the cascade of N level, wherein:
The extraction yield of the 7th withdrawal device 505 is M2;
The input of the 4th integrator connects the output of the 6th withdrawal device 506; The output of the 3rd pectination device connects the input of the 3rd delay register 512;
Each 4th single-stage integrator comprises the 7th adder 502 and the 7th d type flip flop 504, and the 3rd shift register on the 7th d type flip flop 504 to the seven adder 502 path or the 3rd RAM memory 509;
Each 4th single-stage pectination device comprises the 4th subtracter 503 and the 8th d type flip flop 504 ', and the 8th d type flip flop 504 ' is to the 4th shift register on the 4th subtracter 503 path or the 4th RAM memory 509 ';
M1 and M2 is positive integer; And M1, M2 and M have correlation, namely M=P*M1*M2, P represent coefficient correlation; Three, the total length of the 4th shift register or the 3rd, the 4th RAM memory 509,509 ' is that M1*K, K represent port number.
Each component data and multi-channel data are entered by the second MUX 511 timesharing, and in passage, each component data enters successively, and then is switched to other passage.Leave in the 3rd, the 4th shift register or the 3rd, the 4th memory cell 509,509 ' through the data order timesharing of the 7th, the 8th d type flip flop 504,504 ' in each 4th single-stage integrator and the 4th single-stage pectination device.The integrator of the 3rd delay register 512, the 6th adder 508 and the 4th delay register 513 composition, for each component data in cumulative passage, when passage bridge, the 4th delay register 513 needs to reset.Fig. 5 and Fig. 3, namely the Structural Transformation of the 4th comb filter 501 and the second comb filter 301 is of equal value, can not produce noise to the calculating of single channels.
Above embodiment is used for illustrative purposes only, but not limitation of the present invention, person skilled in the relevant technique, without departing from the spirit and scope of the present invention, various conversion or modification can also be made, therefore all equivalent technical schemes also should belong to category of the present invention, should be limited by each claim.

Claims (2)

1. a multi-channel comb filter, it is characterized in that, comprise the second MUX (511), the 6th withdrawal device (506), three-component comb filter (510), the 3rd delay register (512), the 6th adder (508) and the 4th delay register (513) that connect successively, wherein:
The extraction yield of described 6th withdrawal device (506) is M1;
The output of described 4th delay register (513) connects described 6th adder (508);
Described three-component comb filter (510) comprises the 4th pectination device of the 4th integrator of the N level cascade connected successively, the 7th withdrawal device (505) and the cascade of N level, wherein:
The extraction yield of described 7th withdrawal device (505) is M2;
The input of described 4th integrator connects the output of described 6th withdrawal device (506); The output of described 4th pectination device connects the input of described 3rd delay register (512);
Described 4th integrator comprises N number of 4th single-stage integrator connected successively, each 4th single-stage integrator comprises the 7th adder (502) and the 7th d type flip flop (504), and the 7th d type flip flop (504) is to the 3rd shift register on the 7th adder (502) path or the 3rd RAM memory (509);
Described 4th pectination device comprises the N number of 4th single-stage pectination device connected successively, each 4th single-stage pectination device comprises the 4th subtracter (503) and the 8th d type flip flop (504 '), and the 8th d type flip flop (504 ') is to the 4th shift register on the 4th subtracter (503) path or the 4th RAM memory (509 '); N, M1 and M2 are positive integer,
In each 4th single-stage integrator: the input of the 7th adder (502) is as the input of the 4th single-stage integrator; The output of the 7th adder (502) connects the 7th d type flip flop (504); The output of the 7th d type flip flop (504) as the output of the 4th single-stage integrator, and connects the 7th adder (502) by the 3rd shift register or the 3rd RAM memory (509);
In each 4th single-stage pectination device: the 8th d type flip flop (the 504 ') input respective with the 4th subtracter (503) is connected as the input of the 4th single-stage pectination device; The output of the 8th d type flip flop (504 ') connects the 4th subtracter (503) by the 4th shift register or the 4th RAM memory (509 '), and the output of the 4th subtracter (503) is as the output of the 4th single-stage pectination device.
2. multi-channel comb filter according to claim 1, is characterized in that, the total length of described 3rd, the 4th shift register or the 3rd, the 4th RAM memory (509,509 ') is that M1*K, K represent port number.
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