CN202998021U - Multichannel comb filter - Google Patents
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- CN202998021U CN202998021U CN 201220740779 CN201220740779U CN202998021U CN 202998021 U CN202998021 U CN 202998021U CN 201220740779 CN201220740779 CN 201220740779 CN 201220740779 U CN201220740779 U CN 201220740779U CN 202998021 U CN202998021 U CN 202998021U
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Abstract
The utility model discloses a multichannel high speed comb filter. Via resolution of a transfer function of the comb filter, and optimization of an architecture of the comb filter, the comb filter is resolved to be the comb filter in a multi-phase parallel structure, and a shift register and an RAM memory are used, a multiplexer comb filter uses a set of an integrator, a comb device, and an addition and subtraction device, and therefore on the basis of not increasing area and complex degree, high speed multichannel comb filtering is realized, consumption of hardware resource is reduced, cost is saved, and work frequency can be reduced before adding and subtracting operation, thereby improving whole work frequency of the comb filter. The multichannel comb filter is suitable for a next generation mobile communication system.
Description
Technical field
The utility model relates to digital signal processing technique field, relates in particular to the multichannel comb filter.
Background technology
Science and technology is maked rapid progress, and due to the fast development of digital system, nowadays most sophisticated equipment is all to use digital system to carry out signal to process.Analog signal need to be passed through analog to digital converter (ADCs) and be converted digital signal to and could process and store in digital system.Along with the development of mobile communication technology, communication user sharply increases, and has all adopted the high-speed multi-carrier treatment technology in the modern communication agreement, and this just requires corresponding communication products also to have the high-speed multi-carrier disposal ability.
Digital filter is widely used in various communication systems, as HDTV (High-Definition Television), and smart mobile phone, cable modulation etc.In the over-sampling ∑ Δ ADC that adopts high dynamic range and high s/n ratio used, filter had been played the part of the key player, as high-end audio video transmission, the access of WiMAX(worldwide interoperability for microwave) receive etc.The two-forty of rapid growth and high bandwidth requirements can't be operated at a high speed clock frequency system traditional filter.For example the ∑ Δ ADC sample frequency in the 2G system need to reach 200KHz, ∑ Δ ADC sample frequency in the 3G system need to reach 4MHz, and LTE(Long Term Evolution) more than ∑ Δ ADC sample frequency in system need to reach 40MHz, follow-on mobile communication technology will propose higher requirement to the performance of Digital Signal Processing.
Comb filter is a kind of filter that often uses in Digital Signal Processing, do not need multiplication unit, memory space is also lower than other FIR(Finite Impulse Response) filter, and easily expansion, these advantages all improve practicality and the researching value of comb filter.Pass band damping is one of subject matter of comb filter, by increasing the exponent number of comb filter, and pass-band performance that can the sharpening comb filter.For traditional comb filter, every increase by 1 rank will increase by 2 adders, and in order to keep precision, the corresponding data bit wide can increase also, and the speed of adder will descend, and area also will increase.
Comb filter realizes that at the low-frequency filter of narrow-band higher efficient is arranged, its major function is to eliminate the noise beyond the signal frequency range on frequency spectrum, sneaked into the signal frequency range with the rear noise that prevents from sampling, the frequency reducing of being everlasting sampling (extractions) and raising frequency are used as the chopped-off head filter usually when sampling (interpolation).As shown in Figure 1, use in frequency reducing sampling (extraction), comb filter 102 is immediately following after ∑ Δ ADC101, and as first order filter, the half-band filter 103 that rear class is used, 104 is used for level and smooth comb filter pass-band performance.
Summary of the invention
The purpose of this utility model is to provide a kind of multichannel comb filter, can be operated in hundreds of megahertzes (MHz) in the ∑ Δ ADC over-sampling system of GHz (GHz), can reduce operating frequency before carrying out plus and minus calculation, can support the data of a plurality of passages to carry out comb filtering simultaneously.
The technical scheme that realizes above-mentioned purpose is:
A kind of multichannel comb filter, comprise the second MUX (511), the 6th withdrawal device (506), three-component comb filter (510), the 3rd delay register (512), the 6th adder (508) and the 4th delay register (513) that connect successively, wherein:
The extraction yield of described the 6th withdrawal device (506) is M1;
The output of described the 4th delay register (513) connects described the 6th adder (508);
Described three-component comb filter (510) comprises the 4th pectination device of the 4th integrator, the 7th withdrawal device (505) and the cascade of N level of the N level cascade that connects successively, wherein:
The extraction yield of described the 7th withdrawal device (505) is M2;
The input of described the 4th integrator connects the output of described the 6th withdrawal device (506); The output of described the 4th pectination device connects the input of described the 3rd delay register (512);
Described the 4th integrator comprises N the 4th single-stage integrator that joins successively, each the 4th single-stage integrator comprises the 7th adder (502) and the 7th d type flip flop (504), and three shift register or the three RAM memory (509) of the 7th d type flip flop (504) to the 7th adder (502) path;
Described the 4th pectination device comprises N the 4th single-stage pectination device that joins successively, each the 4th single-stage pectination device comprises the 4th subtracter (503) and the 8th d type flip flop (504 '), and four shift register or the four RAM memory (509 ') of the 8th d type flip flop (504 ') to the 4th subtracter (503) path; N, M1 and M2 are positive integer.
Above-mentioned multichannel comb filter, wherein,
In each the 4th single-stage integrator: the input of the 7th adder (502) is as the input of the 4th single-stage integrator; The output of the 7th adder (502) connects the 7th d type flip flop (504); The output of the 7th d type flip flop (504) is as the output of the 4th single-stage integrator, and connects the 7th adder (502) by the 3rd shift register or the 3rd RAM memory (509);
In each the 4th single-stage pectination device: the 8th d type flip flop (504 ') is connected as the input of the 4th single-stage pectination device with the 4th subtracter (503) input separately; The output of the 8th d type flip flop (504 ') connects the 4th subtracter (503) by the 4th shift register or the 4th RAM memory (509 '), and the output of the 4th subtracter (503) is as the output of the 4th single-stage pectination device.
Above-mentioned multichannel comb filter, wherein, the total length of described the 3rd, the 4th shift register or the 3rd, the 4th RAM memory (509,509 ') is M1*K, K represents port number.
The beneficial effects of the utility model are: the utility model is by decomposing the comb filter transfer function, optimize the comb filter framework, realize the high speed comb filter on the basis that does not increase area and complexity, can be operated in hundreds of megahertzes (MHz) in the ∑ Δ ADC over-sampling system of GHz (GHz), can reduce operating frequency before carrying out plus and minus calculation, thereby improve the overall work frequency of comb filter, be applicable to next generation mobile communication system.Simultaneously, the utility model can support the data of a plurality of passages to carry out comb filtering, and a plurality of components are all identical comb filter, tactical rule, and the resource-sharing when being beneficial to hardware and realizing reduces hardware resource consumption, saves cost.
Description of drawings
Fig. 1 is the position block diagram of comb filter in a kind of typical case uses;
Fig. 2 is traditional comb filter, i.e. the structured flowchart of the first comb filter;
Fig. 3 is the comb filter after the utility model decomposes, the i.e. structured flowchart of the second comb filter;
Fig. 4 is the multichannel comb filter after the utility model is optimized, the i.e. structured flowchart of the 3rd comb filter;
Fig. 5 is another multichannel comb filter after the utility model is optimized, the i.e. structured flowchart of the 4th comb filter.
Embodiment
The utility model is described in further detail below in conjunction with accompanying drawing.
The advantage of comb filter has: need not multiplier; Filter factor need not memory; Tactical rule need not outside sequencing control etc.Shortcoming is the band-pass behavior decay, needs rear class to increase the filter compensation.
The transfer function of comb filter is:
In order to improve the stopband attenuation of comb filter, reduce pass band damping, the transfer function of comb filter is modified to:
See also Fig. 2, be the structural representation of traditional comb filter, i.e. the structure chart of the first comb filter 201; The first comb filter 201 first halfs are that the first integrator 208(of N level cascade is N the first single-stage integrator), latter half is that the first pectination device 209(of N level cascade is N the first single-stage pectination device), the centre is that an extraction yield is the first withdrawal device 205 of M; Each first single-stage integrator 206 is comprised of first d type flip flop 204 and a first adder 202, the input of first adder 202 is the input of the first single-stage integrator 206, the output that the output of first adder 202 connects the first d type flip flop 204, the first d type flip flops 204 is as the output of the first single-stage integrator 206 and connect first adder 202; Each first single-stage pectination device 207 is comprised of second d type flip flop 204 ' and first subtracter 203, the second d type flip flop 204 ' is connected as the input of the first single-stage pectination device 207 with the first subtracter 203 input separately, the output of the second d type flip flop 204 ' connects the output of the first subtracter 203, the first subtracters 203 as the output of the first single-stage pectination device 207.
From the above, the operating frequency of first integrator 208 also may be than high several times of sample frequency during actual the use than the high M of operating frequency times of the first pectination device 209.When required precision was higher, the first adder 202 that first integrator 208 is used possibly can't be operated in than high clock frequency, in order to solve problems, please in conjunction with Fig. 3, carries out following steps:
Each first sub-channel comprises that an exponent number is N, and extracting the factor is the first component comb filter 309 of M2, and the second withdrawal device 306 that is connected to the first component comb filter 309 inputs, and the extraction yield of this second withdrawal device 306 is M1;
By connecting first delay register 307 between the input (input of the second withdrawal device 306) of every two the first sub-channels, the input of each the first subchannel is aggregated into a total input;
The output of each first sub-channel connects second adder 308;
M1 and M2 are positive integer; And M1, M2 and M have correlation, i.e. M=P*M1*M2, and P represents coefficient correlation.
Specifically, see also Fig. 3, the first component comb filter 309 comprises the second pectination device (N that namely joins successively the second single-stage pectination device) of second integral device (N that namely joins successively the second single-stage integrator), the 3rd withdrawal device 305 and the cascade of N level of the N level cascade that connects successively, wherein:
The extraction yield of the 3rd withdrawal device 305 is M2;
The input of second integral device connects the output of the second withdrawal device 306; The output of the second pectination device connects second adder 308;
Each second single-stage integrator comprises the 3rd adder 302 and 3d flip-flop 304;
Each second single-stage pectination device comprises the second subtracter 303 and four d flip-flop 304 '.
Fig. 2 and Fig. 3, the i.e. structure non-equivalence of the first comb filter 201 and the second comb filter 301, but passband frequency response is similar, the stop-band frequency response characteristic has certain deviation, utilize this specific character, adjust the ratio of M1 and M2, the structure that balance sequential demand and frequency response deviation are selected to be fit to realizes, frequency response deviation for the Structural Transformation generation, can ignore in less demanding situation, if can't stand the deviation that stopband produces, can add the offset correction filter to be used for revising the frequency response deviation of stopband in rear class;
By finding out in Fig. 3, each first component comb filter 309 just can reduce M1 times of clock in integration phase, thereby guarantees that the 3rd adder 302 in each second single-stage integrator can satisfy the sequential condition.Simultaneously, each first component comb filter 309 structure is identical, tactical rule, the resource-sharing when being beneficial to hardware and realizing.
In order to realize multichannel, proceed:
Step 3 for each the first component comb filter 309, adds a shift register or RAM memory on the path of 3d flip-flop 304 to the 3rd adders 302 in the middle of its each second single-stage integrator; Four d flip-flop 304 ' adds a shift register or RAM memory to the path of the second subtracter 303 in the middle of its each second single-stage pectination device;
Step 4 is in MUX of total input connection of each the first subchannel.
Through step 3 and step 4, the second comb filter 301 is optimized the new comb filter that obtains, can realize multichannel, i.e. the 3rd comb filter 401, as shown in Figure 4:
The 3rd comb filter 401 comprises the first MUX 411, M1 the second sub-channel, M1-1 the second delay register 407 and the 4th adder 408, wherein:
Each second sub-channel comprises that an exponent number is N, and extracting the factor is the second component comb filter 410 of M2, and the extraction yield that is connected to the 4th withdrawal device 406, the four withdrawal devices 406 of second component comb filter 410 inputs is M1;
By connect second delay register 407 between the input (input of the 4th withdrawal device 406) of every two the second sub-channels, the input of each the second subchannel is aggregated into a total input, and this total input connects the output of the first MUX 411;
The output of each second sub-channel connects the 4th adder 408;
Specifically, second component comb filter 410 comprises the 3rd pectination device (N that namely joins successively the 3rd single-stage pectination device) of third integral device (N that namely joins successively the 3rd single-stage integrator), the 5th withdrawal device 405 and the cascade of N level of the N level cascade that connects successively, wherein:
The extraction yield of the 5th withdrawal device 305 is M2;
The input of third integral device connects the output of the 4th withdrawal device 406; The output of the 3rd pectination device connects the 4th adder 408;
Each the 3rd single-stage integrator comprises slender acanthopanax musical instruments used in a Buddhist or Taoist mass 402 and the 5th d type flip flop 404, and first shift register or the RAM memory 409 of the 5th d type flip flop 404 to slender acanthopanax musical instruments used in a Buddhist or Taoist mass 402 paths;
Each the 3rd single-stage pectination device comprises the 3rd subtracter 403 and the 6th d type flip flop 404 ', and second shift register or the two RAM memory 409 ' of the 6th d type flip flop 404 ' to the 3rd subtracter 403 paths;
M1 and M2 are positive integer; And M1, M2 and M have correlation, i.e. M=P*M1*M2, and P represents coefficient correlation; First, second shift register or first, second RAM memory 409,409 ' total length are M1.
Each component data enters first, second shift register or first, second RAM memory 409,409 ' in order by the first MUX 411, at synchronization, second component comb filter 410 does not affect each other all in the calculating of carrying out same channel data.Fig. 4 and Fig. 3, namely the Structural Transformation of the 3rd comb filter 401 and the second comb filter 301 is of equal value, can not produce noise to the calculating of single channel passage.
Further, simplify on the basis of the 3rd comb filter 401, M1 second component comb filter 410 shared a cover filter structure, thereby obtain multichannel comb filter of the present utility model, be i.e. the 4th comb filter 501;
See also Fig. 5, the 4th comb filter 501 comprises the second MUX 511, the 6th withdrawal device 506, three-component comb filter 510, the 3rd delay register 512, the 6th adder 508 and the 4th delay register 513 that connects successively, wherein:
The extraction yield of the 6th withdrawal device 506 is M1;
The output of the 4th delay register 513 connects the 6th adder 508;
Three-component comb filter 510 comprises the 4th pectination device (N that namely joins successively the 4th single-stage pectination device) of the 4th integrator (N that namely joins successively the 4th single-stage integrator), the 7th withdrawal device 505 and the cascade of N level of the N level cascade that connects successively, wherein:
The extraction yield of the 7th withdrawal device 505 is M2;
The input of the 4th integrator connects the output of the 6th withdrawal device 506; The output of the 3rd pectination device connects the input of the 3rd delay register 512;
Each the 4th single-stage integrator comprises the 7th adder 502 and the 7th d type flip flop 504, and the 3rd shift register or the 3rd RAM memory 509 on the 7th d type flip flop 504 to the 7th adder 502 paths;
Each the 4th single-stage pectination device comprises the 4th subtracter 503 and the 8th d type flip flop 504 ', and four shift register or the four RAM memory 509 ' of the 8th d type flip flop 504 ' to the 4th subtracter 503 paths;
M1 and M2 are positive integer; And M1, M2 and M have correlation, i.e. M=P*M1*M2, and P represents coefficient correlation; Three, the 4th shift register or the 3rd, the 4th RAM memory 509,509 ' total length are M1*K, and K represents port number.
Each component data and multi-channel data enter by the second MUX 511 timesharing, and in passage, each component data enters successively, and then switch to other passage.Leave in the 3rd, the 4th shift register or the 3rd, the 4th memory cell 509,509 ' through the 7th, the 8th d type flip flop 504, the timesharing of 504 ' data order in each the 4th single-stage integrator and the 4th single-stage pectination device.The integrator that the 3rd delay register 512, the 6th adder 508 and the 4th delay register 513 form is used for cumulative each component data of passage, and when passage switched, the 4th delay register 513 needed zero clearing.Fig. 5 and Fig. 3, namely the Structural Transformation of the 4th comb filter 501 and the second comb filter 301 is of equal value, can not produce noise to the calculating of single channel passage.
Claims (3)
1. multichannel comb filter, it is characterized in that, comprise the second MUX (511), the 6th withdrawal device (506), three-component comb filter (510), the 3rd delay register (512), the 6th adder (508) and the 4th delay register (513) that connect successively, wherein:
The extraction yield of described the 6th withdrawal device (506) is M1;
The output of described the 4th delay register (513) connects described the 6th adder (508);
Described three-component comb filter (510) comprises the 4th pectination device of the 4th integrator, the 7th withdrawal device (505) and the cascade of N level of the N level cascade that connects successively, wherein:
The extraction yield of described the 7th withdrawal device (505) is M2;
The input of described the 4th integrator connects the output of described the 6th withdrawal device (506); The output of described the 4th pectination device connects the input of described the 3rd delay register (512);
Described the 4th integrator comprises N the 4th single-stage integrator that joins successively, each the 4th single-stage integrator comprises the 7th adder (502) and the 7th d type flip flop (504), and three shift register or the three RAM memory (509) of the 7th d type flip flop (504) to the 7th adder (502) path;
Described the 4th pectination device comprises N the 4th single-stage pectination device that joins successively, each the 4th single-stage pectination device comprises the 4th subtracter (503) and the 8th d type flip flop (504 '), and four shift register or the four RAM memory (509 ') of the 8th d type flip flop (504 ') to the 4th subtracter (503) path; N, M1 and M2 are positive integer.
2. multichannel comb filter according to claim 1, is characterized in that,
In each the 4th single-stage integrator: the input of the 7th adder (502) is as the input of the 4th single-stage integrator; The output of the 7th adder (502) connects the 7th d type flip flop (504); The output of the 7th d type flip flop (504) is as the output of the 4th single-stage integrator, and connects the 7th adder (502) by the 3rd shift register or the 3rd RAM memory (509);
In each the 4th single-stage pectination device: the 8th d type flip flop (504 ') is connected as the input of the 4th single-stage pectination device with the 4th subtracter (503) input separately; The output of the 8th d type flip flop (504 ') connects the 4th subtracter (503) by the 4th shift register or the 4th RAM memory (509 '), and the output of the 4th subtracter (503) is as the output of the 4th single-stage pectination device.
3. multichannel comb filter according to claim 1 and 2, is characterized in that, the total length of described the 3rd, the 4th shift register or the 3rd, the 4th RAM memory (509,509 ') is M1*K, and K represents port number.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103066949A (en) * | 2012-12-28 | 2013-04-24 | 上海贝岭股份有限公司 | Multi-channel comb filter |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103066949A (en) * | 2012-12-28 | 2013-04-24 | 上海贝岭股份有限公司 | Multi-channel comb filter |
| CN103066949B (en) * | 2012-12-28 | 2015-11-25 | 上海贝岭股份有限公司 | A kind of multi-channel comb filter |
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