CN102412211B - 电子器件 - Google Patents

电子器件 Download PDF

Info

Publication number
CN102412211B
CN102412211B CN201110275217.XA CN201110275217A CN102412211B CN 102412211 B CN102412211 B CN 102412211B CN 201110275217 A CN201110275217 A CN 201110275217A CN 102412211 B CN102412211 B CN 102412211B
Authority
CN
China
Prior art keywords
semiconductor chip
electronic device
power
plane
carrier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201110275217.XA
Other languages
English (en)
Other versions
CN102412211A (zh
Inventor
R.奥特伦巴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of CN102412211A publication Critical patent/CN102412211A/zh
Application granted granted Critical
Publication of CN102412211B publication Critical patent/CN102412211B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49562Geometry of the lead-frame for devices being provided for in H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49517Additional leads
    • H01L23/49524Additional leads the additional leads being a tape carrier or flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49575Assemblies of semiconductor devices on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48145Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4901Structure
    • H01L2224/4903Connectors having different sizes, e.g. different diameters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06555Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06568Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking the devices decreasing in size, e.g. pyramidical stack
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/074Stacked arrangements of non-apertured devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1027IV
    • H01L2924/10272Silicon Carbide [SiC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1032III-V
    • H01L2924/10329Gallium arsenide [GaAs]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1032III-V
    • H01L2924/1033Gallium nitride [GaN]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1203Rectifying Diode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12044OLED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

本发明涉及电子器件。一种电子器件包括载体、多个管脚以及电子电路,该电子电路包括第一半导体芯片和第二半导体芯片。第一半导体芯片附着至载体,并且第二半导体芯片附着至多个管脚之一。

Description

电子器件
技术领域
本发明涉及一种电子器件。
背景技术
电子器件通常包括容纳于同一个半导体芯片封装内的两个或更多个半导体芯片。具体地,如果采用功率半导体芯片,则由于在半导体芯片内产生的过多热量以及难以耗散该过多热量而造成一般问题。因此,通常,如果电子电路包括两个或更多个功率半导体芯片,则每一个半导体芯片容纳于分离的半导体芯片封装内,以便于耗散其中产生的过多热量。
附图说明
附图被包括进来以提供对实施例的进一步理解,并且结合到本说明书中并构成本说明书的一部分。附图示意了实施例并与该描述一起用于解释实施例的原理。通过参照以下详细描述进行更好地理解,将容易认识到其他实施例以及实施例的许多预期优点。附图的元件不必相对于彼此按比例绘制。相似的附图标记指示对应的相似部分。
在结合附图阅读时在实施例的以下详细描述中本发明的各方面变得更加清楚,在附图中:
图1示出了根据实施例的电子器件的示意俯视图表示;
图2示出了根据实施例的电子器件的示意横截面侧视图表示;
图3示出了根据实施例的电子器件的示意横截面侧视图表示;
图4示出了根据实施例的电子器件的示意横截面侧视图表示;
图5示出了根据实施例的电子器件的示意横截面侧视图表示;
图6示出了根据实施例的电子器件的示意俯视图表示;
图7A和7B示出了根据实施例的电子器件的透视图表示;
图8示出了根据实施例的电子器件的示意横截面侧视图表示;以及
图9示出了功率因数控制(PFC)电路的示意图。
具体实施方式
在以下详细描述中,参照了附图,这些附图形成以下详细描述的一部分,并且其中以示意的方式示出了可实施本发明的具体实施例。在这一点上,参照所描述的附图的定向,使用了方向性术语,如“顶”、“底”、“前”、“后”、“首”、“尾”等等。由于实施例的组件可以以多个不同定向而定位,因此这些方向性术语用于示意的目的而决不进行限制。应当理解,在不脱离本发明的范围的前提下,可以利用其他实施例并且可以进行结构上或逻辑上的改变。因此,以下详细描述不应视为具有限制意义,并且本发明的范围由所附权利要求限定。
现在参照附图来描述这些方面和实施例,其中在整个附图中,相似的附图标记一般用于指代相似的元件。在以下描述中,为了解释的目的,阐述了许多具体细节,以便提供对实施例的一个或多个方面的透彻理解。然而,对于本领域技术人员来说可能显而易见的是,可以较低程度地利用具体细节实施这些实施例的一个或多个方面。在其他实例中,以示意的形式示出了已知结构和元件,以便于描述实施例的一个或多个方面。应当理解,在不脱离本发明的范围的前提下,可以利用其他实施例并且可以进行结构上或逻辑上的改变。还应当注意,附图不是按比例绘制的或不必按比例绘制。
此外,尽管可以针对多个实施方式中的仅一个实施方式公开实施例的特定特征或方面,但是对于任何给定的或特定的应用来说可能期望且有利的是,可以将这种特征或方面与其他实施方式的一个或多其他特征或方面进行组合。此外,在该详细描述或权利要求中使用了术语“包含”、“具有”、“含有”或其其他变形,在此意义上,这些术语意在以与术语“包括”类似的方式表示的是包含性的。可以使用术语“耦合”和“连接”及其派生词。应当理解,这些术语可以用于指示:不论两个元件直接物理或电接触还是不直接彼此接触,这两个元件都彼此协作或交互。此外,术语“示例性”仅表示作为实例,而不表示最佳或最优。因此,以下详细描述不应视为具有限制意义,并且本发明的范围由所附权利要求限定。
这里使用的器件(即,半导体芯片或半导体管芯)可以包括其一个或多个外表面上的接触元件或接触垫(contact pad),其中,例如,接触元件用于将相应的器件与接线板电接触。接触元件可由任何导电材料(例如,诸如铝、金或铜之类的金属、或者例如金属合金(如焊料合金)、或者导电有机材料、或者导电半导体材料)制成。
半导体芯片将变为封装有或覆盖有密封(encapsulant)或绝缘材料。密封材料可以是任何电绝缘材料,例如,任何种类的模具材料、任何种类的环氧材料或者任何种类的树脂材料,具有或不具有任何种类的填充材料均可。
参照图1,示出了根据实施例的电子器件的示意俯视图表示。电子器件10包括载体(carrier)1、多个管脚2以及电子电路,该电子电路包括第一半导体芯片3和第二半导体芯片4。第一半导体芯片3附着至载体1,而第二半导体芯片4附着至多个管脚2之一。
根据图1的实施例的实质优点在于,第一和第二半导体芯片3和4被布置为使得沿着不同热耗散路径对其中产生的热量进行耗散成为可能。具体地,根据一个实施例,载体1和管脚2由金属材料制成,从而可以通过金属载体1来耗散第一半导体芯片3中产生的热量,并且可以通过金属管脚2来耗散第二半导体芯片4中产生的热量。根据另一实施例,第一和第二半导体芯片3和4中的一个或两个在其底表面处具有电极接触部,使得芯片还分别与载体1或管脚2电接触。
第一半导体芯片3和第二半导体芯片4是同一个电子电路(以下将进一步详述该电子电路的示例)的一部分。这意味着提供了以下电连接(如接合线),该电连接将第二半导体芯片4或其支撑管脚2中的任一个与第一半导体芯片3或其支撑载体1之一相连接。其示例将在以下实施例中进一步呈现。
根据图1的电子器件的实施例,通过本领域中已知的任何制造方法,由引线框(leadframe)来制造金属载体1和多个金属管脚2。
根据图1的电子器件的实施例,支撑第二半导体芯片4的管脚2在其一端包括扩大或展宽的部分,使得第二半导体芯片4可以牢固地附着至扩大或展宽的部分上。根据其另一实施例,展宽的部分和第二半导体芯片4均具有矩形形状,并且例如,第二半导体芯片4的侧边缘的长度可以在0.5 mm至1 mm的范围内,而展宽部分的侧边缘的长度可以在1 mm至4 mm的范围内。
根据图1的电子器件的实施例,载体1和多个管脚2位于不同平面中,这意味着:载体1被形成为位于第一平面内的平坦平面载体1,而多个管脚2位于第二平面中,且第一平面和第二平面彼此分离。还可能的是,由于以下进一步解释的原因,至少一个管脚2可以弯曲到第二平面之外。
根据图1的电子器件的实施例,第一和第二半导体芯片3和4嵌入同一个绝缘材料中。在图1中利用虚线指示这种绝缘材料块5的外边缘。例如,绝缘材料可以是在将第一和第二半导体芯片3和4附着至载体1和管脚2并提供如以下进一步概述的接合线之后应用于该器件的任何类型的密封或模具材料。
根据图1的电子器件的实施例,第一和第二半导体芯片3和4由不同半导体基底材料制造。具体地,可以采用诸如Si、SiC、GaN或GaAs之类的半导体基底材料,作为第一和第二半导体芯片3和4的基底材料。
根据图1的电子器件的实施例,第一和第二半导体芯片3和4由功率半导体芯片构成,例如,功率半导体芯片可以是功率二极管或功率晶体管。
根据图1的电子器件的实施例,电子电路是功率转换器电路的一部分,且第一半导体芯片3包括诸如功率MOSFET之类的功率晶体管,而第二半导体芯片4包括功率二极管。具体地,电子器件可以是功率因数校正(PFC)器件的一部分。
参照图2,示出了根据实施例的电子器件的示意横截面侧视图表示。电子器件20包括第一金属载体21和第二金属载体22,且电子电路包括第一半导体芯片23和第二半导体芯片24。第一和第二金属载体21和22位于不同平面中,且第一半导体芯片23附着至第一金属载体21,而第二半导体芯片24附着至第二金属载体22。
根据图2的电子器件的实施例,第二金属载体22是例如沿着与薄片的平面垂直延伸的行布置的多个管脚之一。
根据图2的电子器件的实施例,第一和第二半导体芯片23和24与不同热耗散路径机械连接。如已经结合图1的实施例所解释的,可以通过第一载体21来耗散第一半导体芯片23中产生的热量,并且可以通过第二金属载体22来耗散第二半导体芯片24中产生的热量。
根据图2的电子器件的实施例,第一和第二半导体芯片23和24嵌入同一个绝缘材料中。在图2中利用虚线指示绝缘材料块25的轮廓。根据其一个实施例,第二金属载体22延伸至绝缘材料块25的轮廓之外。根据其另一实施例,第一金属载体21的主表面之一未被绝缘材料25覆盖,从而例如散热器可以附着至第一金属载体21的该主表面,以便进一步耗散第一半导体芯片23中产生的热量。
可以根据如上结合图1的实施例描述的实施例或特征来形成或解释图2的电子器件的其他实施例。
参照图3,示出了根据实施例的电子器件的示意横截面侧视图表示。电子器件30包括电子电路,该电子电路包括第一半导体芯片33和第二半导体芯片34,其中,第一和第二半导体芯片33和34与图3中利用粗线36和37指示的不同热耗散路径机械连接。
根据图3的电子器件的实施例,电子器件30还包括载体和多个管脚,其中,第一半导体芯片33附着至载体,而第二半导体芯片附着至多个管脚之一。载体形成第一热耗散路径36的至少一部分,且管脚形成第二热耗散路径37的至少一部分。
根据图3的电子器件的实施例,第一和第二半导体芯片33和34嵌入同一个绝缘材料中。在图3中利用虚线指示绝缘材料块35的轮廓。
可以根据如上结合图1和2的实施例描述的实施例或特征来形成或解释图3的电子器件30的其他实施例。
参照图4,示出了根据实施例的电子器件的示意横截面侧视图表示。电子器件40包括电子电路,该电子电路包括第一功率半导体芯片43和第二功率半导体芯片44,其中,第一和第二功率半导体芯片43和44嵌入同一个绝缘材料中。在图4中利用虚线指示绝缘材料块45的轮廓。此外,第一和第二半导体芯片43和44由不同半导体基底材料制造。
根据图4的电子器件的实施例,半导体基底材料选自包括Si、SiC、GaN和GaAs的材料组。
根据图4的电子器件的实施例,电子电路是功率转换器电路的一部分,且第一功率半导体芯片43包括功率晶体管,特别地,功率MOSFET,并且第二功率半导体芯片44包括功率二极管。根据其另一实施例,功率二极管基于SiC或GaN而制造。根据其另一实施例,功率MOSFET基于Si而制造并被配置为垂直MOSFET。这意味着:第一功率半导体芯片43包括两个主表面,且源电极接触垫和栅电极接触垫被布置在第一功率半导体芯片43的第一主表面上,而漏电极接触垫被布置在第一功率半导体芯片43的第二主表面上。
可以根据如上结合图1至3的实施例描述的实施例或特征来形成或解释图4的电子器件40的其他实施例。
参照图5,示出了根据实施例的电子器件的示意横截面侧视图表示。电子器件50包括第一半导体芯片53和第二半导体芯片54,第一半导体芯片53包括功率MOSFET 53.1,而第二半导体芯片54包括功率二极管54.1,其中,第一半导体芯片53和第二半导体芯片54嵌入同一个绝缘材料中。中利用绝缘材料块55(在图5其轮廓以虚线指示)指示绝缘材料。
根据图5的电子器件的实施例,第一和第二半导体芯片53和54与不同热耗散路径机械连接。根据其另一实施例,第一半导体芯片53可以附着至第一载体,而第二半导体芯片54可以附着至第二载体,其中,第二载体可以是多个管脚之一。
根据图5的电子器件的实施例,第一和第二半导体芯片53和54被布置在如图5所示的不同平面中。
根据图5的电子器件的实施例,功率MOSFET被配置为垂直MOSFET。
可与根据如上结合图1至4的实施例描述的实施例或特征来形成或解释图5的电子器件的其他实施例。
参照图6,示出了根据实施例的电子器件的示意俯视图表示。
如图6所示的电子器件60包括载体61和多个管脚62。通过本领域已知的任一方法,由金属引线框制造载体61和管脚62。功率MOSFET半导体芯片63附着至金属载体61的上表面。功率MOSFET 63以这样一种方式被配置为垂直功率MOSFET,即,使得在功率MOSFET 63的上表面上提供栅电极接触垫63A和源电极接触垫63B,而在与金属载体61的上表面电和热接触的下表面上提供漏电极接触垫(未示出)。在功率MOSFET 63的上表面上,将驱动器电路芯片68布置到源电极接触垫63B的区域上。驱动器电路芯片68在其上主表面上包括多个接触垫68A,其中一个接触垫68A经由接合线连接至功率MOSFET 63的源电极接触垫63B,另一个接触垫68A经由接合线与功率MOSFET 63的栅电极接触垫63A相连接,而其他接触垫68A分别经由接合线连接至管脚62。功率MOSFET 63的源电极接触垫63B经由粗线69连接至用作电路的接地端的右边最外侧管脚62。金属载体61以及管脚62的上部被嵌入绝缘材料块(未示出)中,使得管脚62的下部延伸至绝缘材料块之外并预期插入到接线板,如稍后所示。
参照图9,示出了根据示例的功率因数控制电路的示意电路图。如图9所示的电路实质上将左侧输入的AC电压转换为DC电压,可以在电路的右边最外侧节点处取出该DC电压。如图9所示的功率因数控制电路诸如现有技术中所公知,因此这里不再赘述。如上结合图1至5的实施例描述的电子器件形成图6的功率因数控制电路的一部分。具体地,该电路包括电子器件90,例如,先前实施例中描述且在图6中利用虚线指示的电子电路。该部分在下部示出了功率MOSFET 93,其栅电极由驱动器电路98驱动,并且该部分的上部示出了功率二极管94。这些电路元件同样在图5的电子电路的实施例中示出和描述。
参照图7A和7B,示出了根据实施例的电子电路的透视图。图7A示出了电子器件70,其实质上是图6的电子器件60的透视图,区别仅在于第一载体71包括上延伸部71.1,该上延伸部71.1用于保持散热器并将该散热器与其附着。图7B在以下配置中再次示出了电子器件70,在该配置中,客户将电子器件70插入电路板100中。此外,与图7A相比,在包含第一和第二半导体芯片的区域周围形成了绝缘材料块75。例如,可以通过模塑(molding)来形成绝缘材料块75。散热器71.2附着至载体71的后主表面并可以由例如铜块构成。
参照图8,示出了根据实施例的电子器件的示意横截面侧视图表示。电子器件80在右侧示出了载体81,在中部示出了绝缘材料块85,在左侧示出了多个管脚82,其中仅示出了两个管脚82。尽管在先前实施例中管脚始终布置在同一个平面内,但是图8的实施例示出了还可以根据客户的需求和愿望使管脚82弯曲。如图8所示,管脚82之一向下弯曲,从而产生如图8所示两个管脚之间的垂直距离。特别地,在这两个管脚承载要提供给包括第一和第二半导体芯片的电子器件的非常高电压的情况下,这可以是有利的。

Claims (12)

1.一种电子器件,包括:
载体;
多个管脚;以及
电子电路,包括第一半导体芯片和第二半导体芯片,其中,所述第一半导体芯片附着至所述载体上,并且所述第二半导体芯片附着至所述多个管脚之一上,以使得所述第一半导体芯片和所述第二半导体芯片与不同热耗散路径机械连接,其中所述载体位于第一平面中,而所述多个管脚位于第二平面中,且第一平面和第二平面彼此分离,其中至少一个管脚弯曲到第二平面之外。
2.根据权利要求1所述的电子器件,其中,所述第一半导体芯片和所述第二半导体芯片嵌入同一个绝缘材料中。
3.根据权利要求1所述的电子器件,其中,所述第一半导体芯片和所述第二半导体芯片由不同半导体基底材料制造。
4.根据权利要求1所述的电子器件,其中,所述第一半导体芯片和所述第二半导体芯片包括功率半导体芯片。
5.根据权利要求1所述的电子器件,其中,所述电子电路包括功率转换器电路,并且所述第一半导体芯片包括功率晶体管,且所述第二半导体芯片包括功率二极管。
6.一种电子器件,包括:
载体;
多个管脚;以及
电子电路,包括第一功率半导体芯片和第二功率半导体芯片,其中,所述第一功率半导体芯片和所述第二功率半导体芯片嵌入同一个绝缘材料中并由不同半导体基底材料制造,其中,所述第一功率半导体芯片和所述第二功率半导体芯片与不同热耗散路径机械连接,
其中所述第一功率半导体芯片附着至所述载体上,并且所述第二功率半导体芯片附着至所述多个管脚之一上,其中所述载体位于第一平面中,而所述多个管脚位于第二平面中,且第一平面和第二平面彼此分离,其中至少一个管脚弯曲到第二平面之外。
7.根据权利要求6所述的电子器件,其中,所述第一功率半导体芯片的半导体基底材料包括来自包括Si、SiC、GaN和GaAs的组的材料;以及
所述第二功率半导体芯片的半导体基底材料包括选自包括Si、SiC、GaN和GaAs的组的材料。
8.根据权利要求6所述的电子器件,其中,所述电子电路包括功率转换器电路,且所述第一半导体芯片包括功率MOSFET,且所述第二半导体芯片包括功率二极管。
9.根据权利要求8所述的电子器件,其中,所述功率二极管基于SiC或GaN而制造。
10.根据权利要求8所述的电子器件,其中,所述功率MOSFET基于Si而制造并被配置为垂直MOSFET。
11.一种电子器件,包括:
载体;
多个管脚;以及
第一半导体芯片和第二半导体芯片,所述第一半导体芯片包括功率MOSFET,并且所述第二半导体芯片包括功率二极管,其中,所述第一半导体芯片和所述第二半导体芯片嵌入同一个绝缘材料中,其中,所述第一半导体芯片和所述第二半导体芯片与不同热耗散路径机械连接,其中所述第一半导体芯片附着至所述载体上,并且所述第二半导体芯片附着至所述多个管脚之一上,其中所述载体位于第一平面中,而所述多个管脚位于第二平面中,且第一平面和第二平面彼此分离,其中至少一个管脚弯曲到第二平面之外。
12.根据权利要求11所述的电子器件,其中,所述功率MOSFET被配置为垂直MOSFET。
CN201110275217.XA 2010-09-17 2011-09-16 电子器件 Active CN102412211B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/884,793 US8519545B2 (en) 2010-09-17 2010-09-17 Electronic device comprising a chip disposed on a pin
US12/884793 2010-09-17

Publications (2)

Publication Number Publication Date
CN102412211A CN102412211A (zh) 2012-04-11
CN102412211B true CN102412211B (zh) 2015-07-29

Family

ID=45769068

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201110275217.XA Active CN102412211B (zh) 2010-09-17 2011-09-16 电子器件

Country Status (3)

Country Link
US (1) US8519545B2 (zh)
CN (1) CN102412211B (zh)
DE (1) DE102011053519A1 (zh)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2736073A1 (en) * 2012-11-21 2014-05-28 Nxp B.V. Cascode semiconductor device
US8937317B2 (en) * 2012-12-28 2015-01-20 Avogy, Inc. Method and system for co-packaging gallium nitride electronics
US9099441B2 (en) 2013-02-05 2015-08-04 Infineon Technologies Austria Ag Power transistor arrangement and method for manufacturing the same
US9263440B2 (en) 2013-02-11 2016-02-16 Infineon Technologies Austria Ag Power transistor arrangement and package having the same
US9324645B2 (en) * 2013-05-23 2016-04-26 Avogy, Inc. Method and system for co-packaging vertical gallium nitride power devices
US9324809B2 (en) 2013-11-18 2016-04-26 Avogy, Inc. Method and system for interleaved boost converter with co-packaged gallium nitride power devices
US9362240B2 (en) 2013-12-06 2016-06-07 Infineon Technologies Austria Ag Electronic device
DE102015110078A1 (de) * 2015-06-23 2016-12-29 Infineon Technologies Austria Ag Elektronische Vorrichtung und Verfahren zum Herstellen derselben
JP2021044532A (ja) * 2019-03-25 2021-03-18 ローム株式会社 電子装置、電子装置の製造方法、およびリードフレーム

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5459350A (en) * 1993-01-13 1995-10-17 Mitsubishi Denki Kabushiki Kaisha Resin sealed type semiconductor device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7145223B2 (en) 2002-05-22 2006-12-05 Matsushita Electric Industrial Co., Ltd. Semiconductor device
US7612447B2 (en) * 2007-06-06 2009-11-03 Gm Global Technology Operations, Inc. Semiconductor devices with layers having extended perimeters for improved cooling and methods for cooling semiconductor devices
US7737548B2 (en) * 2007-08-29 2010-06-15 Fairchild Semiconductor Corporation Semiconductor die package including heat sinks
US8098499B2 (en) * 2008-04-30 2012-01-17 Infineon Technologies Ag Circuit arrangement having two semiconductor switching elements and one freewheeling element

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5459350A (en) * 1993-01-13 1995-10-17 Mitsubishi Denki Kabushiki Kaisha Resin sealed type semiconductor device

Also Published As

Publication number Publication date
US8519545B2 (en) 2013-08-27
DE102011053519A1 (de) 2012-03-22
CN102412211A (zh) 2012-04-11
US20120068186A1 (en) 2012-03-22

Similar Documents

Publication Publication Date Title
CN102412211B (zh) 电子器件
US9171774B2 (en) Power semiconductor module and method of manufacturing the same
CN107958901B (zh) 模压智能电源模块
US9196577B2 (en) Semiconductor packaging arrangement
US20110227207A1 (en) Stacked dual chip package and method of fabrication
US10074620B2 (en) Semiconductor package with integrated output inductor using conductive clips
US10600727B2 (en) Molded intelligent power module for motors
CN103972184B (zh) 芯片布置和芯片封装
US9911679B2 (en) Semiconductor package with integrated output inductor on a printed circuit board
CN108155168B (zh) 电子器件
US11915999B2 (en) Semiconductor device having a carrier, semiconductor chip packages mounted on the carrier and a cooling element
US9666557B2 (en) Small footprint semiconductor package
KR20170092112A (ko) 수지 봉지형 반도체 장치
CN104576565A (zh) 具有散热体的半导体器件及其组装方法
CN108346629A (zh) 具有散热块以及无铆钉的管芯附接区域的半导体封装
US8471370B2 (en) Semiconductor element with semiconductor die and lead frames
US9099451B2 (en) Power module package and method of manufacturing the same
JP5181310B2 (ja) 半導体装置
US20220102253A1 (en) Semiconductor package and method of manufacturing a semiconductor package
US20180102300A1 (en) Connectable Package Extender for Semiconductor Device Package
US20230005846A1 (en) Semiconductor device and a method of manufacture
CN218274579U (zh) 一种GaN封装芯片结构与电子装置
US11069600B2 (en) Semiconductor package with space efficient lead and die pad design
CN205488099U (zh) 半导体装置
KR100222300B1 (ko) 리드 프레임 및 그를 이용한 트랜지스터 패키지

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant